JPH0331287Y2 - - Google Patents

Description

[Detailed explanation of the idea]

The present invention relates to an improvement of a sampling control circuit for a dynamic focus type received signal of an ultrasonic tomographic apparatus. In contrast to the dynamic focus of conventional ultrasonic tomography devices that use delay lines, in recent years, analog-to-digital conversion is performed on each channel at individual timings at the same time as the echo signal is received to match the desired focusing point. , a digital sampling phasing method that maintains a time equivalent to the delay time of a conventional delay line, outputs and adds the signals of each channel, and obtains the envelope of the reflected signal by processing the data. is being studied. The sampling time of the analog-to-digital conversion for a certain focal point is
It is expressed as the sum of each sampling interval for each focal point starting from the shallowest focal point. What is currently being considered is that for the basic sampling interval (sampling interval for the transducer on the ultrasound beam),
How many nanoseconds (ns) does each sampling interval in other transducers reduce?
(Read Only Memory), and sampling is performed based on this data. In this case, if we temporarily set the basic sampling interval to
Let us assume that the sampling interval that can be realized by the circuit is 640ns, and the sampling intervals that can be realized by the circuit are quantized values of 10ns such as 640ns, 630ns, 620ns, etc. Minimum sampling interval required to perform dynamic focus (sampling interval between the shallowest convergence point and the next convergence point of the transducers at both ends of the group of transducers involved in reception)
If is 500ns, the time reduction is 640ns − 500ns =
It becomes 140ns. In order to represent this shortened time as a digital value, 4 bits are required since the sampling interval is quantized at 10 ns. Further, if the accuracy of sampling time is ±10 ns, it is necessary to adjust the interval every two samples in the depth direction. Therefore, if we take 512 pixels in the depth direction,
Since the sampling interval is adjusted at 256 points, approximately 1 kilobit (=4 bits x 256 = 1024 bits) of focus data is required to receive one line on one channel of the receiving aperture. In an actual device, there is not a one-to-one correspondence between one channel of the receiving aperture and the sampling circuit, so each sampling circuit stores a large amount of focus data corresponding to all the oscillators forming the entire receiving aperture. It is necessary to have Therefore, if the receiving aperture is increased or asymmetrical reception is performed, the capacity of this focus data becomes enormous, requiring a ROM with a large memory capacity, or increasing the number of ROMs, which may cause problems in the equipment. There were issues that needed to be resolved, such as an increase in the price and an increase in size. The purpose of the present invention is to solve the above-mentioned problems and provide a technology that realizes dynamic focus with a large aperture and wide field of view without increasing the size of the device, and allows obtaining good ultrasound tomographic images. . The features of the present invention include a sampling interval setting means for quantizing the sampling interval obtained by calculation in advance, and a signal for correcting the sampling time caused by accumulation of errors in the sampling interval set by the sampling interval setting means. The present invention includes a correction signal generation means for generating a correction signal, and a correction means for correcting the output of the sampling interval setting means based on the output of the correction signal generation means. Hereinafter, the present invention will be explained in detail with reference to principles and examples. (1) Principle of the present invention In dynamic focus of an ultrasonic tomography device, the sampling interval is increased. (i) For example, as shown in Figure 3, a reflective object p1 at depth m1 (the shallowest part based on the transducer)
In order to receive signals from the It is later obtained by analog-to-digital conversion. Here, m1 is doubled to take into account the round trip time of the sound wave, and C is the speed of sound. On the other hand, in the A1 channel (the vibrator farthest from the reflecting object _P1 ), analog-to-digital conversion must be performed after 2×m2 (mm)/C (mm/s). The values obtained in this manner are temporarily stored in a buffer memory, and then data corresponding to the same depth are added across all channels to obtain phased data. (ii) Next, for the signal from the reflecting object p2 at depth m3, the A5 channel is 2×m3 (mm)/C (mm/s) after the ultrasonic transmission, and the A1 channel is 2×m4 ( mm)/C (mm/s) It can be obtained by performing analog-to-digital conversion later. Here, (m3 - m1) (mm) = l1 (mm) is the sampling pitch in the depth direction when receiving weak sound waves. The sampling interval from the reflecting object p1 at depth m1 to the reflecting object p2 at depth m2 is 2 x (m3 - m1) (mm)/C (mm/s) = 2 x l1 (mm) in the A5 channel.
/C (mm/s), and in the A1 channel, 2 x (m4 - m2) (mm)/C (mm/s) = 2 x l2 (mm)
/C (mm/s). (iii) From a deep place, for example, from a reflective object p3
The sampling interval up to p4 is 2 x (m7 - m5) (mm)/C (mm/s) = 2 x l1 (mm) in the A5 channel.
/C (mm/s), and in the A1 channel, 2 x (m8 - m6) (mm)/C (mm/s) = 2 x l3 (mm)
/C (mm/s). As can be seen from these, in the channel on the ultrasonic scanning line, that is, the A5 channel, the sampling interval is constant at 2 × l1 (mm)/C (mm/s), but in the other channels, the A1 channel, the sampling interval is constant. , the sampling interval between p3 and p4 is 2×(m8−m6)(mm)/C(mm/s) =2×(m7/cosθ ₂ −m5/cosθ ₂ )/C(mm/s
), but these θ ₁ and θ ₂ decrease as the depth increases, so this value gradually becomes 2×(m7−m5)(mm)/C(mm/s)=2× l1 (mm)
/C (mm/s). In other words, except for the A5 channel, the sampling interval starts from a value smaller than (2×l1)/C, and as the depth increases, the sampling interval increases to (2×l1)/C.
As it approaches the value of l1)/C, it becomes a monotonically increasing value. Therefore, the sampling interval T _S is divided into two parts and expressed as in equation (1). T _S =T _O +N×10 (ns) (1) In Equation (1), T _O is a sampling interval obtained by rounding down a pre-calculated sampling interval to a constant value C, for example, 10 ns. Also,
N is 1-bit information of "0" or "1", and in order to solve the sampling time error caused by the accumulation of errors in the interval T _O , that is, the deviation in absolute time due to the quantization of the interval, T _O Select whether to add +10ns (or -10ns) to the sampling interval.
In this way, the sampling interval T _O only increases from, for example, 500ns to 40ns, so
It is only necessary to store the addresses of sampling points where the sampling interval _TO changes by 10 ns. This can be done by memorizing at most 13 addresses. Furthermore, since N is 1-bit information, either "0" or "1", only a small storage capacity is required. In this way, the address of the sampling point at which the sampling interval T _O is extended by 10 ns and the value of the signal N for correcting the sampling time are stored as sampling interval data. This allows storage capacity to be reduced. (2) Embodiment of the present invention Figure 1 is a block diagram showing the configuration of an embodiment of the present invention, where 1 outputs an address that increases the sampling interval T _O calculated in advance. ROM 2 is a ROM that stores data for correcting the sampling time due to the accumulation of errors in the sampling interval _TO , that is, data as to whether or not it is necessary to add +10 ns. 3 is a data selector, which has a W output terminal for selecting one clock from clocks φ ₁₅ to _{φ 0} and outputting it, and a Y output terminal for inverting and outputting the output. 4 is a counter, which has output terminals Q _A and Q _B , and from output terminal _A outputs a pulse a with twice the period of the output from the W output terminal of the data selector 3 in synchronization with the period of the output from the W output terminal of the data selector 3; Further, from the output terminal _QB , it is a counter that outputs a pulse with a period twice that of the output a in synchronization with the output a. 5 is a matching circuit 5, which outputs "1" when the input data to input terminals A and B match.
Output. 6 is a counter for counting the number of sampling times indicating the address of the sampling point;
Counts and outputs 256 times as 8-bit data.
7 is a counter for setting the sampling interval _TO , which advances the output by one step when the output signal of the coincidence circuit 5 is "1"; 8 is a data selector; 9
is a flip-flop, 10 is an adder, 11, 12
13 is a latch circuit, 13 is an inverter, 14 and 15 are gate circuits, and the "C" signal (low level signal in FIG. 2C) output from the gate circuit 15 is a sampling signal. A list of the contents of the sampling data to be generated by the ROM1 and ROM2 is shown in the table.

[Table] The table shows how to set the sampling interval of the present invention. In the table, a calculated sampling interval is determined from the calculated sampling time, quantized, and stored in the ROM1. The error between the quantized sampling interval and the calculated sampling time is determined, and when a predetermined error occurs, correction data (+10) is generated from the ROM 2. As a result, dynamic focus can be achieved without storing a large amount of sampling data.

[Table] FIG. 2 is a timing chart for explaining the operation for setting the sampling interval for a certain focal point of a certain vibrator according to this embodiment, and φ ₀ and φ ₆ are the 0th and 0th points, respectively. 6th clock, a is the output signal of the Q _A output terminal of counter 4, b is the output signal of the Q _B output terminal of counter 4,
c is the output signal of the gate circuit 15, that is, a sampling signal, and d is the output signal of the Σ output terminal of the adder 10. Next, the operation of this embodiment will be explained with reference to FIGS. 1 and 2. In this example, the basic sampling interval is 640 ns, the number of sampling points in the depth direction is 512 points, and at half of them, 256 points, the sampling interval _TO can be increased and the sampling time can be corrected, and the accuracy of the sampling time is is ±10ns
It is. The clocks φ ₁₅ to _{φ 0} each have a phase difference of 10 ns, and the clocks φ ₁₅ , φ ₁₄ , φ ₁₃ ,
The phase is delayed by 10 ns in the order of ..., and the frequency is 6.25 MHz (period 160 ns). Now, the input terminal of data selector 3 is "φ ₀ "
Assume that the clock φ ₀ and its inverted output are selected as the outputs from the W and Y output terminals of the data selector 3. In response to a signal from the W output terminal of the data selector 3, the counter 4 outputs a and b, and the output b is input to the counters 6 and 7. At this time, the output of the Q output terminal of counter 7 that sets the sampling interval _TO is "1101", that is, there have been 12 sampling points so far, and this time it is 13.
This is the second sampling. This output is input to inverter 13 and ROM1, and inverter 1
The signal input to the adder 10 is inverted by the inverter 13 to become "0010" and is input to the B input terminal of the adder 10. Further, the adder 1 receives the b output from the counter 4 via the flip-flop 9.
``1'' is input to the carry (Ca) input terminal of 0. When this balance (Ca) is "1", no correction is made, and when it is "0", a correction of +10 ns is made. At this time, the A input terminal of the adder 10 is "0" as well as the S input terminal of the data selector 3, so the output d of the Σ output terminal of the adder 10 is "0".
It becomes "3" from the B input "2" of 0 and the carry (Ca) input "1". This output d is latch circuit 1
1 and 12 to the S input terminal of the data selector 3. At time A of the d signal shown in FIG. 2, the output of the data selector 3 switches from clock φ ₀ to clock φ ₃ , and the outputs a, b also becomes synchronized with clock _φ3 . The sampling interval T _S of the c signal shown in Fig. 2 is 640ns−30ns (φ ₀
4 periods of 640 ns - phase difference between clock φ ₃ and φ ₀ 30 ns)
=610ns (=T _O ), and the sampling signal c is output. Changing the sampling interval can be done using the ROM
1 output, that is, the setting address of the sampling interval T _O and the output count number of the counter 6 that counts the b output of the counter 4 are input to the matching circuit 5, and when both match 1 and output a "1" signal. done to. Suppose this output is made for the 14th sampling. As a result, the count enable R input terminal of the counter 7 becomes "1", and the output of the Q output terminal of the counter 7 counts up to "1110" due to the clock input to the clock CK input terminal, and this value is changed by the inverter 13. "0001" and "1" is input to the B input terminal of the adder 10. Since the input to the A input terminal is "3" at this time, the Σ output terminal of the adder 10 becomes "5" if the input to the Ca input terminal is "1". As a result, the clock _φ3 is switched to the clock _φ5 , and the sampling interval is 640ns−20ns=
It becomes 620ns. Also, at this time, if the input to the Ca input terminal of the adder 10 is "0", the output of the Σ output terminal will be "4", and the T _O change and +10ns correction will be made at the same time, and the sampling interval will be 640ns - 10ns. =
It becomes 630ns. The input carry signal at the Ca input terminal of the adder 10 is obtained through the data selector 8 and flip-flop 9 from the ROM 2 which stores data for correcting sampling time. The address of ROM1 is made up of 4 bits from counter 7, and these 4 bits indicate the count number by which the sampling interval should be extended. Also,
The input address of the ROM 2 is 5 bits out of 8 bits of the sampling address counter 6, and the output of the ROM 2 is 8 bits. The data selector 8 is selected by the remaining 3 bits of the 8 bits output from the counter 6. The data for one line of one channel of the receiving aperture is stored in the ROM.
128 (= 8 x 16) bits of ROM 1 and 256 (= 8 x 16) bits of ROM 2
1 x 256) bits, and a total of 384 bits can represent the sampling data. It goes without saying that the present invention is not limited to the embodiments described above, and can be modified in various ways without changing the gist thereof. As described above, according to the present invention, the capacity of sampling focus data can be reduced by expressing the sampling interval T _S in the form T _O +N×10 ns. For example, in the conventional system, each channel and line of the receiving aperture
According to the present invention, what required a storage capacity of 1024 bits can achieve the same accuracy with 384 bits. This makes it possible to easily expand the receiving aperture.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing the configuration of an embodiment of the present invention, Fig. 2 is a time chart for explaining the operation of an embodiment of the present invention, and Fig. 3 is a dynamic focus diagram. FIG. 3 is a diagram for explaining the principle. In the figure, 1, 2...ROM, 3, 8...data selector, 4, 6, 7...counter, 5...matching circuit, 9...flip-flop, 10...adder,
11, 12... Latch circuit, 13... Inverter, 14, 15... Gate circuit.

Claims (1)

[Scope of utility model registration request] In an ultrasonic tomography apparatus equipped with a sampling control circuit for performing dynamic focus, there is provided a sampling interval setting means for quantizing and setting a sampling interval obtained by calculation in advance, and a sampling interval set by the sampling interval setting means. A correction signal generation means for generating a correction signal for sampling time caused by accumulation of errors in the correction signal generation means, and a correction means for correcting the output of the sampling interval setting means using the output of the correction signal generation means. Ultrasonic tomography device.