JPH0329234B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention generates an electron beam for each vertical section when a screen is divided into a plurality of sections vertically and horizontally.
The present invention relates to a device that displays a television image as a whole by deflecting electron beams in vertical and horizontal directions for each horizontal section.

Conventional configurations and their problems Traditionally, cathode ray tubes have been mainly used as display elements for displaying color television images, but conventional cathode ray tubes are extremely long and thin compared to the screen size. It was impossible to create a full-sized television receiver. In addition, EL display elements, plasma display devices, liquid crystal display elements, etc. have recently been developed as flat display elements.
All of them are insufficient in terms of performance such as brightness, contrast, and color display, and have not yet been put into practical use.

Therefore, in order to achieve a flat display device using electron beams, the present applicant filed a patent application in 1983-
No. 20618 (Japanese Unexamined Patent Publication No. 135590/1983) proposed a new display device.

This method generates an electron beam for each section when the screen is vertically divided into multiple sections, and displays multiple lines by deflecting each electron beam vertically for each section. However, it displays the television image as a whole.

First, a basic arrangement of the image display elements used here will be explained with reference to FIG.

This display element is arranged in order from the back to the front.
A back electrode 1, a line cathode 2 as a beam source, vertical focusing electrodes 3, 3, a vertical deflection electrode 4, a beam current electrode 5, a horizontal focusing electrode 6, a horizontal deflection electrode 7, a beam accelerating electrode 8, and a screen plate 9 are arranged. These are housed in the evacuated interior of a flat glass bulb (not shown). A line cathode 2 serving as a beam source is stretched horizontally so as to generate an electron beam distributed linearly in the horizontal direction, and a plurality of line cathodes 2 (here, Only four (2A to 2D are shown) are provided. In this embodiment, it is assumed that 15 pieces are provided. Let's call them 2i~2yo. These line cathodes 2 are for example
An oxide cathode material for thermionic emission is coated on the surface of a tungsten wire with a diameter of 10 to 20 μφ. These line cathodes 2A to 2Y are heated so as to generate a thermionic electron beam by passing an electric current through them, and as will be described later, the electron beams are generated sequentially for a certain period of time starting from the line cathode 2I. controlled to emit. The back electrode 1 is a line cathode 2 which is controlled to emit an electron beam for a certain period of time.
It functions to suppress the generation of electron beams from other line cathodes 2 and to push out the generated electron beams only in the forward direction. The back electrode 1 may be formed by a coating of a conductive material applied to the inner surface of the rear wall of the glass bulb. Further, instead of the back electrode 1 and the linear cathode 2, a planar electron beam emitting cathode may be used.

The vertical focusing electrode 3 is a conductive plate 11 having a horizontally long slit 10 facing each of the line cathodes 2I to 2Y, and extracts the electron beam emitted from the line cathode 2 through the slit 10, and focus in a direction. An electron beam for one horizontal line (360 pixels) is extracted at the same time. In the figure, only one section in the horizontal direction is shown. The slit 10 may be provided with slits at appropriate intervals in the middle, or may be substantially configured as a slit by a row of many through holes arranged horizontally at small intervals (nearly touching intervals). may have been done. The vertical focusing electrode 3' is also similar.

A plurality of vertical deflection electrodes 4 are arranged horizontally in the middle of each of the slits 10, and are each composed of conductors 13 and 13' provided on the upper and lower surfaces of an insulating substrate 12. has been done. And the opposing conductors 13, 13'
A vertical deflection voltage is applied between them to deflect the electron beam in the vertical direction. In this embodiment, the electron beam from one line cathode 2 is vertically deflected to positions corresponding to 16 lines by a pair of conductors 13, 13'. And, by 16 vertical deflection electrodes 4, 15
Fifteen conductor pairs corresponding to each of the book line cathodes 2 are constructed, and the electron beam is ultimately deflected to draw 240 horizontal lines on the screen 9.

Next, the control electrodes 5 are composed of conductive plates 15 each having a vertically long slit 14, and a plurality of control electrodes 15 are arranged in parallel in the horizontal direction at predetermined intervals. In this embodiment, 180 conductive plates 15a to 15n for control electrodes are provided (only nine are shown in the figure). Each of the control electrodes 5 separates and extracts the electron beam into two picture elements in the horizontal direction, and controls the amount of electron beam passing therethrough in accordance with a video signal for displaying each picture element. Therefore, the conductive plates 15a to 15n for the control electrode 5 are
With this arrangement, 360 pixels can be displayed per horizontal line. In addition, in order to display images in color, each picture element is displayed using phosphors of three colors, R, G, and B, and each control electrode 5 has two picture elements of R, G, and B. Each video signal is applied sequentially. In addition, 180 conductive plates 15a to 15n for control electrodes 5
180 sets of video signals for one line (two picture elements per set) are simultaneously applied to each of the lines, and one line of video is displayed at one time.

The horizontal focusing electrode 6 is composed of a conductive plate 17 having a plurality of vertically long slits 16 (180 slits 16) facing the slits 14 of the control electrode 5, and collects electrons for each picture element divided in the horizontal direction. Each beam is focused horizontally into a narrow electron beam.

The horizontal deflection electrode 7 is made up of a plurality of conductive plates 18, 18' arranged vertically on both sides of the slit 16, and each electrode 18, 18' has six levels of horizontal deflection. A voltage is applied to horizontally deflect the electron beam for each pixel, and on the screen 9 two sets of R,
The G and B phosphors are sequentially irradiated to emit light. In this embodiment, the deflection range is two picture elements wide for each electron beam.

The accelerating electrode 8 is composed of a plurality of conductive plates 19 provided horizontally at the same position as the vertical deflection electrode 4, and accelerates the electron beam so that it collides with the screen 9 with sufficient energy.

The screen 9 is constructed by coating the back surface of a glass plate 21 with a phosphor 20 that emits light when irradiated with an electron beam, and adding a metal back layer (not shown). The phosphor 20 is arranged for each slit 14 of the control electrode 5, that is, for each horizontally divided electron beam.
Two pairs of three-color phosphors, R, G, and B, are provided and are applied in stripes in the vertical direction. In FIG. 1, the broken lines drawn on the screen 9 indicate divisions in the vertical direction that are displayed corresponding to each of the plurality of line cathodes 2, and the two-dot chain lines correspond to each of the plurality of control electrodes 5. Indicates the horizontal division displayed. As shown in the enlarged view in Figure 2, one section partitioned by these two has R, G, and B phosphors 20 for two pixels in the horizontal direction, and 16 lines in the vertical direction. It has a width of
For example, the size of one section is 1 in the horizontal direction.
mm, and the vertical direction is 10 mm.

Note that in FIG. 1, the length in the horizontal direction is greatly enlarged relative to the length in the vertical direction for clarity.

Further, in this embodiment, only one pair of R, G, and B phosphors 20 for two picture elements are provided for one control electrode 5, that is, one electron beam, but of course, one picture element Alternatively, three or more picture elements may be provided. In that case, R, G, and B video signals for one picture element or three or more picture elements are sequentially applied to the control electrode 5, and the horizontal deflection is synchronously applied to the control electrode 5. It will be done.

Next, the basic configuration of a drive circuit for displaying television images on this display element will be explained with reference to FIG. First, a driving portion for irradiating the screen 9 with an electron beam to emit raster light will be described.

The power supply circuit 22 is a circuit for applying a predetermined bias voltage (operating voltage) to each electrode of the display element,
-V ₁ to the back electrode 1, and -V 1 to the vertical focusing electrodes 3 and 3'.
DC voltages of V ₃ , V ₃ ', V ₆ to the horizontal focusing electrode 6, V ₈ to the accelerating electrode 8, and V ₉ to the screen 9 are applied.

Next, a composite video signal of a television signal is applied to the input terminal 23, and a synchronization separation circuit 24 separates and extracts a vertical synchronization signal V and a horizontal synchronization signal H.

The vertical deflection drive circuit 40 includes a vertical deflection counter 25, a memory 27 for storing vertical deflection signals, and a digital-to-analog converter 39 (hereinafter referred to as a DA converter). As input pulses to the vertical deflection drive circuit 40, a vertical synchronizing signal V and a horizontal synchronizing signal H shown in FIG. 4 are used. The vertical deflection counter 25 (8 bits) receives the vertical synchronization signal V.
The horizontal synchronizing signal H is counted. This vertical deflection counter 25 counts the effective scanning period (here, a period of 240 hours) excluding the vertical retrace period of the vertical period,
This count output is supplied to an address in memory 27. The memory 27 outputs vertical deflection signal data (here, 8 bits) corresponding to each address, and is converted by the DA converter 39 into vertical deflection signals v and v' shown in FIG. In this circuit 240H
There is a memory address for storing the vertical deflection signal corresponding to each line of minutes, and by storing regular data in the memory every 16H minutes, it is possible to obtain a 16-step vertical deflection signal.

On the other hand, the line cathode drive circuit 26 receives the vertical synchronization signal V
Using the output of the vertical deflection counter 25, line cathode drive pulses I to Y are created. FIG. 5a shows the relationship between the vertical synchronizing signal V, the horizontal synchronizing signal H, and the lower five bits of the vertical deflection counter 25. FIG. 5b shows a method of creating line cathode drive pulses 1' to 16' every 16H using these signals. In Figure 5,
LSB indicates the lowest bit, and (LSB+1) means the bit one higher than the LSB.

The first line cathode drive pulse I' consists of the vertical synchronizing signal V and the output of the vertical deflection counter 25 (LSB+
4) can be created using an R-S flip-flop, etc., and the line cathode drive pulses LO' to YO' can be created using a shift register, and the line cathode drive pulses LO' to YO' are output from the vertical deflection counter 25 (LSB+3).
It can be obtained by using the inverted version of the clock as a clock and transmitting it. These drive pulses I'~Yo' are inverted and set to a low potential only during each pulse period, and during other periods are converted into line cathode drive pulses I~Y in high units of about 20 volts, and each line cathode 2I~
Added to 2yo.

Each line cathode 2i to 2yo is heated by a current flowing through it during the high potential period of the drive pulses I to YO, and the heated state is maintained so that electrons can be emitted during the low potential period of the drive pulses I to YO. Ru. As a result, electrons are emitted from the 15 line cathodes 2i to 2yo only during the 16H period when low-potential drive pulses are applied to each of them. During the period when a high potential is applied, the potential at the line cathode 2 is lower than the potential at the position of the line cathode 2 determined by the bias voltage applied to the back electrode 1 and the vertical focusing electrode 3. Since the applied high potential becomes positive, no electrons are emitted from the line cathodes 2I to 2Y. Thus, in the line cathode 2, electrons are sequentially emitted from the upper line cathode 2a toward the lower line cathode 2y every 16H period during the effective vertical scanning period.

The emitted electrons are pushed forward by the back electrode 1, pass through the opposing slits 10 of the vertical focusing electrode 3, and are focused in the vertical direction to form a flat electron beam.

Next, the relationship between the line cathode drive pulses y to y and the vertical deflection signals v and v' will be explained using FIG. 6. The vertical deflection signals v, v' change by 1H during the 16H period of each line cathode pulse y to y, and change in 16 steps. The vertical deflection signals v and v' both have a center voltage of _V4 , and are configured to change in opposite directions so that v increases sequentially and v' decreases sequentially. These vertical deflection signals v and v' are applied to electrodes 13 and 13' of the vertical deflection electrode 4, respectively, and as a result, the electron beams generated from the respective line cathodes 2a to 2o are deflected in 16 steps in the vertical direction. and as mentioned earlier, 1 on screen 9.
One electron beam is deflected to draw a 16-line raster one line at a time, starting from the top.

As a result of the above, an electron beam is emitted for a period of 16 hours from the top of the 15 line cathodes 2A to 2Y, and each electron beam is sequentially emitted for one line from the top to the bottom within 15 sections in the vertical direction. As a result, the electron beam is vertically deflected one line at a time on the screen 9 from the first line at the top end to the 240th line at the bottom end, thereby drawing a raster of 240 lines in total.

The electron beam thus vertically deflected is horizontally deflected by 180 degrees by the control electrode 5 and the horizontal focusing electrode 6.
It is divided into sections and taken out. Figure 1 shows one of these categories. The amount of electron beam passing through each section is controlled by a control electrode 5, and horizontally focused by a horizontal focusing electrode 6 into a single narrow electron beam, which is then controlled by horizontal deflection means described below. The light is then deflected in six steps in the horizontal direction and is sequentially irradiated onto each of the R, G, and B phosphors 20 corresponding to two picture elements on the screen 9. FIG. 2 shows the vertical and horizontal divisions. The phosphors corresponding to each of 15a to 15n of the control electrode 5 are R, G, and B for two picture elements, but for convenience of explanation, one picture element is shown here.
Let R ₁ , G ₁ , B ₁ be R ₂ , G ₂ , B ₂ .

Next, the horizontal deflection drive circuit 41 is composed of a horizontal deflection counter (11 bits), a memory 29 storing horizontal deflection signals, and a DA converter 38. As shown in FIG. 7, the input pulses of the horizontal deflection drive circuit 41 are synchronized with the vertical synchronizing signal V and the horizontal synchronizing signal H, and a pulse 6H having a repetition frequency six times that of the horizontal synchronizing signal H is used.

The horizontal deflection counter 28 is reset by the vertical synchronizing signal V and counts the horizontal six times pulse 6H. This horizontal deflection counter 28 is
6 times during 1H, 240H x 6/H = 1440 during 1V
The count output is supplied to an address in the memory 29. Horizontal deflection signal data (here, 8 bits) corresponding to the address is output from the memory 29, and converted by the D-A converter 38 into horizontal deflection signals such as h and h' shown in FIG. . This circuit has memory addresses for storing horizontal deflection signals corresponding to each of 6 x 240 lines, and by storing 6 pieces of regular data for each line in the memory, 6 step waves are generated in 1H period. horizontal deflection signals can be obtained.

This horizontal deflection signal is a pair of horizontal deflection signals h and h' that change in 6 steps as shown in FIG. 7, both have a center voltage of V ₇ , and h gradually decreases.
h' increases in sequence and changes in opposite directions. These horizontal deflection signals h, h' are applied to electrodes 18 and 18' of the horizontal deflection electrode 7, respectively.
As a result, each horizontally divided electron beam is transmitted to the R, G, B,
It is horizontally deflected so that R, G, and B (R ₁ , G ₁ , B ₁ , R ₂ , G ₂ , B ₂ ) phosphors are sequentially irradiated with H/6 each. Thus, in each line raster, the electron beam is R ₁ ,
Each phosphor 20 of G ₁ , B ₁ , R ₂ , G ₂ , and B ₂ is sequentially irradiated with light.

Therefore, an electron beam is applied to each horizontal section of each line.
A color television image can be displayed on the screen 9 by modulating the video signals R ₁ , G ₁ , B ₁ , R _{2 ,} G ₂ , and B 2 .

Next, the modulation control portion of the electron beam will be explained.

First, the composite video signal applied to the television signal input terminal 23 is applied to the color demodulation circuit 30,
Here, the color difference signals of R-Y and B-Y are demodulated,
The G-Y color difference signals are matrix-synthesized, and further, they are combined with the luminance signal Y to generate R, G,
B primary color signals (hereinafter referred to as R, G, and B video signals) are output. Each of these R, G, and B video signals are processed by 180 sample and hold circuit sets 31a to 3.
Added to 1n. Each sample hold circuit group 3
1a to 31n are for R ₁ , G ₁ , B ₁ , R ₂ respectively
It has six sample-and-hold circuits for G, _G2 , and _B2 . These sample and hold outputs are respectively applied to holding memory sets 32a to 32n.

On the other hand, the reference clock oscillator 33 is composed of a PLL (phase lock loop) circuit, etc., and in this embodiment, a reference clock 6f _sc that is six times the color subcarrier f _sc and a reference clock 2f _{sc that} is twice the color subcarrier f sc are used. Occur. The reference clock is controlled to always have a constant phase with respect to the horizontal synchronizing signal H. Reference lock 2f _sc is deflection pulse generation circuit 4
2 and a signal 6H that is six times the horizontal synchronization signal H
The signal switching pulses r ₁ , g ₁ , b ₁ , r ₂ , g ₂ , b ₂ are obtained every H/6. On the other hand, the reference clock _6fsc is applied to the sampling pulse generation circuit 34, where it is delayed by one clock cycle by a shift register, etc., during the effective horizontal scanning period (approximately 50 μsec) of the horizontal period (63.5 μsec). 1080 sampling pulses Ra ₁ to Bn ₂ are sequentially generated, and then one transfer pulse t is generated. This sampling pulse Ra ₁ ~ Bn ₂ is one of the images to be displayed.
It corresponds to each picture element when a line is divided into 360 picture elements in the horizontal direction, and its position is controlled so that it is always constant with respect to the horizontal synchronizing signal H.

These 1080 sampling pulses Ra ₁ to Bn ₂ are connected to 180 sample and hold circuit sets 31a.
31n, and as a result, R ₁ , G ₁ , B ₁ , R for each two picture elements when one line is divided into 180 are added to each sample-and-hold circuit set 31a to 31n. ₂ , _G2 , and _B2 are individually sampled and held. The sample-held 180 pairs of R ₁ , G ₁ , B ₁ , R ₂ , G ₂ ,
After the sample and hold for one line is completed, the _B2 video signal is transferred all at once to 180 sets of memories 32a to 32n by a transfer pulse t, where it is held for the next horizontal period. This retained R ₁ , G ₁ ,
B ₁ , R ₂ , G ₂ , B ₂ signals are sent to the switching circuit 35
Added to a~35n. Switching circuit 35
a to 35n are R ₁ , G ₁ , B ₁ , R ₂ , G ₂ ,
It is composed of a tri-state or analog gate having _B2 individual input terminals and a common output terminal that sequentially switches and outputs them.

The output of each switching circuit 35a to 35n is
180 sets of pulse width modulation (PWM) circuits 37a to 3
7n, and here, the reference pulse signal is pulse width modulated according to the magnitude of the sampled and held R ₁ , G ₁ , B ₁ , R ₂ , G ₂ , B ₂ video signal and is output. It is desirable that the repetition period of the reference pulse signal is sufficiently smaller than the pulse width of the signal switching pulses r ₁ , g ₁ , b ₁ , r ₂ , g ₂ , b ₂ , for example, 1:10 to 1:10. A ratio of about 1:100 is used.

The output of the pulse width modulation circuits 37a to 37n is used as a control signal for modulating the electron beam to the 180 conductive plates 15a to 15 of the control electrode 5 of the display element.
n separately. Each of the switching circuits 35a to 35n receives a switching pulse r ₁ , which is applied from the switching pulse generation circuit 36.
Switching is controlled simultaneously by g ₁ , b ₁ , r ₂ , g ₂ , and b ₂ . The switching pulse generation circuit 36 generates a signal switching pulse from the deflection pulse generation circuit 42 mentioned above.
It is controlled by r ₁ , g ₁ , b ₁ , r ₂ , g ₂ , b ₂ ,
Each horizontal period is divided into 6 and the switching circuits 35a to 35n are switched by H/6, and R ₁ , G ₁ , B ₁ ,
The switching signals r _{1 ,} g _{1 ,} b ₁ , r ₂ , b _{2 ,} Generate g ₂ .

What should be noted here is that the switching circuit 3
R ₁ , G ₁ , B ₁ , R ₂ , G ₂ , B ₂ in 5a to 35n
Video signal supply switching and horizontal deflection drive circuit 41
The irradiation switching horizontal deflection of the electron beams R ₁ , G ₁ , B ₁ , R ₂ , G ₂ , B ₂ to the phosphor is controlled synchronously so that they completely match both in timing and order. That's true. As a result, when the electron beam _R1 is irradiated onto the phosphor, the amount of the electron beam irradiated is controlled by the _R1 video signal, and the same applies to _G1 , _B1 , _R2 , _G2 , and _B2 . The R, G, B ₁ , R ₂ , G ₂ , B ₂ phosphors of each picture element emit light from the R ₁ , G ₁ , B ₁ , R ₂ ,
Each picture element is controlled by the G and _B2 video signals, and each picture element is displayed by emitting light according to the input video signal. This control is performed simultaneously for 180 sets (2 picture elements each) for one line, and an image of 360 picture elements per line is displayed, and an additional 240 picture elements are displayed.
This is performed sequentially for the minute lines starting from the upper line, and one image is displayed on the screen 9.

The above operations are repeated for each field of the input television signal, and as a result,
The screen 9 is similar to a normal television receiver.
The television footage of the video is shown above.

In the image display device described above, the PWM circuits 37a to 37n shown in _FIG . Built-in amplifier circuit.

The output of this PWM circuit and the horizontal deflection waveform (third
Figure 8 shows the correlation with h, h') in the figure. here,
FIG. 8A shows a PWM signal having a pulse width proportional to the brightness level of the video signal, and the left three pulses in the 1H period indicate the maximum brightness.

Figure 8B shows a pulse (enable pulse, hereinafter referred to as EP) that indicates the period during which the PWM wave is output.
A PWM signal is output only when this EP is "H". In other words, at the fall of this EP, the above
The reset timing of the PWM signal is determined.
Therefore, all outputs of the brightness modulation PWM signals of this system are reset at the same time, and during the "L" period of EP, the PWM waveform A is forcibly set to "L" so that it is not output.

FIG. 8C shows the horizontal deflection output waveform shown at h and h' in FIG. The size of the “L” period of the above EP is designed taking into account the rounding at the rise and fall of this horizontal deflection output waveform, and is approximately
It is around 1μs.

An amplifier circuit as shown in FIG. 9 has been proposed to create the PWM output waveform shown in FIG. 8A. FIG. 9 will be explained. This pulse amplification circuit allows current to flow from the output terminal to the ground point during the high level period of the input pulse V _i , and flows current from the power supply V _cc1 (40V) to the output terminal during the low level period of the input pulse V _i . The configuration is such that a peak current flows from the power supply V _cc1 to the output terminal the moment the input pulse V _i becomes low level. In the figure, 50 and 51 are current amplification transistors that constitute a push-pull circuit, and 58 and 59
60 and 61 are transistors and resistors that constitute the emitter input circuit, 55 and 62 are transistors and resistors that constitute the emitter follower circuit, and as shown in FIG. An output pulse V _e55 obtained by inverting the input pulse V _i is obtained at the emitter. 53, 63, and 64 are capacitors, diodes, and resistors that constitute a differential circuit, and are inserted between the emitter follower transistor 55 and the base of the switching transistor 52, so that the base of the transistor 52 has an output voltage. Differential pulse generated at the rising edge of pulse V _e55 , that is, at the falling edge of input pulse V _i
V _b52 is added. The switching transistor 52 is conductive during this differential pulse, and a current I _c52 flows through its collector at this moment. 56 and 6
Reference numeral 7 denotes a transistor and a resistor that constitute an inverting amplifier circuit. A current of I ₆₆ flows through the resistor 66 connected to the emitter of the transistor 56, and therefore I _c52 and I ₆₆ are added to the collector of the transistor 56. However, a current I _c56 flows. This current is amplified through transistors 50 and 57 and supplied to the output terminal. On the other hand, the input pulse V _i is applied to the transistors 68 and 51 via an emitter input circuit composed of a transistor 54 and a resistor 69, and current flows from the output terminal to the ground point during the high level period of the input pulse V _i . As a result, an output voltage V ₀ as shown in FIG. 10H can be obtained at the output terminal.

However, this circuit has the following problems. FIG. 11 shows the relationship between the input pulse V _i , the EP pulse, and the output pulse V ₀ .
Here, FIG. 11C is an output pulse corresponding to X in FIG. 8A, and is an ideal output waveform. However, in reality, the output pulse waveform becomes a distorted waveform as shown in FIG. 11D. Also, even if the peak value of this PWM output pulse waveform decreases, E remains in the ON state as a control electrode (not completely).
It shows the range. The range of E is approximately 30V in this system. In the waveform shown in FIG. 11D, the luminance level and signal modulation did not correspond as described above, which caused a serious problem in terms of visibility. Solving this problem by improving the circuit shown in FIG. 9 to make the fall of the output pulse V ₀ more rapid is not a good idea in terms of power and packaging since there are 180 outputs.

OBJECTS OF THE INVENTION The present invention solves the above problems, and aims to provide an image display device in which the brightness level of a video signal and signal modulation correspond accurately.

Structure of the Invention The present invention applies a pulse to a focusing electrode in synchronization with the off-timing of an output pulse signal which is pulse width modulated of a video signal applied to a control electrode, thereby forcibly directing an electron beam to the focusing electrode. By preventing more light from passing through, an OFF state of signal modulation is created, and as a result, an output pulse that equivalently corresponds accurately to the luminance level can be applied to the control electrode.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. 12 and 13. This example is an example in which the present invention is applied to a horizontal focusing electrode, in which the voltage (V _B = approximately 0V) applied to the horizontal focusing electrode 6 is lowered to, for example, -30V during the period when the EP pulse is applied. , the electron beam is not allowed to pass through from this horizontal focusing electrode 6 onward. In this embodiment, a 6H pulse generated by the deflection pulse generation circuit 42 is used as the EP pulse. In Figure 12, 100 is EP
In the pulse amplification circuit, the emitter follower circuit includes a transistor 70 and a resistor 71, a transistor 72 and a resistor 79, a transistor 76, a resistor 73 that determines the base potential of the transistor 72, a diode 74, and the emitter of the transistor 70. It is composed of a capacitor 75 connecting the base of a transistor 72, base resistors 77 and 78, and an inverter 80. When the EP pulse shown in FIG. 13B is applied, transistor 70 becomes conductive via inverter 80, transistors 72 and 76 become conductive, and the -30V output pulse shown in FIG. 13D is applied to the collector of transistor 76. is output. That is, although a normal voltage (V _B = approximately 0V) is applied to the horizontal focusing electrode 6,
While this EP pulse is being applied, a voltage of -30V is applied to the horizontal focusing electrode 6 to prevent the electron beam from passing through the horizontal focusing electrode. Only one circuit 100 needs to be installed, so the power consumption is small, and sufficient characteristics can be obtained by increasing the power (300 mW). FIG. 13E shows the period during which the phosphor on the screen 9 emits light, the broken line portion is the unnecessary period that occurs conventionally, and the diagonal line portion is the period obtained by adopting the present configuration.

Note that in the above example, the amplified EP pulse is applied to the horizontal focusing electrode, but the present invention is not limited to this, and it may be applied to the vertical focusing electrode.

In this way, when performing signal modulation with PWM, the set timing (off → on) uses the conventional rising edge shown in Figure 8, and the reset timing (on → off) is changed using the pulse of this device (see Figure 12). By performing step D), the passage of the electron beam is controlled and brightness modulation is performed.

Effects of the Invention As described above, according to the present invention, the following effects can be obtained.

(1) The brightness change corresponds to the input signal modulation pulse width, resulting in correct visual characteristics.

(2) Since the characteristics of the conventional signal modulation circuit can be relaxed until the fall falls by about 30V in about 1μs, the power consumption can be reduced.

[Brief explanation of the drawing]

FIG. 1 is an exploded perspective view of an image display element used in an image display device according to an embodiment of the present invention, and FIG.
The figure is an enlarged view of the fluorescent surface of the image display element, FIG. 3 is a block diagram of a drive circuit devised prior to the present invention to drive the image display element, and FIGS. Figures 6 and 7 are waveform diagrams of each part to explain the operation of the drive circuit, and Figure 8 is a waveform diagram of each part.
A waveform diagram showing the correlation between the PWM output waveform and the horizontal deflection output waveform, Figure 9 is a circuit diagram of a pulse amplification device included in the PWM circuit, and Figure 10 is a waveform diagram for explaining the operation of the circuit in Figure 9. 11 is a waveform diagram explaining the problem of the circuit in FIG. 9, FIG. 12 is a circuit diagram of the main part of an image display device in an embodiment of the present invention, and FIG. 13 is a diagram explaining the operation of FIG. 12. FIG. 2, 2 I to 2 Y... Line cathode, 4... Vertical deflection electrode, 5... Beam flow control electrode, 7... Horizontal deflection electrode, 9... Screen plate, 10... Slit, 2
0... Fluorescent body, 23... Input terminal, 24... Synchronization separation circuit, 25... Vertical deflection counter, 26
...Line cathode drive circuit, 27...Memory, 28...
Horizontal deflection counter, 29... Memory, 30...
...Color demodulation circuit, 31a-31n...Sample hold circuit, 32a-32n...Memory, 33...
Reference clock oscillator, 34...Sampling pulse generation circuit, 35a-35n...Switching circuit, 36...Switching pulse generation circuit, 37
a to 37n...PWM circuit, 38...D/A converter, 39...D/A converter, 40...Vertical deflection drive circuit, 41...Horizontal deflection drive circuit, 42...Deflection pulse generation circuit , 100...EP pulse amplification circuit.

Claims (1)

[Claims] 1. A screen coated with a phosphor that emits light when irradiated with an electron beam; an electron beam source that generates an electron beam for each vertical division of the screen on the screen;
a horizontal separation means for separating the electron beam generated by the electron beam source into each horizontal section of the screen, and irradiating the electron beam onto the screen; A deflection electrode that deflects the electron beam in multiple steps vertically and horizontally between An image display element is provided, which has a signal electrode for controlling the amount of light emitted by the phosphor, a focusing electrode for controlling the size of light emitted by the electron beam on the phosphor surface in each pixel, and a back electrode for controlling the amount of the electron beam generated. ,
An enable pulse generation circuit that indicates the off timing of the PWM pulse signal applied to the signal electrode (brightness becomes 0) and the on timing of the PWM pulse signal when the brightness is maximum, and amplifies the enable pulse to a predetermined voltage. 1. An image display device comprising: an amplifier for applying an output pulse of the amplifier to the focusing electrode to forcibly prevent the electron beam from passing through the focusing electrode during this period.