JPH03288206A - Programmable controller - Google Patents

Abstract

PURPOSE:To set plural arithmetic stop addresses without complicating the hardware by updating the arithmetic stop address set to an arithmetic stop register during execution of a sequence program. CONSTITUTION:An arithmetic stop point memory 9 stores plural arithmetic stop points which serve as the addresses where the stop of execution is desired for a sequence program. Then an arithmetic stop point address setting means 2 selects one of arithmetic stop points stored in the memory 9 and sets it to an arithmetic stop register 8 as an arithmetic stop address. Thus an arithmetic stop point is selected in accordance with execution of a branch instruction and set to the register 8 as an arithmetic stop address despite the presence of such a branch instruction like a JMP instruction contained in the sequence program. As a result, plural arithmetic stop addresses can be set without complicating the hardware.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a programmable controller, and more particularly to a programmable controller with improved operability in debugging work and the like.

[Prior Art] FIG. 4 is a block diagram of an example of a conventional programmable controller.

In this programmable controller (51), (
2) is a CPU, (3) is a sequence logic operation unit that executes a sequence program, and (54) is a system ROM that stores operations performed by the CPU.

(5) is an arithmetic memory for temporarily storing the arithmetic results of the CPU, (6) is an external interface, (7) is a sequence program memory, and (8) is an arithmetic stop register for setting an arithmetic stop address.

Next, the operation will be explained.

There are two methods of operating the programmable controller (51): normal operation and partial operation.

In normal operation, instructions are executed in order from address 0 of the sequence program stored in the sequence program memory (7), and when the instructions are executed up to the END instruction, the execution order returns to address 0. Here, the operating state is checked, and if it is in a stopped state, processing is performed to stop it. Furthermore, if it is in the execution state, the sequence program is repeated from address O to the END command.

Partial operation is a method used in debugging work, etc., in which instructions are executed sequentially from address 1f 0 of the sequence program stored in the sequence program memory (7), but when the execution sequence program address is the operation stop register. When the calculation stop address set in (8) is reached, execution is stopped.

[Problems to be Solved by the Invention] In the partial operation of the conventional programmable controller (51), for example, as shown in FIG. 5(a), a JMP instruction is included in the sequence program of the sequence program memory (7). In this case, as shown in FIG. 5(b), the address N jumped by the execution of the JMP instruction is set as the operation stop address and the operation stop register (8
), there is a problem that the execution of the sequence program will not be stopped.

Therefore, a plurality of operation stop registers (8) are provided so that multiple operation stop addresses can be set, so that even if a JMP instruction is executed, execution of the sequence program is stopped at which operation stop address. is possible.

However, if a plurality of operation stop registers (8) are provided, it is necessary to change the hardware of the sequence logic operation section (3), and there is a problem that the hardware becomes complicated.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a programmable controller that can set a plurality of operation stop addresses without complicating the hardware.

[Means for Solving the Problems] The programmable controller of the present invention is a programmable controller having a function of stopping program execution when a calculation stop address stored in a calculation stop register is reached, which stops execution of a sequence program. A calculation stop point memory that stores a plurality of calculation stop points that are addresses to which the calculation is desired, and one of the plurality of calculation stop points stored in the calculation stop point memory during sequence program execution is selected as the calculation stop address to perform the calculation. The configuration is characterized in that it includes a calculation stop address setting means for setting in the stop register.

[Operation] In the programmable controller of the present invention, the operation stop address setting means selects one of the plurality of operation stop points stored in the operation stop point memory during execution of the sequence program, and sets it as the operation stop address in the operation stop register. Set to .

Therefore, even if a sequence program includes a branch instruction such as a JMP instruction, the calculation stop point corresponding to the execution of the branch instruction is selected and set in the calculation stop register as the calculation stop address, making it reliable. It becomes possible to stop the execution of the sequence program.

[Example] Hereinafter, the present invention will be described in more detail based on the example shown in the drawings. Note that this invention is not limited to this.

FIG. 1 is a block diagram showing a programmable controller (1) according to an embodiment of the present invention.

In this programmable controller (1), (2
) is the CPU, (3) is the sequence logic operation unit, (4) is the system ROM, (5) is the operation memory, (6) is the external interface, (7) is the sequence program memory, and (8) is the operation stop register. , (9) is a calculation stop point memory that stores a plurality of calculation stop points.

Next, the operation will be explained.

As shown in FIG. 3(C), calculation stop points Na and Nb are set in advance in the calculation stop point memory (9).

Further, the sequence program memory (7) stores a sequence program including a JMP instruction as shown in FIG. 3(a).

At the start of execution of the sequence program, as shown in Fig. 3(b)
As shown above, the calculation stop point Na closest to address 0 among the calculation stop points Na and Nb stored in the calculation stop point memory (9) is set in the calculation stop register (8).

As the sequence program progresses and the JMP command is executed, the CPU (2) uses this as an opportunity to perform the processing shown in FIG. 2 in accordance with the procedure stored in the system ROM (4). Next, the processing will be explained.

First, in step (Sl), it is determined whether the operation is normal operation or partial operation. In normal operation, the process ends without any processing, and in partial operation, the process proceeds to step (S2).

At step (S2), the calculation stop point memory (9)
JM from the calculation stop points Na and Nb stored in
Find the calculation stop point Nb that is not smaller than the P destination address Xa and is the closest.

Next, in step (S3), as shown in the lower part of FIG. 3(b), the found calculation stop point Nb is set as the calculation stop address in the calculation stop register (8), and the process ends. .

Through the above processing, execution of the sequence program is stopped at the calculation stop address Nb.

The processing shown in FIG. 2 is triggered by the execution of the JMP command, but since the JMP command is used infrequently, the increase in processing time is not a problem.

Note that the driving method determination in step (Sl) in FIG. 2 is performed by providing a driving method determining flag, setting the driving method determining flag in advance, and checking the driving method determining flag. It's easy to do.

Another example is one in which an area is secured inside the calculation memory (5) and a calculation stop point memory (9) is provided.

In addition, as another example, the start of the calculation stop address setting process as shown in FIG. 2 is not limited to the execution of the JMP instruction, but is also triggered by other branch instructions such as subroutine instructions. can be mentioned.

Furthermore, as another embodiment, the calculation stop points to be used as calculation stop addresses are selected in the order in which they are registered in the calculation stop point memory (9).

[Effects of the Invention] According to the programmable controller of the present invention, the operation stop address set in one operation stop register is updated during execution of the sequence program, so multiple operations can be performed without complicating the hardware. You can now set the calculation stop address. Therefore, the operability of depacking work etc. is improved. Moreover, cost increases can also be avoided.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a programmable controller according to an embodiment of the present invention, FIG. 2 is a flow diagram of calculation stop address setting processing according to the present invention, and FIG. 3(a) is a sequence program memo of the device shown in FIG. 1. Illustrative diagram of JJ, Figure 3 (
b) is an example diagram of the arithmetic stop register of the device in Fig. 1;
Figure (C) is an example diagram of the operation stop point memory of the device in Figure 1, Figure 4 is a block diagram of an example of a conventional programmable controller, and Figure 5 (a) is an illustration of the sequence program memory of the device in Figure 4. An illustrative diagram, FIG. 5(b), is an illustrative diagram of the operation stop register of the apparatus of FIG. 4. In the figure, (1) and (51) are the programmable controller, (2) is the CPU, (3) is the sequence logic operation unit, (7) is the sequence program memory, (8) is the operation stop register, and (9) is the operation stop. It is a point memory. Note that the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. In a programmable controller having a function of stopping execution of a sequence program when reaching a calculation stop address stored in a calculation stop register, the programmable controller comprises: a calculation stop point memory that stores a plurality of calculation stop points; A calculation stop address setting means for selecting one of a plurality of calculation stop points stored in the calculation stop point memory during execution of a sequence program and setting the selected one in the calculation stop register as a calculation stop address. programmable controller.