JPH03286552A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To enable a new configuration of a semiconductor integrated circuit device to be provided and the semiconductor integrated circuit device to be further highly integrated and speeded up by achieving a means for forming a semiconductor circuit element which is dielectrically isolated mutually on an insulator and by achieving a means for making the semiconductor circuit element as a complimentary type semiconductor circuit element. CONSTITUTION:An insulator SiO2 2 is formed on a surface of a Si substrate, Si films 3 and 3' are formed on the insulator, an n-channel MOS FET and a P-channel MOS FET are constituted at each. Then, each element is completely dielectrically isolated by a dielectric film 6. Each element consists of a MOS type FET with gate films 4 and 4' which are made of SiO2, etc., and gate electrodes 5 and 5' and a P-n junction which is in contact with two main surfaces of front and rear surfaces of a semiconductor film is formed on the Si films 3 and 3' which are semiconductor films. The substrate 1 needs not be Si but may be insulators such as SiO2 and Al2O3 and each dielectrically isolated element needs not always be mutually dielectrically isolated element.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor integrated circuit device.

[Prior Art] A semiconductor integrated circuit device is disclosed in USP 791602 by Jack St. Flair Kilby. Tokuko Showa 61-5525
A plurality of circuit elements arranged essentially in a planar manner on a single semiconductor thin plate having a principal front surface and a rear surface, as defined in Paragraph 6, and circuit elements requiring connections to the outside of this thin plate. However, according to the above-mentioned prior art, A semiconductor integrated circuit device includes a plurality of circuit elements on a single semiconductor thin plate having a main surface and a back side, and said plurality of circuit elements are spaced apart from each other in various areas of said thin plate. It is non-limiting that said plurality of circuit elements must each include at least one thin region defined by a bond terminating in said major surface of said sheet. There was an issue.

[Means for Solving the Problems] In order to solve the above problems, the present invention aims to solve the problems of the prior art and provide a newer semiconductor integrated circuit device. Regarding the circuit device, (1) taking means to form semiconductor circuit elements dielectrically separated from each other on an insulator, and (2) taking means to make the semiconductor circuit elements complementary semiconductor circuit elements, as described in paragraph 1. These are things to do with semiconductor integrated circuit devices, etc.

[Example] Hereinafter, the present invention will be explained in detail with reference to Examples.

FIG. 1 is a sectional view of a main part of a complementary MO3 integrated circuit device showing one embodiment of the present invention. That is, an insulator 5i022 is formed on the surface of the substrate 1 that is recessed from the Sl, and 81 films and 5' are formed on the insulator, and an n-channel MO8FET and a P-channel MOS FET are formed in each. Each element is completely dielectrically isolated by a dielectric film 6. Each element has a gate film 4 made of 5i02 etc.
and 4', and gate electrodes 5 and 5' to form an MO8 type F
In addition to forming the KT, the Si films 5 and 3', which are semiconductor films, are characterized in that a P-n junction is formed in contact with at least two principal surfaces, the front and back surfaces of the semiconductor film. be.

Note that the substrate 1 does not need to be Sl, but may be 5i02 or At20.
It goes without saying that other insulators, such as No. 3, may be used, and the elements dielectrically separated from each other do not necessarily have to be complementary types.

FIG. 2 is a sectional view of a main part of an inverter circuit element showing another embodiment of the present invention. That is, an insulator made of 510212 is formed on the surface of a substrate 110 made of Si or the like, an S1 film 15 is formed on the insulator, and the Si film 13
In 1, gate films 14 and 14' made of 5i02 or the like,
and an H channel M with gate electrodes 15 and 15'.
The OSFET and the P-channel MOS FET are connected to form an inverter circuit element, and each circuit element is completely dielectrically isolated from each other by a dielectric film 16. In this case, p - The n-junction is the S1 film 13
It is characterized by being in contact with two main surfaces, the front and back.

Although complementary inverter circuit elements are shown in this case as well, it goes without saying that inverter circuit elements using MO3FETs of the same channel may also be used.

Furthermore, it goes without saying that inactive elements such as resistors and capacitors are included as elements which are dielectrically separated and formed independently from each other.

Further, in this example, an MO8 type FET is taken as an example, but a lateral bipolar transistor in which P-Roup P or Rouar junctions are arranged horizontally may also be used.

Furthermore, a P-le junction is formed horizontally as a diode element,
Needless to say, those independently dielectrically separated also fall within the scope of the present invention.

[Effects of the Invention] According to the present invention, the semiconductor integrated circuit device can be used not only when the p-n junction is in contact with one main surface of the 81 thin plate, but also when the p-n junction is in contact with the double surface of the Si thin plate and completely dielectrically separated. This makes it possible to integrate integrated circuit elements, providing a new lateral limit for semiconductor integrated circuit devices, and also has the effect of making it possible to further increase the integration and speed of semiconductor integrated circuit devices. .

[Brief explanation of the drawing]

1 and 2 are cross-sectional views of essential parts of a semiconductor integrated circuit device showing an embodiment of the present invention. 111...Substrate 2.12...S work 02 5.5', 15...S1 film 4.4', 14.14'...Gate Membrane 5, 5'
, 15, 15'... Gate electrode 6.16
・・・・・・Dielectric film

Claims (2)

[Claims] (1) A semiconductor integrated circuit device comprising semiconductor circuit elements dielectrically separated from each other formed on an insulator. (2) The semiconductor integrated circuit device according to item 1, wherein the semiconductor circuit element is a complementary semiconductor circuit element.