JPH03283485A - Hybrid integrated circuit - Google Patents

Hybrid integrated circuit

Info

Publication number
JPH03283485A
JPH03283485A JP8276390A JP8276390A JPH03283485A JP H03283485 A JPH03283485 A JP H03283485A JP 8276390 A JP8276390 A JP 8276390A JP 8276390 A JP8276390 A JP 8276390A JP H03283485 A JPH03283485 A JP H03283485A
Authority
JP
Japan
Prior art keywords
circuit board
ics
flat package
flexible printed
hybrid integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8276390A
Other languages
Japanese (ja)
Inventor
Takeo Ozawa
小沢　丈夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP8276390A priority Critical patent/JPH03283485A/en
Publication of JPH03283485A publication Critical patent/JPH03283485A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components

Abstract

PURPOSE:To improve a hybrid integrated circuit in component mounting density by a method wherein ICs, chip components, and the like are mounted on a flexible printed board and connected, and the circuit concerned is connected to a circuit board as it is bent. CONSTITUTION:A flexible printed board 1 mounted with eight flat package ICs 2 is mounted on the front and the rear of a circuit board 3 and connected to it respectively. The flexible printed board 1 is so bent as to enable its bent sides mounted with the flat package ICs to confront each other. Therefore, eight flat package ICs can be mounted on an area as large as an area where four ICs are mounted. Therefore, sixteen flat package ICs can be totally mounted on the front and the rear of the circuit board 3 equal to an area which is occupied by four flat package ICs. Furthermore, a hybrid integrated circuit board is connected to the outside through a lead terminal 4 provided to the end of the circuit board 3.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は混成集積回路、特に複数個の表面実装部品が搭
載されてなる混成集積回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a hybrid integrated circuit, and particularly to a hybrid integrated circuit in which a plurality of surface mount components are mounted.

〔従来の技術〕[Conventional technology]

近年、電子機器の小型化、高機能化の著しい進展に伴な
い、それに用いられる混成集積回路についても、小型化
、高機能化が強く要求されてきている。このような要求
に対し、厚膜印刷基板等の回路基板上に、チップ部品や
フラットパッケージＩＣ等の表面実装部品を高密度に搭
載した混成集積回路で対処している。2. Description of the Related Art In recent years, with the remarkable progress in miniaturization and higher functionality of electronic devices, there has been a strong demand for smaller size and higher functionality of hybrid integrated circuits used therein. These demands have been met by hybrid integrated circuits in which surface-mounted components such as chip components and flat package ICs are mounted at high density on a circuit board such as a thick film printed circuit board.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の混成集積回路は、回路基板上に表面実装
部品が搭載されているが、回路の高機能化あるいは大容
量化に伴なって、搭載部品、特にフラットパッケージＩ
Ｃの数が増大し、それと共に実装面積も増大している。In the conventional hybrid integrated circuit described above, surface-mounted components are mounted on the circuit board, but as circuits become more sophisticated or have larger capacities, mounted components, especially flat package I
The number of Cs is increasing, and the mounting area is also increasing accordingly.

例えば、５１２ｋｂのＳＲＡＭモジュールを２５６ｋｂ
のＳＲＡＭで構成する場合、従来の混成集積回路では両
面実装を行っても、２５６ｋｂのＳＲＡＭ　　ＩＣ８個
部分の面積が必要となる。したがって、大型化を避ける
ため、搭載部品数の増大に伴なう実装面積の増大を防ぐ
何らかの対策が強く望まれている。For example, convert a 512kb SRAM module into a 256kb
When configured with SRAMs, a conventional hybrid integrated circuit requires an area equivalent to eight 256 kb SRAM ICs even if double-sided mounting is performed. Therefore, in order to avoid an increase in size, there is a strong desire for some measure to prevent an increase in the mounting area due to an increase in the number of mounted components.

〔課題を解決するための手段〕[Means to solve the problem]

上記課題に対し本発明では、ＩＣかチップ部品などの搭
載部品をフレキシブルプリント基板に搭載し、さらにこ
のフレキシブルプリント基板を折曲げた状態で回路基板
に搭載接続している。In order to solve the above problems, the present invention mounts components such as ICs or chip components on a flexible printed circuit board, and further mounts and connects the flexible printed circuit board to the circuit board in a bent state.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図は本発明の一実施例の側面図である。第１図にお
いて、フラットパッケージＩＣ２が８個搭載接続された
一枚のフレキシブルプリント基板ｌが、回転基板３の表
裏両面にそれぞれ搭載接続されている。フレキシブルプ
リント基板１は、フラットパッケージＩＣ２が搭載され
た側を内側にして折り曲げられているので、フラットパ
ッケージＩＣ２のほぼ４個分の面積に８個のフラットパ
ッケージＩＣが実装されている。したがって、回路基板
３０表裏両面では合計１６個のフラットパッケージＩＣ
が、４個分の面積内に実装されていることになる。なお
、外部との接続は回路基板３の端部に取り付けられたリ
ード端子４によって行われる。FIG. 1 is a side view of one embodiment of the present invention. In FIG. 1, one flexible printed circuit board 1 on which eight flat package ICs 2 are mounted and connected is mounted and connected on both the front and back surfaces of a rotary board 3, respectively. Since the flexible printed circuit board 1 is bent with the side on which the flat package ICs 2 are mounted facing inward, eight flat package ICs are mounted in an area equivalent to approximately four flat package ICs 2. Therefore, there are a total of 16 flat package ICs on both the front and back sides of the circuit board 30.
is implemented within the area of four pieces. Incidentally, connection with the outside is performed by lead terminals 4 attached to the ends of the circuit board 3.

また、上記実旅例では、フレキシブルプリント基板の搭
載部品としてフラットパッケージＩＣの例を示したが、
本発明はこれに限定されず、他のパッケージのＩＣまた
はチップ部品などをフレキシブルプリント基板の搭載部
品とすることができるのはいうまでもない。In addition, in the above actual journey example, a flat package IC was shown as a component mounted on a flexible printed circuit board, but
It goes without saying that the present invention is not limited to this, and that ICs or chip components in other packages can be used as components mounted on the flexible printed circuit board.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、ＩＣやチップ部品などが
フレキシブルプリント基板上に搭載接続され、さらに前
記フレキシブルプリント基板が折り曲げられた状態で回
路基板に接続されていることにより、従来に比べ部品実
装密度をさらに高密度化できる効果がある。As explained above, in the present invention, ICs, chip components, etc. are mounted and connected on a flexible printed circuit board, and the flexible printed circuit board is connected to the circuit board in a bent state. This has the effect of further increasing the density.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例の側面図である。 １・・・・・・フレキシブルプリント基板、２・・・・
・・フラットパッケージＩＣ，３・・・・・・回路基板
、４・・・・・・リード端子。FIG. 1 is a side view of one embodiment of the present invention. 1...Flexible printed circuit board, 2...
...Flat package IC, 3...Circuit board, 4...Lead terminal.

Claims (1)

【特許請求の範囲】[Claims] 　ＩＣやチップ部品などがフレキシブルプリント基板上
に搭載接続され、さらに前記フレキシブルプリント基板
が折り曲げられた状態で回路基板に搭載接続されている
ことを特徴とする混成集積回路。A hybrid integrated circuit characterized in that an IC, a chip component, etc. are mounted and connected on a flexible printed circuit board, and the flexible printed circuit board is further mounted and connected to a circuit board in a bent state.
JP8276390A 1990-03-29 1990-03-29 Hybrid integrated circuit Pending JPH03283485A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8276390A JPH03283485A (en) 1990-03-29 1990-03-29 Hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8276390A JPH03283485A (en) 1990-03-29 1990-03-29 Hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPH03283485A true JPH03283485A (en) 1991-12-13

Family

ID=13783484

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8276390A Pending JPH03283485A (en) 1990-03-29 1990-03-29 Hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPH03283485A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001015231A1 (en) * 1999-08-19 2001-03-01 Seiko Epson Corporation Wiring board, semiconductor device, method of manufacturing semiconductor device, circuit board and electronic device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001015231A1 (en) * 1999-08-19 2001-03-01 Seiko Epson Corporation Wiring board, semiconductor device, method of manufacturing semiconductor device, circuit board and electronic device
US6670700B1 (en) 1999-08-19 2003-12-30 Seiko Epson Corporation Interconnect substrate and semiconductor device electronic instrument

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