JPH03283437A - Film carrier tape type semiconductor device - Google Patents
Film carrier tape type semiconductor deviceInfo
- Publication number
- JPH03283437A JPH03283437A JP2082760A JP8276090A JPH03283437A JP H03283437 A JPH03283437 A JP H03283437A JP 2082760 A JP2082760 A JP 2082760A JP 8276090 A JP8276090 A JP 8276090A JP H03283437 A JPH03283437 A JP H03283437A
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- semiconductor chip
- carrier tape
- film carrier
- tape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 48
- 238000000605 extraction Methods 0.000 claims 1
- 239000010408 film Substances 0.000 abstract description 26
- 238000000034 method Methods 0.000 abstract description 6
- 239000011810 insulating material Substances 0.000 abstract description 2
- 239000010409 thin film Substances 0.000 abstract description 2
- 239000011347 resin Substances 0.000 description 11
- 229920005989 resin Polymers 0.000 description 11
- 238000007789 sealing Methods 0.000 description 9
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000011888 foil Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002985 plastic film Substances 0.000 description 1
- 229920006255 plastic film Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明はフィルムキャリアテープ型半導体装置に関し、
特に超薄型構造の半導体装置に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a film carrier tape type semiconductor device,
In particular, it relates to a semiconductor device with an ultra-thin structure.
［従来の技術］
従来実用されるフィルムキャリアテープ型半導体装置は
、樹脂封止前の状態を示す第３図の斜視図から明らかな
ように、半導体チップｌを平坦で均一な厚さをもつ絶縁
性のフィルムキャリアテープ２上に接着剤９で接着し通
常のワイヤボンディング技術を用いてマウントした構造
のものである。ここで、３．４および５は絶縁性フィル
ムキャリアテープ２上に形成される弓出しリードと特性
選別用パッドの金属箔膜およびボンディングワイヤ、ま
た、６および７は同じ（フィルムキャリアテープ２上に
設けられる外部リードボンディング用（ＯＬＢ）スロッ
ト明窓およびスプロケットホールをそれぞれ示す。[Prior Art] As is clear from the perspective view of FIG. 3, which shows the state before resin encapsulation, the film carrier tape type semiconductor device that has been put into practical use in the past has a semiconductor chip l wrapped in a flat and uniformly thick insulating film. It has a structure in which it is bonded onto a plastic film carrier tape 2 with an adhesive 9 and mounted using ordinary wire bonding technology. Here, 3.4 and 5 are the metal foil film and bonding wire of the bowed lead and characteristic selection pad formed on the insulating film carrier tape 2, and 6 and 7 are the same (the metal foil film and bonding wire are formed on the film carrier tape 2). The external lead bonding (OLB) slot bright window and sprocket hole provided are shown, respectively.
［発明が解決しようとする課題］
このように、絶縁性フィルムキャリアテープを使用した
場合は、ビームリード方式を用いるＴＡＢテープの場合
とは違って半導体チップ１に高価な突起電極を設ける必
要がないので、低コストで製造できる有利さはあるが、
その反面マウント工程をワイヤボンディング方式によつ
ているので、薄型の半導体装置が得難いという欠点をも
つ。すなわち、ワイヤボンディング方式によるマウント
工程では、ワイヤループを低く形成した場合、ボンディ
ングワイヤ５は半導体チップｌとの間にエツジタッチを
起こすので、ループ高には成る程度の高さが必要となり
、加えてボンディングワイヤ５の機械的破損を防ぐため
可及的厚めに樹脂封止する必要が生じるので、半導体装
置は第４図のように極めて原型のものとなる。ここで、
８はボッティング封止樹脂材である。[Problems to be Solved by the Invention] As described above, when an insulating film carrier tape is used, there is no need to provide expensive protruding electrodes on the semiconductor chip 1, unlike in the case of a TAB tape that uses a beam lead method. Therefore, it has the advantage of being able to be manufactured at low cost, but
On the other hand, since the mounting process is based on a wire bonding method, it has the disadvantage that it is difficult to obtain a thin semiconductor device. That is, in the mounting process using the wire bonding method, if the wire loop is formed low, the bonding wire 5 will cause edge touch with the semiconductor chip l, so the loop height must be high enough, and in addition, the bonding In order to prevent the wires 5 from being mechanically damaged, it is necessary to seal them with resin as thickly as possible, so the semiconductor device is extremely original as shown in FIG. here,
8 is a botting sealing resin material.
本発明の目的は、上記の情況に鑑み、ボンディングワイ
ヤのループ高がもたらす薄型化への障害を解決したフィ
ルムキャリアテープ型半導体装置を提供することである
。SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to provide a film carrier tape type semiconductor device that solves the problem of thinning caused by the loop height of bonding wires.
本発明によれば、フィルムキャリアテープ型半導体装置
は、引出しリード形成面と半導体チップを収容する半導
体チップ載置用くぼみとを有する絶縁性フィルムキャリ
アテープと、前記半導体チップ載置用くぼみ内にボンデ
ィングパッド面を前記引出しリード形成面と高さをほぼ
等しくして収容載置される半導体チップと、前記半導体
チップのボンディングパッドと引出しリードとを接続す
る直線状のボンディングワイヤとを含んで構成される。According to the present invention, a film carrier tape type semiconductor device includes an insulating film carrier tape having a drawer lead forming surface and a semiconductor chip mounting recess for accommodating a semiconductor chip, and a bonding film in the semiconductor chip mounting recess. A semiconductor chip that is housed and placed with a pad surface substantially equal in height to the drawing lead forming surface, and a straight bonding wire that connects the bonding pad of the semiconductor chip and the drawing lead. .
［作 用 ］
本発明によれば、フィルムキャリアテープはボンディン
グパッドの高さをテープ上の引出しリード面に揃えてそ
の膜内に半導体チップを収容するので、ワイヤボンディ
ングを従来の如くワイヤループを形成することな（直線
状のボンディングワイヤを用いて行うことができる。従
って、エツジタッチを生じることなき超薄型のフィルム
キャリアテープ型半導体装置を構成し得る。[Function] According to the present invention, since the film carrier tape accommodates the semiconductor chip within the film with the height of the bonding pad aligned with the lead surface on the tape, wire bonding can be performed by forming a wire loop as in the conventional method. This can be done by using a straight bonding wire. Therefore, an ultra-thin film carrier tape type semiconductor device without edge touching can be constructed.
〔実施例］ 次に本発明について図面を参照して詳細に説明する。〔Example] Next, the present invention will be explained in detail with reference to the drawings.
第１図 ｆａ）およびｔｂ＋ は本発明の一実施例のフ
ィルムキャリアテープ型半導体装置の樹脂封止前および
封止後の状態をそれぞれ示す平面図および断面図である
。本実施例によれば、絶縁材（例えばポリイミド）から
なるフィルムキャリアテープ２の裏面には、天井面にワ
イヤボンディング用個別明窓１１を配設した半導体チッ
プ載置用くぼみｌＯが形成され、半導体チップ１がこの
くぼみ１０内にボンディングパッド面をそれぞれ天井面
のワイヤボンディング用個別明窓１１から露出させるよ
うに接着されて収容される。ここで、９は半導体チップ
１の表面をくぼみ１０の天井面に接着する接着剤である
。FIGS. 1 fa) and tb+ are a plan view and a cross-sectional view, respectively, showing the state before and after resin sealing of a film carrier tape type semiconductor device according to an embodiment of the present invention. According to this embodiment, on the back surface of the film carrier tape 2 made of an insulating material (for example, polyimide), a semiconductor chip mounting recess 1O having individual bright windows 11 for wire bonding arranged on the ceiling surface is formed. The chip 1 is housed in the recess 10 by being glued so that its bonding pad surface is exposed through the individual bright windows 11 for wire bonding on the ceiling surface. Here, 9 is an adhesive for bonding the surface of the semiconductor chip 1 to the ceiling surface of the recess 10.
このように、半導体チップ１をキャリアテープ２の膜内
に収容し、ボンディングパッド面の高さがキャリアテー
プ２の表面とほぼ等しくなるように揃えた場合では、ボ
ンディング面と引出しり−ド３との間を従来の如くルー
プを形成することな（はぼ直線状のボンディングワイヤ
５を用いて平坦にボンディング接続することができる。In this way, when the semiconductor chip 1 is accommodated within the film of the carrier tape 2 and the bonding pad surface is aligned so that the height is almost equal to the surface of the carrier tape 2, the bonding surface and the drawer pad 3 are A flat bonding connection can be made using a substantially straight bonding wire 5 (instead of forming a loop as in the conventional case).
従って、ボンディングワイヤ５と半導体チップ１との間
のエツジタッチの恐れは全くなく、また、その機械的強
度も強まるので、封止樹脂量も比較的少量に抑えること
ができる。すなわち、第１図ｆｂｌ に示すように極め
て少量のボッティング封止樹脂材８を用いて封止された
超薄型の半導体装置を得ることができる。Therefore, there is no fear of edge touching between the bonding wire 5 and the semiconductor chip 1, and the mechanical strength thereof is also increased, so that the amount of sealing resin can be kept to a relatively small amount. That is, as shown in FIG. 1 fbl, it is possible to obtain an ultra-thin semiconductor device sealed using a very small amount of the botting sealing resin material 8.
第２図は本発明の他の実施例を示す樹脂封止前の平面図
である。本実施例によれば、半導体チップ載置用くぼみ
１０の天井面に形成されるワイヤボンディング川明窓が
前実施例の個別形状からスロット形状１２に変更される
。この形状をとると金型による打抜きが可能となるので
、製造コストを下げることができる。FIG. 2 is a plan view of another embodiment of the present invention before resin sealing. According to this embodiment, the wire bonding window formed on the ceiling surface of the semiconductor chip mounting recess 10 is changed from the individual shape of the previous embodiment to the slot shape 12. This shape allows punching with a metal mold, thereby reducing manufacturing costs.
以上はいずれも半導体チップ１をキャリアテープ２の裏
面からテープ膜内に収容した場合を示したが、半導体チ
ップ載置用くぼみ１０をキャリアテープ２の表面側から
形成することも可能である。この場合では、半導体チッ
プ１はくぼみ１０の底面に接着されることとなり放熱に
ついてやや不利な面もあるが、半導体チップ１の表面が
完全に開放されているので、ワイヤボンディング作業は
きわめて容易となる。Although the above description shows the case where the semiconductor chip 1 is housed in the tape film from the back side of the carrier tape 2, it is also possible to form the semiconductor chip mounting recess 10 from the front side of the carrier tape 2. In this case, the semiconductor chip 1 is bonded to the bottom of the recess 10, which is somewhat disadvantageous in terms of heat dissipation, but since the surface of the semiconductor chip 1 is completely open, the wire bonding work is extremely easy. .
〔発明の効果］
以上詳細に説明したように、本発明によれば、半導体チ
ップはフィルムキャリアテープに設けられたくぼみ内に
収容され、半導体チップのボンディングパッドとテープ
表面の引出しリードとの間が直線的にワイヤボンディン
グされたフィルムキャリアテープ型半導体装置を構成す
ることができるので、ボンディングワイヤと半導体チッ
プとの間にエツジタッチを生じすることなき超薄型の半
導体装置を提供することが可能である。[Effects of the Invention] As described above in detail, according to the present invention, the semiconductor chip is housed in the recess provided in the film carrier tape, and the gap between the bonding pad of the semiconductor chip and the lead-out lead on the surface of the tape is Since it is possible to configure a film carrier tape type semiconductor device with linear wire bonding, it is possible to provide an ultra-thin semiconductor device without causing edge touch between the bonding wire and the semiconductor chip. .
第１図 （ａ）および（ｂｌは本発明の一実施例のフィ
ルムキャリアテープ型半導体装置の樹脂封止前および封
止後の状態をそれぞれ示す平面図および断面図、第２図
は本発明の他の実施例を示す樹脂封止前の平面図、第３
図および第４図は従来のフィルムキャリアテープ型半導
体装置の樹脂封止前および封止後の状態をそれぞれ示す
斜視図および断面図である。
１・−・半導体チップ、
２・・・絶縁性フィルムキャリアテープ、３・・・引出
しリード、
４−特性選別用パッド、
５・・・ボンディングワイヤ、
６・・・ＯＬＢ用スロット窓、
７・・・スプロケットホール、
８・・・ボッティング封止樹脂材、
９・・・接着剤、
１０・・・半導体チップ載置用くぼみ、１１・・−ワイ
ヤボンディング用個別明窓、１２・・・ワイヤボンディ
ング用スロット明窓。Figure 1 (a) and (bl) are a plan view and a sectional view showing the state before and after resin sealing of a film carrier tape type semiconductor device according to an embodiment of the present invention, respectively; Plan view before resin sealing showing another embodiment, 3rd
This figure and FIG. 4 are a perspective view and a cross-sectional view, respectively, showing the state of a conventional film carrier tape type semiconductor device before and after resin sealing. 1... Semiconductor chip, 2... Insulating film carrier tape, 3... Drawer lead, 4- Characteristic selection pad, 5... Bonding wire, 6... Slot window for OLB, 7... - Sprocket hole, 8... Botting sealing resin material, 9... Adhesive, 10... Semiconductor chip mounting recess, 11... - Individual bright window for wire bonding, 12... Wire bonding Slot bright window.
Claims (1)
チップ載置用くぼみとを有する絶縁性フィルムキャリア
テープと、前記半導体チップ載置用くぼみ内にボンディ
ングパッド面を前記引出しリード形成面と高さをほぼ等
しくして収容載置される半導体チップと、前記半導体チ
ップのボンディングパッドと引出しリードとを接続する
直線状のボンディングワイヤとを含むことを特徴とする
フィルムキャリアテープ型半導体装置。an insulating film carrier tape having a drawer lead forming surface and a semiconductor chip mounting recess for accommodating a semiconductor chip; a bonding pad surface within the semiconductor chip mounting recess having a height substantially equal to the drawer lead forming surface; 1. A film carrier tape type semiconductor device comprising: a semiconductor chip that is accommodated and placed; and a straight bonding wire that connects a bonding pad of the semiconductor chip and an extraction lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2082760A JPH03283437A (en) | 1990-03-29 | 1990-03-29 | Film carrier tape type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2082760A JPH03283437A (en) | 1990-03-29 | 1990-03-29 | Film carrier tape type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03283437A true JPH03283437A (en) | 1991-12-13 |
Family
ID=13783400
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2082760A Pending JPH03283437A (en) | 1990-03-29 | 1990-03-29 | Film carrier tape type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03283437A (en) |
-
1990
- 1990-03-29 JP JP2082760A patent/JPH03283437A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4571320B2 (en) | Semiconductor chip package | |
| JPS63249345A (en) | Flexible mounting substrate | |
| JPH03283437A (en) | Film carrier tape type semiconductor device | |
| JPH02126685A (en) | Solid-state image sensor | |
| JPH0366150A (en) | Semiconductor integrated circuit device | |
| JPH05315540A (en) | Semiconductor device | |
| JPH0429363A (en) | Semiconductor device | |
| JP2687707B2 (en) | Light receiving semiconductor device and assembling method thereof | |
| JPS6288345A (en) | Plastic sealed solid state image sensor | |
| JPH0366152A (en) | Semiconductor integrated circuit module | |
| JPS60129895A (en) | Card type miniature electronic device | |
| JPS6336551A (en) | Semiconductor device | |
| JPH05291479A (en) | Plastic sealed semiconductor device and manufacture thereof | |
| JPS62198142A (en) | Semiconductor device | |
| JPH04142262A (en) | Taping structure for semiconductor device | |
| JPH0218097A (en) | Semiconductor device card | |
| JPH03196648A (en) | Semiconductor device package | |
| JPH0499337A (en) | Manufacture of semiconductor device | |
| JPS62291156A (en) | Hybrid integrated circuit device | |
| JPH0376693A (en) | Ic card | |
| JPH04174548A (en) | Lead frame | |
| JPH046842A (en) | Mounting structure of semiconductor device | |
| JPS6329560A (en) | Semiconductor device | |
| JPH0529144U (en) | Tab mounting structure | |
| JPH0621111A (en) | Semiconductor device and manufacture thereof |