JPH03278367A - Disk device - Google Patents

Abstract

PURPOSE:To reduce power consumption by providing a light emitting element and a light receiving element to detect a specific track optically, a switch connected to the power source line of the light emitting element to emit the light of the light emitting element selectively, and a switch control circuit to control the switch in a turned on state for prescribed time replying to the application of a power source. CONSTITUTION:A light emitting diode 19 for track zero detection and a light emitting diode 21 for write prohibition detection are connected not only to the power source but to a power source circuit via a transistor 39 as the switch. In other words, two light emitting diodes 19, 21 are connected in series, and the anode of the diode is connected to the power source line 40 of +5V, and the transistor 39 is connected between the cathode and the ground. Currents flow on the light emitting diodes 19, 21 only in a period when the transistor 39 is turned on via a delay circuit 48 and an OR gate 47, etc., based on the output of a power source-on detection circuit 43. In such a manner, remarkable power saving can be attained in the light emitting diodes 19, 21 and phototransistors 20, 22.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a disk device for recording or reproducing information using a floppy disk (flexible magnetic disk) or a similar disk.

A conventional magnetic disk device includes a disk rotation mechanism, a magnetic head (transducer), and a head movement mechanism. The head moving mechanism generally consists of a stepping motor that responds to a step signal, and a rotation-linear conversion mechanism that obtains linear motion corresponding to the rotational motion of this motor, and moves the head in the radial direction of the disk (cross-track direction). configured to be moved.

In this type of magnetic disk device, seek is performed using a specific track called track zero as a reference. For this reason,
A track zero sensor consisting of a light emitting element and a light receiving element is provided. By the way, in the conventional device, since the light emitting element for optical detection emits light throughout the period of use of the disk device, power consumption inevitably increases.

OBJECT OF THE INVENTION Therefore, an object of the present invention is to provide a disk device that can save power.

Structure of the Invention To achieve the above object, the present invention provides a disk rotation mechanism for rotating a disk having a plurality of tracks;
a converter for converting information between the disks while the disk is rotating; a converter moving mechanism for moving the converter in a direction across tracks of the disk; and a converter selected from the plurality of tracks. a light-shielding body for detecting a specific track provided on the converter moving mechanism for detecting that the converter is located on a specific track; a light emitting element for optically detecting the specific track; A light receiving element, a switch connected to a power line of the light emitting element to selectively cause the light emitting element to emit light, and a switch control circuit that controls the switch to be in an on state for a predetermined period of time in response to power on. The present invention relates to a disk device characterized by the following.

Effects of the Invention According to the above invention, since the II power line switch of the light emitting element is connected and selectively turned on at 5K, it is possible to save a large amount of power.

Embodiment Next, a magnetic disk device according to an embodiment of the present invention will be described with reference to FIGS. 1 to 7.

Figure 1 and Figure 2 show the M type used in this magnetic disk device.
i disk cartridge tt + yt indicates 0 sigma cartridge + 1 IGX, - jlf is also called a micro floppy disk, and a recording medium disk (2) with a diameter of 86 m + η is housed in a rigid synthetic resin case f3J. It consists of 1. Case(
There is no opening +61 (71) for inserting the throat into both the front side fJ and the back side (5) of 31. When not in use, this opening +61 (7+ is closed by a sliding shutter (81). In Fig. 1, the shutter (8) is biased by a spring (not shown) toward the stone knife, and when in use, it is moved to the left against this biasing force.
) can be opened by pressing this side.

Konosho example disc cartridge + 11 disc L
2+ consists of a magnetic sheet (2a) and a knob (2b) made of a magnetic fully elliptical plate attached to the center of the magnetic sheet (2a).Since the disk (2) is not rotated by pressing it with a clamper, the case ( An opening 00) for rotational driving is provided only on the back surface (5) of 3), from which the knob (2b) is exposed. This hub (2b) has a length for inserting the spindle (
2C) and a drive bottle insertion hole (2d). (9) is the detection area for detection of honor, and there is a window (9a) that is in the light filtering state when writing is prohibited, and a window (9a) when writing is prohibited (when recording is possible). 3i (9b) for closing the lid (9a).The lid (9b) is formed in a sliding manner so that it can be opened and closed at will.

The main part of the disk device 5al for recording and reproducing data using the cartridge (1) shown in FIGS. 1 and 2 is constructed as shown in FIG. In this 31st JJ, the 1st turntable 0υ is a rotating device that rotates the disk (2) inside the case t31 of the cartridge il+ loaded in a predetermined position, and the tombstone (Fig. (not shown), a spindle (not shown) inserted into the hole (2C), and an ItA moving bottle (not shown) inserted into the hole (2d).
etc. are included. 0 is an outer rotor type motor directly connected to the rotary table 0υ. a: i A41 is a recording/reproducing reef air head in exchange for a carriage (15
It is attached to I and is movably guided in the radial direction of the disk i2+. O mark is a stepping motor that constitutes the head moving mechanism, and drives the carriage α via a known rotation-direction conversion mechanism On consisting of an α-wound steel belt, a binion and a rack, or a kXIJ-toss screw. Out.

This is a light-shielding plate for detecting the track zero position of 0 & head Q31 Q41, and is integrated into the carriage a. α The light-emitting diode for detecting the track zero position of E Q41 is a phototransistor. The optical input of the phototransistor is
It is cut off corresponding to the track zero position of 41.

c! Reference numeral 11 is a light emitting diode for detecting the prevention of carbon filtration (file protection);
E is arranged corresponding to the window (9a) in the regular position. The water for detecting write-protection is filled with a transistor, and the window (9a) is arranged corresponding to K, and receives the source of the light emitting diode tjll when the window (9a) is open.

It uses a light emitting diode to detect disc loading.

Cart 1 notch il+ is in the normal loading position (・tesono-
The phototransistor placed so as to be on the 10th side (・ru.c74) is a phototransistor for detecting the loading of a disk, and when the cartridge (1) is loaded, the cartridge fi+ ff1i is placed on the other side of the .

C) 51 is the rotation detector of Deinuk+21, which detects the light reflection index booklet indicator (271) attached to the surface of the rotor Q1i+ of the outer rotor type motor Q force that rotates together with the disk (2) and the rotary table 0υ. It is equipped with a light emitting diode and a phototransistor to detect the rotational angular position and rotational speed of the disk (2).

C! AH is a ready detection circuit, and based on the output of circumferential rotation detector 4, it is determined that the disk +21 has reached 90% or more of its normal speed and that one leg time (for example, 420 m5) has passed since the start of rotation. Based on that (・te lady'$,
This outputs a signal indicating that the recording/reproducing state has been reached (ready for recording/reproduction).

FIG. 4 shows the stepping motor αe of FIG. 3 and its driving circuit. The stepping motor ■ has the phase winding ci
u, second phase volume #! pus, of the third phase winding, and of the fourth phase winding (
It is a stepping motor with a four-phase configuration having
37+ [381] Is the rotor (not shown) controlled by sequential on/off control using the phase excitation method? : Only a certain angle is important.

FIG. 5 shows an electric circuit portion of the electric disk device of FIG. As is clear from FIG. 5, the light-emitting diode H for detecting track zero and the light-emitting diode C! for detecting compliment inhibition. 11 is not simply connected to the power supply, but is connected to the power supply circuit by means of a transistor 61 as a switch according to the invention. That is, two light emitting diodes (19
21+ are connected in series with each other, the anode is connected to the +5V power supply line, and the transistor G39 is connected between the 77 node and the ground. Therefore, the light emitting diode is activated only when the transistor 31 is on. CI'
lI C/IJ K current flows.

Next, the control circuit of the transistor C in FIG.
This will be explained with reference to Figure 6 and Figure 7. +12V power supply terminal 1 and +5V power supply terminal +4 of this whole disk device
The power-on detection circuit (4) connected to 2 and 4 uses a voltage comparator to detect that power is supplied to the power supply terminal Cυ and the power supply voltage has reached a certain value (for example, 70 to 80% of the normal voltage). , and detects that the voltage on the +5V power supply terminal has reached a certain value (70 to 80% of the normal voltage),
1. of +12V and +5V (Figure 6 CA) when both deviations are detected. It sends out a high-level power-on signal as shown at the time point.

The first timer 1441 connected to the output of this power-on detection circuit generates a high-level pulse of uT, = 12 ms in response to the power-on detection signal changing to a high level at time h11, as shown in FIG. It is sent as shown in the figure below. The output of this timer is supplied to the stepper motor control drive circuit, and only when the power is turned on, the stepper motor Q6
iχ is used for multiphase excitation. The output of timer t441 is connected to the first input terminal of the first OR gate area. The output of this first OR gate song is the output of the second OR gate song.
It is connected to the 10,000 input terminal of the second OR gate) f471 and to the other input terminal of the second OR gate) 1471 via a 100 μs delay circuit f481. The output of the second OR gate 1471 is connected to the base of transistor 4 via an amplifier 141'. Therefore, when the output of the timer circle becomes high level in the period t1 to t1 as shown in Figure 6 (■), the output of the first OR gate decoy also becomes high level as shown in Figure 6 (■), and eventually the transistor 39 is turned on.

The stepping motor control drive circuit (SAMURAI) receives a step signal from line 60 and a step direction signal from line 511 to control the stepping motor α.
It includes a well-known circuit for distributing step pulses so as to drive transistors 4 to 4 shown in FIG. 4 in a phase excitation system.

In addition, this control drive circuit (451) generates a signal to turn on the first phase transistor c+s'v shown in FIG. 4 in response to a high-level power-on detection signal obtained from the power-on detection circuit 143. This device has a head αJ (14
The track zero position of track 1 is configured to correspond to the first phase winding 1IC (11).
By supplying a working current to r311, the head (1
31041'i') It becomes possible to hold the rack at the zero position.

Note that if track zero is not detected by the light emitting diode α9 and the phototransistor (to), a step pulse is generated to move the head to track zero.

By the way, the detection error due to one light emitting diode α9 and the phototransistor (a) is about two track pitches, so
Head Q31 (141 is track 1 other than track zero)
Or even 2 to 6 track zero detection signals may be generated. If the head a'a Q41 is on track 1, the rotor of the stepping motor σe is on the second track.
If the phase winding is 32K 6, the first phase winding is 3υ when the power is turned on.
By flowing the excitation current, the rotor is connected to the first phase winding 3υ
However, when the rotor is in the third phase winding (G), even if the excitation current is applied to the first phase winding 6D, the rotor will not move. Therefore, in this embodiment, the control drive circuit 1 is activated in response to the output pulse of the timer circle.
The four beaks are configured to pass current to the second phase winding 3z of the stepping motor α6j as a current J5.

Thereby, even if the rotor is located in the third phase winding, it can escape from there. In addition, while exciting the first phase, t1 to t,
The rotor may be pulled out of the third phase by passing a current through it.

Further, the current may be passed through the first phase winding example from t.

Stepping motor control #drive times 11i! i+4! The line 62 derived from # supplies the same first phase excitation signal to the first input terminal of the AND gate ■ when the first phase transistor □□□ in FIG. 4 is turned on. +5310) The step direction signal line C511 is connected to the second input terminal, and the output terminal of the retrigger monostable multivibrator f54i is connected to the third input terminal.

The input terminal of the retrigger monostable multivibrator C is connected to a first timer circle and a step signal line 6Q. Therefore, this retrigger monostable multivibrator 64I is triggered in response to the trailing edge of the timer output pulse of FIG.
t, as shown in Figure CF, l.

A high-level chemical pulse is generated during the ~t1 period (Tz depth 50 m5), and in response to the trailing edge of each step pulse of tlJ~t, 4 shown in FIG. A high level output is generated at 5.The step pulse is 5.
Since it is sufficiently shorter than 0 m5, it is triggered at a circle of 50 m5 or more, and Ts
= 11 after 50 ms. I was able to perform at a high level until the 11th stage of KP1! 3 (Ts = T+ + 'L
= 62 mS), the two light emitting diodes 0!110 emit light, and track zero detection becomes possible.

The emitter of the phototransistor 00 is connected to ground, and the +V bias power supply is connected to the collector with resistor 6.
51 houses) are connected to each other. Follow me.

e)) When the transistor Q21 has an optical input, the respective collector lines C'i71581 become low level.

If the light-shielding plate 0 is located between the light-emitting diode α9 and the phototransistor in response to the track zero position of the head [13+ (+41), even if the light-emitting diode α sickle is emitting light, the photo When there is no light input from the transistor (2tli), the collector line f571 of the transistor becomes high level.

Therefore, even though the 5 light emitting diode α9 is emitting light, the phototransistor (2010) collector line 6D
It becomes power.

In this disk device, the phase winding excitation signal is obtained on the line r52 in synchronization with power-on, and the line: yci1
+vr=ra, a signal indicating a step-out shown in Figure 6 (C), that is, a high-level signal necessary to drive the head 0 & α4J toward track zero, is obtained.The step-out signal when the power is turned on is generated by a controller (not shown). of·
Supplied from -10,000, the retrigger monostable multivibrator 64I responds to the output of the timer circle and generates a high level -(rus) in the period 12 to ts (T, = ms). Therefore, in the period t to t1, , AND gate (all inputs of 5J become high level, and its output also becomes high level. As a result, the first OR gate) 14b1 output becomes uO<t2~t as shown in FIG. As a result, the transistor G'J is turned on. Based on this high level, it can be detected that the head [1:lN [141] is at track zero.

On the other hand, when the cartridge il+ is loaded, 2
If light is input to the photodiode during the light emitting period of the light emitting diode, its collector line (2) will be at a low level, indicating that this is a cartridge that cannot be soaked. In other words, 'jIir is prohibited from being read.

It turns out that the window (9a) is closed with the lid (9b).

Five AND gates 691 [01EI Ei2 L:'A
, two NOT circuits fi41 E5+, and two RS
Flip-flops (661 holes are provided).

One input terminal of the AND gate 69 is connected to the collector line port, and the other input terminal is connected to the output terminal of the AND gate string 3). By the way, AND gate +b
:i's 10,000 input terminals are connected to the output terminal of the delay circuit (481), and the other input terminal is connected to the output terminal of the OR gate 1461 (. Therefore, as shown in FIG. Goo 1 - As shown in K61 to M.

A high level output is obtained during the period t, ~t, and the delay circuit (
When a high level output is not obtained during the period from 481 to
A high level output is obtained during the period from '+d to t1 shown in i. - 10,000, from the OR gate penalty, as shown in Figure 7 (0)
1. A high level output is obtained during the period of ~I3d.

As a result, the period 1 during which one light emitting diode α912D is driven to emit light is 1. ~"The high level period of the AND gate 63 is shorter than sd. If it is installed in this way, even if there is a delay in the rise of light emission of one light emitting diode Q91Ul+, a complete light emission period will be achieved between t+d and t. , track zero detection and write inhibit detection can be performed.

Now, 11~t in Figure 6! If the track zero detection water)) transistor (2ω output line mark becomes high level during the period and track zero of the head is detected, AND
The gate 69) is '+d~t shown in FIG.

At 53 yen, a high level output signal indicating track zero detection occurs, which is input to the set terminal of the second flip-flop iGl and latched.

The signal indicating track zero detection is the Q of 7 lipfrog 6Q.
Sent from the output terminal. Note that the high-level Q output is not transmitted as is, but is sent out in a low-level format through a NAND gate.
The gate trowel and the NAND gate 69 of the output line of the second flip-flop 6η are used as drive select signal inputs, so only when a high level drive select signal is generated.

The low level output indicating track zero is output from the NAND gate (6
a, and this is sent to the host side device.

In addition, during the period when one light emitting diode α sickle is not emitting light,
Since the output of AND gate 6J is at low level.

Even if the line level becomes high level, AND game) 11
The output of 5!3 is kept at a low level.

The reset terminal of the flip-flop has an AND gate [
The output terminal of the AND gate 60) is connected to the collector line 57'l through the NOT circuit +641y, and the other input terminal is connected to the AND gate 60).
Since it is connected to the output terminal of f63+, AND
When the outputs of the gates and gates are high and the six lines are low, the outputs of the AND gates are high, and the flip-flop (c) is reset. Therefore, if track zero is not detected during the light emission period of one light emitting diode a9, the flip-flop f6al is always reset.

The 10,000 input terminals of the AND gate El in the write inhibit detection circuit are connected to the phototransistor c! through the NOT circuit 65). The other input terminal is connected to the output terminal of the AND gate (631). Therefore, if the collector line 6g becomes low level while the ℃1 light emitting diode Qυ is emitting light, , a high level signal indicating the prohibition of plowing is obtained from the AND gate 6L,
This is supplied to the reset i of flip-flop f[i7) and held. Note that during the period when the light emitting diode CJII is not emitting light, the output of the AND gate E3+ is at a low level, so even if the line 6ε becomes a low level, the output of the AND gate 16i is kept at a low level. When the flip-flop (671) is set, a high level output is obtained from the 5Q output terminal, and a low level inhibit signal is sent to the host side equipment via the NAND gate.The reset terminal marked with the flip-flop The output terminal of AND gate G is connected to
The input terminal of 10,000 is to the line group, the other input terminal is AN
Connected to the output terminal of D gate day (゛ruσ), AN
When the output of the D gate ε3 becomes a high level while the output of the line 6&k becomes a high level, a reset signal is supplied to the flip-flop (6η).

It is necessary to detect whether or not the cartridge is protected against tampering (file protection) at least between loading the DENUK and generating the ready signal. In FIG. 5, σO is a disk loading detection circuit, which includes the light emitting diode and phototransistor shown in FIG. 6 (as shown in PI, this disk loading detection circuit σ0) is formed to cause a high level of damage and chipping.
ms o) The delay circuit συ is for delaying the time t when the fundamental insertion state of 7)-trigger (11) is obtained, and the delay circuit συ of FIG. The second timer ffZ is triggered when the output of the delay circuit CD rises from low level to high level, and outputs a high level pulse vM6c (Tq = 40 ms).
Pressure as shown by JIK, this Otke OR game) t41i
1. Therefore.

During this period t, ~t, one light emitting diode (f1
2] 1 lights up, and write protection and track zero detection are performed.

σ is an RS flip-flop, which is set by the output to the disk loading detection circuit and reset by the high-level ready detection signal of FIG. 6 (Il) obtained from the ready detection circuit 2 shown in FIG. As a result, the Q output of flip-flop σJ is t in FIG.

It becomes high level in the period ~t, and this is the OR gate 641.
becomes the input. The other input of the OR gate σ is connected to the motor-on signal line. As a result, t, shown in FIG. 6CG, is supplied from line σ5.

Subsequent high-level motor-on signal and t6 to t0 period 7
The sum signal with the high level output of lipfrog σ3 is OR
A signal is obtained at the output stage of gate σ4 as shown in FIG. 60. O
The output of the R gate (741) is used to drive the disk rotation motor 0 through the motor drive circuit σe, so the motor 0 rotates during the period 14 to t9 and after the rotation.The disk is loaded at the same time as the disk is loaded. The reason for rotating (2) is to ensure that the disk + 21 is installed securely as soon as possible. Note that when the cartridge (11) is inserted,
Even when the power-on detection signal is obtained in the state where the power-on detection signal is obtained, the disk (2)
It is configured to rotate in Y.

One input terminal of the AND gate σ is connected to the output of the disk loading detection circuit σ, and the other input terminal is connected to the output terminal of the OR gate σJ. Therefore, Fig. 6 (
The output of the AND gate ση is at a high level only during the period when a high-level disk loading detection signal indicated by PI is generated and the output of the OR gate σ4 shown in FIG. 60 is at a high level.

In addition, in the case of the timing chart of FIG. 6, AND
The output state of the gate ση matches the output state of the OR gate σ4 in FIG. The delay circuit I78 is a circuit that delays by 320 mS.

t*F#17 points of 320m5i from point F and t1o
This is to determine the 111th point 320m5 from the point.

A third timer σ9 is connected to the output of the delay circuit σ&.

Time t? at which the output of the delay circuit 6' rises from low level to high level? and tll, a pulse of T, = 100 mS is generated (as shown at the beginning of Figure 6) and is supplied to the OR gate. Therefore, one emitted 4 iodine α'Ill is t, %t, period, and fil -t11
It is lit even during the period. In this way, the reason why the light emitting diode (1!
This is because it is necessary to detect the soiling prohibition state when the rotation of the car) has started and the car) is in a stable state.

As is clear from the above, this embodiment provides the following effects.

t1 to t in Figure 6 1. ~t t, ~1
8. Since only the light emitting diode (19Zll) emits light during the period from 10 to t11.

(Bl t, light emitting diode Q'jf2 in ~1s period
Since Ll is emitted, it is possible to reliably detect track zero when the power is turned on, and to detect the prohibition of filling when a disk is being loaded.

(Not only during the period t, ~t6 after loading the 0 disk.

Since the light emitting diode a■υ emits light even during the period t, ~'He'll'''' to, the write-inhibited state can be reliably detected.

[F] As shown in the period t's to tn, the step direction signal shown in FIG. 6C) is brought to a high level state indicating step-out, and as shown in FIG. 60, the fourth phase φ6. 3rd phase φ1
．． The second phase -8 and the first phase -1 are excited in this order, and the head aa+
Even when moving 041 to the track zero position,
t14-t3. Light emitting diode H21 during the period shown in
1 emits light, so track zero can be detected and latched by the free lag 20 knob (149).

[El Light emitting time of light emitting diode α11211 and
Since the relationship with the time to obtain the set or reset signal from the AND gates 59 to IZ is set as shown in FIG. 7, one light emitting diode Q! j c! Except for the unstable period at the start and end of light emission of D, track zero detection and write inhibit detection can be performed.

) The AND gate & Based on this, the 5-circuit configuration becomes easy.

(G Since the light emitting diode 0!J and &Il are connected in series, the drive circuit is easily turned on.

Variations The present invention is not limited to the above-mentioned implementation 9!1.

In Example 1, the following modification is possible.

(al) Drive circuits for the light emitting diode (+9) and the light emitting diode (+9) are provided independently, and the output of the timer (44I and AND game) 53 is supplied to the drive circuit of the light emitting diode α9, and the drive circuit of the light emitting diode C'll is supplied with the output of the timer (44I and AND game) 53. Even if the outputs of the timer σ and σ9 are supplied, l:(・.

(b) When the track is zero, the original input of the phototransistor may be cut off when no optical input is given to the phototransistor (201, and writing is prohibited in the case).

(cl The output of the timers σ3 and σ9 (・deviation or minus 10,000) can be ORed) and configured to be sent to t4tiJ (・.

Of course, it is also applicable to a type of device that does not rotate the disk (2) during the period 14 to t0 in response to disk loading.

(el) Applicable only to flexible disk devices, fixed magnetic disk devices, and other elliptical disk devices.Also, it is generally called a mini-floppy disk in which a magnetic disk is inserted into a flexible case. It is also applicable to devices that use cartridges that are

[Brief explanation of the drawing]

1 to 7 are for explaining a magnetic disk device according to an embodiment of the present invention, FIG. 1 is a plan view of a magnetic disk cartridge, and FIG. 2 is a paper view of the cartridge in FIG. 1. , FIG. 3 is a front view showing the principle of the main parts of the magnetic disk device, FIG. 1M4 is a circuit diagram showing a stepping motor and its drive circuit, FIG. 5 is a block diagram showing the electric circuit part of the magnetic disk device, Figures and Figure 7 are
It is a waveform diagram which shows the state of the AP point of a figure. ill・°cartridge, (2J...magnetic disk,
(3J...Case, (9S...Detected part prohibited from being trapped, (9a)...Window. (9b)...Lid, 04...Disk rotation motor,
θ3041...Magnetic head, ae...Stepping motor, Oj...Light emitting diode for track zero detection,
■...Phototransistor for track zero detection, QD...Light-emitting diode for detection of pledge prohibition,...Phototransistor for V charge prohibition detection, 6J...Switching transistor, En...First timer , σ2... second timer.

Claims (1)

[Scope of Claims] A disk rotation mechanism for rotating a disk having a plurality of tracks; a converter for converting information between the disk and the disk while the disk is rotating; a transducer moving mechanism for moving the disk in a track cross direction; and a transducer moving mechanism for detecting that the transducer is located on a specific track selected from the plurality of tracks. a light shielding body for detecting a specific track; a light emitting element and a light receiving element for optically detecting a specific track based on the light shielding body; and a power supply line for the light emitting element to selectively cause the light emitting element to emit light. A disk device comprising: a connected switch; and a switch control circuit that controls the switch to be on for a predetermined period of time in response to power-on.