JPH03272599A - Protecting method for semiconductor part - Google Patents

Abstract

PURPOSE:To protect a semiconductor part from static electricity by absorbing low voltage static electricity in a static electricity absorbing means, and discharging high voltage static electricity through a static electricity discharging means. CONSTITUTION:In the front stage of chip resistance 7 which static electricity 4 enters is formed an electric discharge route 9 which discharges the high voltage static-electricity 4 of not less than 7KV by both a signal pattern 2 and a low impedance pattern 8 corresponding with the pattern of a power supply Vcc or ground GND. The extreme end of each of electric discharging patterns 2a, 8a is formed in such an acute angle as the shape of a knife edge to ease discharging the static electricity, so that even low voltage static-electricity may be discharged to the side of the low impedance pattern 8. Also the low voltage static-electricity of, for example, not more than 7KV does not cause electric discharge on the electric discharge route 9, but it is absorbed in the chip resistance 7 connected in series to the signal pattern 2 at the rear stage of the electric discharge route 9. Thus a semiconductor part can be protected from the high voltage static-electricity even if an electric part whose chip size has been reduced is adopted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a method for protecting semiconductor components arranged on a printed wiring board in electronic equipment from static electricity.

(Prior Art) In recent years, with the adoption of smaller electronic components or highly integrated circuits, electronic devices have become increasingly smaller and lighter, and their housings are now made of plastic. As a result of the miniaturization and weight reduction of electronic devices and the use of plastic housings,
Electrostatic countermeasures to protect electronic components used in electronic devices, especially semiconductor components, from static electricity have become an important issue.

Conventionally, methods for protecting semiconductor components from static electricity include:
The method shown in FIGS. 4 and 5 is adopted. That is, the first method shown in FIG.
Signal pattern 2 wired to the input terminal or output terminal of IC (hereinafter referred to as IC) 1
Connect resistor 3 in series to 10 on signal pattern 2.
This is a method of protecting the ICI by weakening static electricity 4 of KV to 15KV with a resistor 3. Moreover, the second method shown in FIG.
After the resistor 3 shown in the first method, that is, in parallel to the signal pattern 2 between the ICI and the resistor 3, diodes 5 and 6 are connected to the power supply CC, which is a low impedance source, and the ground GND side, and the resistor Static electricity 4, which may still destroy the ICI even if weakened by passing through 3, is removed from the power supply Vc.
c or to protect the ICI by letting it escape to the ground GND.

(Problem to be solved by the invention) Recently, however, high-density packaging has progressed, electronic components and semiconductor components have been made into chip components, and the pattern spacing on printed wiring boards has become narrower. For example, the chip size of resistors has increased from 5 mm to 1.25 mm, and the pattern spacing has become Q, 5 mm.

If the above-mentioned static electricity countermeasures are taken with a resistor whose chip size has been reduced in this way, when high-voltage static electricity 4 of lOXV to 15KV or signal pattern 2 is applied, as shown in FIG. In method 2, the high-voltage static electricity 4 weakened by the resistor 3 is discharged by the chip resistor 7, and this chip resistor 7
Since the current is applied directly to the ICI by skipping the current, there is a problem in that the ICI is destroyed.

The present invention has been made in view of the above circumstances, and by providing a path for discharging high-voltage static electricity through the pattern layout on a printed wiring board, semiconductor components can be discharged from high-voltage static electricity even when electronic components with smaller chip sizes are adopted. The purpose is to provide protection properties for semiconductor components that can be protected from

[Structure of the Invention] (Means and Effects for Solving the Problem) In order to achieve the above object, the present invention protects a semiconductor component arranged on a printed wiring board from static electricity, and provides a method for protecting the semiconductor component from static electricity. static electricity absorption means for absorbing low voltage static electricity connected in series to the wired signal pattern;
Since the structure is equipped with an electrostatic discharge means for discharging high voltage static electricity formed by the signal pattern and the low impedance pattern before the static electricity absorption means, low voltage static electricity is absorbed by the static electricity absorption means and high voltage static electricity is discharged. By discharging the semiconductor component, the semiconductor component can be protected from being destroyed by static electricity even if a chip component with a small chip size is used.

(Example) Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a schematic diagram showing the configuration of an embodiment of the present invention. The same parts as in FIGS. 4 to 6 are given the same reference numerals, and detailed explanation thereof will be omitted.

As shown in the figure, high-voltage static electricity 4 of 7 KV or more is discharged by a signal pattern 2 and a low impedance pattern 8, which is a pattern of the power supply Vcc or ground GND, in front of the chip resistor 7 into which the static electricity 4 enters. A discharge path 9 is formed. As shown in FIG. 2, which is an enlarged view of this discharge path 9, and FIG. 3, which shows a cross section of this portion, the signal pattern 2 and the low impedance pattern 8
The discharge patterns 2a and 8a, each branched from the tip and formed in a knife-like shape, are opposed to each other with a minute interval p, so that the discharge path 9 is connected to the printed wiring board 10.
formed on top. By forming the tips of the discharge patterns 2a and 8a at an acute angle in the shape of a knife, static electricity is easily discharged, and even low voltage static electricity is discharged to the low impedance pattern B side. In this embodiment, the interval p between the discharge patterns 2a and Ba is set to 0.2 degrees, and high-voltage static electricity of 7 KV or more is discharged. Further, the discharge path 9 is usually coated with a solder resist 11 to protect the pattern formed on the printed wiring board IO.
The uncoated parts 2 to which no coating is applied are formed so that static electricity 4 is easily discharged.

Also, high-voltage static electricity 4 of 7KV or more is discharged in the discharge path 9, or low-voltage static electricity of 7KV or less, for example, is not discharged in the discharge path 9, and a chip resistor is connected in series to the signal pattern 2 at the downstream stage of the discharge path 9. Absorbed in 7.

Hereinafter, the operation of one embodiment of the present invention having the above configuration will be explained.

In the natural world, static electricity of several KV to several tens of KV is generated.
It is said that the maximum amount of static electricity generated in offices and homes where electronic devices are used is 15KV to 20KV.

When an operator is charged with high-voltage static electricity of 7 KV or more by walking on carpet, etc., the charged static electricity enters the electronic device from a place that the operator touches, such as a keyboard, and rides on signal pattern 2.

The high-voltage static electricity 4 of 7 KV or more riding on the signal pattern 2 is discharged from the signal pattern 2 to the low impedance pattern 8 in the discharge path 9, and does not cause stress that would destroy the ICI.

Further, when low-voltage static electricity of 7XV or less is charged, the low-voltage static electricity 4 that has entered the signal pattern 2 is not discharged in the discharge path 9 because the voltage is low, but is absorbed by the chip resistor 7 and weakened. The stress caused by the weakened low-voltage static electricity 4 is small and the ICI will not be destroyed.

As described above, the high voltage static electricity 4 is discharged through the discharge path 9,
Since the low voltage static electricity 4 is absorbed by the resistor 3, the stress caused by the static electricity applied to the ICI becomes small and I
CI is never destroyed.

In the above embodiment, the interval between the discharge paths is 0.2w1n.
However, it is not limited to this, and it is possible to make it even narrower, for example, by 0.15 degrees, and it is of course possible to reduce the discharged high voltage static electricity to 7 KV or less.

Furthermore, the present invention is not limited to the above embodiments,
Of course, various modifications can be made without departing from the gist of the present invention.

[Effects of the Invention] As described in detail above, according to the method for protecting semiconductor components of the present invention, low-voltage static electricity is absorbed by the static electricity absorption means and high-voltage static electricity is discharged by the electrostatic discharge means. Since the stress caused by static electricity applied to the semiconductor components is reduced, the semiconductor components can be protected from static electricity.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram showing the configuration of an embodiment of the present invention, FIG. 2 is an enlarged view of a discharge path according to the present invention, FIG. 3 is a sectional view of a discharge path according to the present invention, and FIG. 4 is a conventional FIG. 5 is a diagram showing a conventional second static electricity protection method, and FIG. 6 is a diagram showing how a semiconductor component is destroyed when the component is made into a chip. l...Integrated circuit (semiconductor component), 2...Signal pattern, 4...Static electricity, 7...
- Chip resistance (static electricity absorption means), 8... Low impedance pattern, 9... Discharge path (electrostatic discharge means), 10... Printed wiring board.

Claims (1)

[Claims] A device for protecting semiconductor components arranged on a printed wiring board from static electricity, which includes a static electricity absorbing means for absorbing low-voltage static electricity connected in series to a signal pattern wired on the semiconductor component, and a stage preceding the static electricity absorbing means. A method for protecting a semiconductor component, comprising: electrostatic discharge means for discharging high-voltage static electricity formed by the signal pattern and the low impedance pattern.