JPH03272282A - Video signal reproducing device - Google Patents

Abstract

PURPOSE:To improve slow reproduction by allowing a rotary head to scan a track on which a video signal by one frame is recorded at slow reproduction, storing the reproduction signal by one frame into a memory and outputting a video signal stored in the memory. CONSTITUTION:When a video signal recorded on a magnetic tape 1 as an azimuth track is reproduced by a rotary head, the rotary head scans a track on which a video signal by one frame is recorded at slow reproduction, and the reproduction signal by one frame is stored in the memory 8 and the video signal stored in the memory 8 is outputted. That is, the reproduced video signal by one frame stored in the memory 8 is outputted repetitively till the write of the reproduced video signal of a succeeding frame is finished to apply slow reproduction corresponding to the tape speed. Thus, the slow reproduction of the video signal of segment recording is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video signal reproducing device, and particularly to a video signal reproducing device that performs slow playback.

[Summary of the invention]

The present invention provides a video signal reproducing device in which, during slow playback, a rotary head scans a track on which one frame worth of video signals is recorded, stores this one frame worth of reproduced signals in a memory, and then stores the one frame worth of reproduced signals in the memory. The stored video signal is outputted, allowing for good slow playback.

[Conventional technology]

Conventionally, in a helical scan type VTR (video tape recorder) using a rotating head drum, when performing slow playback by slowing the tape running speed slower than normal playback, for example, the tape running is set to intermittent forwarding, and one frame is The tape was temporarily stopped after every minute of playback. By doing this, the same frame is repeatedly played a plurality of times, and simple slow playback is performed in which the playback image changes at a fraction of the normal speed.

[Problem to be solved by the invention]

By the way, as a VTR that records and plays back video signals, ■
A segment recording method has been proposed in which a field video signal is divided into a plurality of tracks and recorded. For example, as shown in FIG. 6, eight tracks TLT2. T3
. . . At T8, the video signal for one frame is converted into a digital signal and divided and recorded, and thereafter the video signal of each frame is sequentially recorded on each of the eight tracks. In this case, the frame ID is recorded as 1-bit data in a predetermined area on each track. In this frame ID, a low level signal "0" and a high level signal "'1" are alternately recorded for each frame, and changes in the recorded frame can be determined during playback by changes in this frame ID.

By dividing and recording one frame of a video signal on a plurality of tracks in this manner, a video signal with a large amount of information, such as a high-definition video signal, can be recorded satisfactorily.

However, when the video signal for one frame is recorded in two or more tracks in this way, it is difficult to perform slow playback by intermittent feeding of the tape as described above. That is, a track with a format as shown in FIG.
Reproduction is performed using two magnetic heads arranged on a rotating head drum, but when the video tape is stopped, the two magnetic heads simply scan two tracks at the same time. Therefore, for example, it is not possible to simultaneously scan eight tracks, and it is not possible to stop the video tape and repeatedly reproduce all the video signals for one frame.

An object of the present invention is to enable slow playback of video signals by such segment recording with a simple configuration.

(Means for Solving the Problems) The video signal reproducing device of the present invention has the following features, for example, as shown in FIG.
In a video signal reproducing device that reproduces a video signal recorded as an inclined track on a magnetic tape (1) by a rotating head, the rotating head scans a track on which one frame worth of video signal is recorded during slow playback. , this one
After storing a frame worth of reproduction signals in a memory (8), the video signal stored in this memory (8) is output.

[Effect]

By doing this, by repeatedly outputting the playback video signal for one frame stored in the memory (8) until the playback video signal for the next frame is written, slow playback corresponding to the tape speed is possible. It will be done.

〔Example〕

Hereinafter, one embodiment of the video signal reproducing apparatus of the present invention will be described with reference to FIGS. 1 to 5.

This example uses a helical scan type VTR that uses a rotating head drum, and shows an example in which it is applied to a VTR with a format that records video signals converted into digital signals using segment recording as shown in Figure 6 above. .

First, the overall configuration will be explained with reference to Fig. 2. In Fig. 2, (1) shows a video tape on which video signals are recorded in segments in the format shown in Fig. Recorded information is reproduced by a magnetic head (2) attached to the magnetic head (2). magnetic head (
The signal reproduced by step 2) is supplied to a data detection circuit (5) and a clock generation circuit (6) via an amplifier (3) and an equalizer (4). Then, a data detection circuit (5) detects a video signal converted into digital data from the reproduction signal, and a clock generation circuit (6) generates a clock synchronized with the reproduction signal.

Then, the video signal detected by the data detection circuit (5) is
This synchronization detection circuit (7) is supplied to the synchronization detection circuit (7).
Detects a synchronization signal such as a vertical synchronization signal included in the video signal, and supplies the reproduced video signal and the synchronization signal to a memory (8) constituting a time base collector (TBC). In this case, the memory (8) has a capacity to store two frames of reproduced video signals, and is written based on a clock synchronized with the reproduced signal supplied from the clock generation circuit (6).

The reproduced video signal written in the memory (8) is read out in synchronization with a stable clock supplied from the system clock generation circuit (9), and the read video signal is sent to the error correction circuit (10). This error correction circuit (
10) performs error correction processing. The error-corrected video signal is converted into a video signal of a predetermined format by a format processing circuit (11), and then supplied to a digital-to-analog converter (12) to be converted into an analog video signal. A signal is supplied to the output terminal (13).

Next, the configuration facing the memory (8) constituting the time base collector will be explained with reference to FIG. The data is written based on a clock synchronized with the reproduction signal.

In this case, the address of the memory (8) is set for each track of one frame of video signal recorded in segments on eight tracks. That is, since the video signal for two frames can be stored in the memory (8), there are addresses corresponding to a total of 16 tracks, and the frame ID is the address of the track with the low level signal "o" and the address of the track with the high level signal "1 pattern". It is divided into the track address and the address of the track.

Then, the reproduced video signal supplied via the pass line is supplied to the ID detection circuit (21).
In step 1), control data such as the playback frame ID and rack number included in the playback video signal are detected.

In this case, the ID detection circuit (21) is supplied with a clock synchronized with the reproduced signal from the clock generation circuit (6) via the terminal (22), and detects control data based on this clock. Note that the playback frame ID is set as 1-bit data in which a low level signal "0" and a high level signal "1" are alternately set for each frame, and the track number data is set in such a way that one frame signal is divided into 8 tracks. Track numbers O to 7 from the first track "'0" to the eighth track "°7" in segment recording are indicated by 3-bit data, and each control data is recorded in each track. .

The playback frame ID and track number data output by the ID detection circuit (21) are then supplied to an adder (23) and a frame ID generation circuit (24). Also, the terminal (
The synchronization pulse obtained in 25) is sent to the data number generation circuit (2
6), and the data number output from this data number generation circuit (26) is supplied to an adder (23), which adds a data number to the playback frame ID and track number data, Use as write address data. Then, the playback frame ID and playback track number data output by the adder (23) are supplied to the switch circuit (27).

A reference clock based on a stable clock output from the system clock generation circuit (9) is supplied to the terminal (28), and the reference clock obtained at this terminal (28) is transmitted to the frame ID generation circuit (24) and It is supplied to the output address generation circuit (29) and the frame ID generation circuit (29).
4) Generate an output frame ID.

In this case, the reproduction mode information obtained at the terminal (30) is supplied to the frame ID generation circuit (24), which generates an output frame ID based on the reproduction mode. This output frame ID indicates the frame ID of the video signal to be output from the memory (8).

Then, the output address generation circuit (29) generates track number data of the video signal to be output from the memory (8) based on the reference clock, and supplies this track number data to the adder (31). Further, the output frame ID generated by the frame ID generation circuit (24) is added to the adder (3).
1), and this adder (31) adds a frame ID to the track number data and uses it as read address data. Then, the output frame I outputted by the adder (31)
D and the output truck number data, the switch circuit (27
).

The switch circuit (27) sequentially stores the reproduced frame TD and track number data supplied from the adder (23) side and the output frame ID and track number data supplied from the adder (31) side. 8).

In the memory (8), the address where the supplied reproduced video signal is written is controlled by the reproduced frame ID and reproduced track number data supplied from the switch circuit (27). The address from which the video signal is read is controlled by the output frame ID and output rack number data.

Next, the memory (8
) to explain the operation when playing back the video signal recorded on the videotape (1) with reference to Figures 3 to 5. First, let's look at the timing diagram when playing back at normal speed. As shown in Figure 3, the reference clock (Figure 3A) always changes at a cycle of 1730 seconds, and the playback track numbers (Figure 3B) are 0, 1, 2, 3 degrees, 4.5, 6.7 degrees. ,0. l
It changes sequentially from 0 to 7. Furthermore, the playback frame ID changes every time the playback track number becomes 0 (that is, every time the playback frame changes). At this time, writing to the memory (8) is performed in order to 16 addresses prepared in the memory (8).

Here, the output frame TD (Fig. 3D) changes every 1730 seconds in synchronization with the reference clock (that is, one period is 171 seconds).
5 seconds) from the playback frame ID to the memory (8)
is delayed for a predetermined period necessary for signal processing. When this output frame ID is a high level signal "1", the signal stored at the address where the playback frame ID is a high level signal "'1" is read out in synchronization with the output rack number data, and the output frame ID is low. Level signal “0”
, the playback frame ID is a low level signal “0°
The signal stored at the address ' is read out in synchronization with the output truck number data.

In this way, during playback at normal speed, writing and reading of the playback video signal to and from the memory (8) constituting the time base collector are performed at approximately the same speed, and the memory (8)
The time axis is corrected by In this case, the difference between the reproduced frame TD and the output frame ID corresponds to the processing time in the memory (8).

Next, the operation when performing slow playback will be explained with reference to FIGS. 4 and 5. Even in this case, the reference clock (A in FIG. 4) always changes at a cycle of 1730 seconds. Here, if slow playback is performed at the normal speed of 173, then the videotape is run continuously at the normal speed of 173. By doing this, the locus of each track on the video tape of the rotating magnetic head is as shown in FIG. The videotape runs 173 track pitches while scanning track t, and 1
A magnetic head scans the track t of the book three times each.

By running the videotape in this way, the signal on the same track is played back three times in a row, and the playback track numbers of the signals supplied to the memory (8) are the same, as shown in Figure 4B. continues three times. Furthermore, the reproduction frame rD becomes a pulse signal with a width three times that of normal speed reproduction, as shown in FIG. 4C. Here, writing of the reproduced video signal to the memory (8) is performed only once for signals of the same track to the corresponding address, and the remaining reproduced signals are controlled not to be written to the memory (8). At this time, the frame ID generation circuit (24) creates a pseudo playback frame ID (D in FIG. 4) delayed from the playback frame ID, and based on this pseudo playback frame ID, an output frame as shown in FIG. 4E is created. Generate an ID. In this case, the pseudo playback frame ID is the playback frame ID delayed while the playback track number changes twice.

The output frame TD created in this way is a signal that changes at a cycle three times that of the output frame ID during normal playback, but the output track number (F in Figure 4) starts from the timing when the output frame ID changes. 0.1, 2, 3, 4.5
, 6, 7.0.1, . . . and changes by three frames in order. Therefore, the video signal of the same frame is output three times in a row from the memory (8) in synchronization with the reference clock, and this output video signal allows
Slow playback that changes at a speed of 73 is performed.

In this way, according to the VTR of this example, even though the video signal of the frame is divided into 8 tracks and recorded as segments, good slow playback is performed using the memory (8) that constitutes the time base collector. . That is, memory (
After storing one frame worth of video signal in 8),
Since the stored video signals are read out in the correct order while the next frame worth of video signals is being played back from the video tape, the output video signals will not be distorted even during slow playback. For this reason, for example, V
It is suitable for recording in segments such as TR, where one frame of video signal is divided into two or more tracks and recorded in segments to increase the recording density.

It should be noted that the present invention is not limited to the above-mentioned embodiments, and it goes without saying that various other configurations may be adopted.

- It is an explanatory diagram showing an example.

(1) is video tape, (8) is memory, (21) is I
D detection circuit, (24) is a frame ID generation circuit, (29)
) is an output address generation circuit.

[Effects of the Invention] According to the present invention, during slow playback, the reproduced video signal for one frame stored in the memory is repeatedly output until the writing of the reproduced video signal for the next frame is completed, and the video signal for one frame is output twice. Even when segment recording is performed on more than one track, good slow playback corresponding to the tape speed can be performed.

[Brief explanation of drawings]

Claims (1)

[Claims] In a video signal reproducing device that reproduces a video signal recorded as an inclined track on a magnetic tape by a rotating head, during slow playback, the rotating head plays the track on which one frame worth of video signal is recorded. A video signal reproducing device that scans, stores one frame's worth of reproducing signals in a memory, and then outputs the video signal stored in the memory.