JP3057201B2 - Magnetic recording / reproducing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic recording / reproducing system in which two magnetic heads arranged in close proximity and having different azimuth angles simultaneously record on two channels of a magnetic recording medium and reproduce from the two channels simultaneously. Related to the device.

[0002]

BACKGROUND ART FIGS. 18 and 19, an example of a stepped V _X heads, i.e. the recording side and the reproducing side of a conventional digital VTR azimuth angle which are arranged close to is using two different magnetic head configurations Is shown. First, on the recording side, the adaptive scrambling circuit 10 has a plurality of M-sequence scrambling circuits, and generates an M-sequence such that an input signal from the digital signal processing unit can output the least high-frequency component and the least DC component. Select a series. The PR4 precoder 2 is a precoder for the PR4 (partial response class 4) detection method, and includes 1 / (1-D
² ) Perform arithmetic processing (D is a unit delay element).

A signal is recorded on a magnetic tape by two channels (A
Channel and B channel)
1 digital RF supplied from 4 precoder 2
The signal needs to be separated into two channels. Magnetic head 1
3A and 13B are, if you opposite to and separated from 180 degrees, but may be performed recording leave timing signal has been supplied, in the case of stepped V _X head, one channel (e.g., It is necessary to record the RF signal of the A channel (A channel) later than the RF signal of the other channel (for example, the B channel). In the conventional example of FIG. 18, a memory 4R is provided to delay the A-channel RF signal. The A-channel RF signal delayed by the memory 4R for a predetermined time is supplied to the magnetic head 13A via the recording amplifier 12A and recorded on the magnetic tape. The B-channel RF signal is supplied to the magnetic head 13B via the recording amplifier 12B as it is, and is recorded on the magnetic tape.

On the reproducing side, the magnetic heads 13A and 13A
A channel and B obtained from magnetic tape by B
The RF signals of the channels are supplied to A / D converters 22A and 22A via reproduction amplifiers 21A and 21B, respectively.
B and converted to a digital RF signal. In the case of stepped V _X heads, RF signal read from the B channel of the magnetic tape by the magnetic head 13B is
It is delayed by several degrees from the RF signal read from channel A of the magnetic tape by the magnetic head 13A. A memory 4P is provided at the next stage of the B-channel A / D converter 22B in order to delay the B-channel RF reproduction signal by 180 degrees with respect to the A-channel RF reproduction signal and combine the two-channel RF signals.

B output from A / D converter 22B
The digital RF signal of the channel is combined with the digital RF signal of the A channel delayed by a predetermined time by the memory 4P, supplied as a digital RF signal of one system to the equalizer 23, where the waveform is shaped. Later, PR
4 detector 24. The PR4 detector 24 performs a 1 + D operation on the input signal, and supplies an output indicating the operation result to the Viterbi decoder 25. Viterbi decoder 25
Performs an operation on the input signal using the correlation and certainty of data, decodes the data into data resistant to noise, and supplies a signal indicating the decoding result to the descramble circuit 26. The descrambling circuit 26 restores the original data by returning the data rearranged by the scrambling process on the recording side to the original sequence, and supplies the original data to the digital signal processing unit.

Conventionally, it has been proposed to use a FIFO buffer on a reproduction side of a digital VTR to remove a time-axis fluctuation component in a reproduction signal.

[0007]

In the conventional digital VTR shown in FIGS. 18 and 19 described above,
Since the timing control memories 4R and 4P are provided on the recording side and the reproduction side, respectively, there is a problem that the device becomes large and the cost increases.

In the digital VTR using the above-mentioned conventional FIFO buffer, no consideration is given to variable speed reproduction such as CUE and REVIEW.

The present invention has been made in view of such a situation, and an object of the present invention is to provide a small and low-cost magnetic recording / reproducing apparatus which can save memory .

[0010]

[0011]

According to a first aspect of the present invention, there is provided a magnetic recording / reproducing apparatus comprising: two magnetic heads arranged close to each other and having different azimuth angles;
A magnetic recording / reproducing apparatus for simultaneously recording on two channels and simultaneously reproducing from these two channels, comprising: a timing control memory for converting one series of recording signal strings into two series of recording signals capable of being simultaneously recorded on two channels; And a memory for timing control for converting a two-series reproduction signal obtained by simultaneous reproduction from two channels into a continuous one-series reproduction signal sequence by one memory .

[0012]

[0013]

According to the magnetic recording / reproducing apparatus of the first aspect, at the time of recording, the recording signal of one of the two channels (for example, the A channel) is delayed by the one memory, and 2 that can be simultaneously recorded on the channel
A series of recording signals are generated, and at the time of reproduction, the reproduction signal of the other channel (for example, the B channel) of the two channels is delayed by the memory to generate a continuous series of reproduction signal sequences. . Therefore, the function conventionally performed by two memories can be realized by one memory, so that the memory can be saved, and the size and cost of the device can be reduced.

[0014]

[0015]

1 and 2 show a magnetic recording and reproducing apparatus according to an embodiment of the present invention in a recording state and a reproducing state, respectively. In this embodiment, the present invention is applied to a stepped V
_This is an example in which the present invention is applied to a digital VTR using an _X head, that is, two magnetic heads arranged close to each other and having different azimuth angles. 1 and 2, adaptive scramble circuit 1, PR4 precoder 2, equalizer 23, P
The R4 precoder 24, the Viterbi decoder 25, and the descramble circuit 26 are the same as those shown in FIGS.

The recording side input terminal 3E of the switch 3
4 is connected to the output terminal of the precoder 2, the reproduction-side output terminal 3D of the switch 3 is connected to the input terminal of the equalizer 23, and the common terminal 3C of the switch 3 is connected to the signal distribution / combination circuit 3
Connected to terminal C of SM. Signal distribution / combination circuit 3S
M is a one-line recording R supplied to the terminal C at the time of recording.
The F signal is distributed to the recording RF signal for A channel and the recording RF signal for B channel, and output to terminals M and N, respectively. Further, at the time of reproduction, the signal distribution / combination circuit 3SM combines the B-channel reproduction RF signal and the A-channel reproduction RF signal supplied to the terminals M and N into a single-series reproduction RF signal, and outputs it to the terminal C. I do.

The terminal M of the signal distribution / combination circuit 3SM is connected to the data input / output terminal D1 of the memory 4. The memory 4 is composed of, for example, a FIFO buffer. The write clock input terminal W of the memory 4 is connected to the output terminal 7C of the write clock switch 7. The input terminals 7R and 7P of the write clock switch 7 are respectively
The output terminal of the write clock generator 5 for recording and the output terminal of the write clock generator 6 for reproduction are connected.
The write clock generator 5 for recording is composed of a high-precision reference clock generator such as a crystal oscillator. At the time of reproduction, the write clock generator 6 at the time of reproduction
The bit clock of the reproduction signal obtained from B is reproduced and output as a reproduction writing clock, and the reproduction writing clock includes jitter.

The read clock input terminal R of the memory 4 is
It is connected to the output terminal 10C of the read clock switch 10. The input terminals 10R and 10P of the read clock switch 10 are connected to the output terminal of the read clock generator for recording 8 and the output terminal of the read clock generator 9 for reproduction, respectively. The read clock generator for recording 8 and the read clock generator for reproduction 9 are composed of a high-precision reference clock generator such as a crystal oscillator. With the above-described configuration of the write clock generator 6 during reproduction and the read clock generator 9 during reproduction, the time axis fluctuation in the reproduction signal can be removed by writing and reading the reproduction signal to and from the memory 4. .

The input / output terminal D2 of the memory 4 is connected to the terminal 11M of the recording / reproducing switch 11. The terminal N of the signal distribution / combination circuit 3SM is connected to the terminal 11 of the recording / reproduction switch 11.
N.

At the time of recording, the terminal 1 of the recording / reproduction switch 11
1A and 11B are connected to input terminals of recording amplifiers 12A and 12B, respectively. The output terminals of the recording amplifiers 12A and 12B are connected to the magnetic head 13A, respectively.
And 13B. At the time of recording, the terminals 11M and 11N of the recording / reproduction switch 11 are connected to the terminals 11A and 11B, respectively.

At the time of reproduction, the terminal 1 of the recording / reproduction switch 11
1A and 11B are respectively an A / D converter 22
A and 22B are connected to the output terminals. The input terminals of the A / D converters 22A and 22B are connected to the output terminals of the reproduction amplifiers 21A and 21B, respectively. The input terminals of the reproduction amplifiers 21A and 21B are connected to the magnetic heads 13A and 13B, respectively. At the time of reproduction, the terminal 11 of the recording / reproduction switch 11
M and 11N are terminals 11B and 11A, respectively.
Connected to.

As shown in FIG. 5, the magnetic heads 13A and 13B are attached to the rotating drum 76 in a manner that the magnetic heads 13A and 13B are integrated. A magnetic tape (not shown) is obliquely wound around the peripheral surface of the drum 76 at a winding angle slightly larger than 180 degrees or slightly smaller than 180 degrees. And the magnetic head 1
3A and 13B scan the magnetic tape simultaneously.

The extending directions (referred to as azimuth angles) of the gaps of the magnetic heads 13A and 13B are different. For example, as shown in FIG.
An azimuth angle of ± 20 degrees is set between A and 13B. Due to this difference in azimuth angle,
A recording pattern as shown in FIG. 7 is formed. In FIG. 7, adjacent tracks TA and TB of the magnetic tape are
This is formed by magnetic heads 13A and 13B having different azimuth angles. Therefore, during reproduction, the amount of crosstalk between adjacent tracks TA and TB can be reduced due to azimuth loss.

[0024] Figure 8 shows a more specific configuration of the case of the integral structure (so-called double azimuth head or V _X heads) the magnetic heads 13A and 13B as described above. For example, integrated magnetic heads 13A and 13B are attached to an upper drum 76 rotated at a high speed of 150 rps (NTSC system), and a lower drum 77 is fixed. Therefore, data of one field is recorded on the magnetic tape 78 while being divided into five tracks. With this segment system, errors in track linearity can be reduced. Winding angle θ of the magnetic tape 78
Is, for example, 166 degrees, and the diameter of the drum 76 is 1
6.5 mm.

When simultaneous recording is performed using a VX head,
Normally, the magnetic tape 78 vibrates due to the eccentricity of the rotating portion of the upper drum 76, and a track linearity error occurs. As shown in FIG. 9A , the magnetic tape 78 is pressed down, and as shown in FIG. 9B, the magnetic tape 78 is pulled upward, whereby the magnetic tape 78 vibrates. As a result, the linearity of the track deteriorates. However, by performing simultaneous recording using a VX head, the linearity error amount can be reduced as compared with a case in which a pair of magnetic heads are opposed to each other at a distance of 180 degrees. Further, the VX head has an advantage that the bearing adjustment can be performed more accurately because the head-to-head distance is small. Magnetic head 13A having such a VX head configuration
And 13B enable recording and reproduction with a narrow width.

FIG. 3 is a time chart showing a recording signal sequence of each part of the embodiment of the magnetic recording / reproducing apparatus shown in FIG. Hereinafter, the operation of the embodiment of FIG. 1 will be described with reference to FIG. At the time of recording, the terminals 3E and 3
C is connected, the terminals 7R and 7C of the write clock switch 7 are connected, and the terminal 1 of the read clock switch 10 is connected.
0R and 10C are connected, and the terminal 11M and the terminal 11A of the recording / reproducing switch 11 are connected.
Terminal 11N and terminal 11B are connected.

The digital RF signal of one system supplied from the PR4 precoder 2 to the signal distribution / combination circuit 3SM via the terminals 3E and 3C of the switch 3 is supplied to the A / B channel RF signals by the signal combination / distribution circuit 3SM. Separated into signals. The A-channel RF signal is supplied to the memory 4 via the terminal M and the terminal D1, and is written into the memory 4 in accordance with the write-time clock signal supplied from the write-time clock generator 5. Memory 4
The RF signal of the A channel written in is read out in accordance with the readout clock signal at recording supplied from the readout clock generator 8 at recording time. Therefore, the A channel RF
The signal is given a predetermined time delay, and the recording / reproduction switch 1
It is supplied to one terminal 11M. Signal distribution / combination circuit 3SM
The RF signal of the B channel separated by the above is supplied to the terminal 11N of the recording / reproducing switch 11 without any delay.

The A-channel RF signal delayed as described above is supplied to the magnetic head 13A via the terminal 11A of the recording / reproducing switch 11 and the recording amplifier 12A, and is recorded on a magnetic tape to give a delay. B which was not done
The channel RF signal is supplied to the terminal 11 of the recording / reproduction switch 11.
B and is supplied to the magnetic head 13 via the recording amplifier 12B, and is recorded on a magnetic tape. Therefore, A and B
The RF signals of the channels are simultaneously recorded on the magnetic tape.

FIG. 4 is a time chart showing a reproduced signal sequence of each part of the embodiment of the magnetic recording / reproducing apparatus shown in FIG. Hereinafter, the operation of the embodiment of FIG. 2 will be described with reference to FIG. At the time of reproduction, the terminals 3C and 3C of the switch 3
D is connected, the terminals 7P and 7C of the write clock switch 7 are connected, and the terminal 1 of the read clock switch 10 is connected.
0P and 10C are connected, the terminal 11A and the terminal 11N of the recording / playback switch 11 are connected, and the recording / playback switch 11
Terminal 11B is connected to terminal 11M.

At the time of reproduction, RF signals of the A channel and the B channel obtained from the magnetic tape by the magnetic heads 13A and 13B are supplied to A / D converters 22A and 22B via reproduction amplifiers 21A and 21B, respectively. It is converted to an RF signal. The A-channel RF signal is supplied to the signal distribution / combination circuit 3SM via the terminal N without being delayed via the terminals 11A and 11N of the recording / reproduction switch 11.

The B channel RF signal is supplied to the memory 4 via the terminal 11 B and the terminal 11 M of the recording / reproducing switch 11.
, And is written to the memory 4 in accordance with the reproduction write clock signal supplied from the reproduction write clock generator 6. The B-channel RF signal written in the memory 4 is read in accordance with the readout read clock signal supplied from the readout read clock generator 9. Accordingly, the B-channel RF signal is given a predetermined time delay and supplied to the signal distribution / combination circuit 3SM via the terminal D1 and the terminal 11M.

The signal synthesizing circuit 3SM synthesizes or superimposes the A-channel RF signal input without delay and the B-channel RF signal input with delay as described above to generate 1 signal. The signal is supplied to the equalizer 23 via the terminals 3C and 3D of the switch 3 as a system RF signal. After the equalizer 23, the PR4 detector 24,
The operations of the Viterbi decoder 25 and the descramble circuit 26 are the same as those of the conventional example shown in FIGS.

According to the embodiment shown in FIGS. 1 and 2 described above, a timing control or delay memory for converting a single recording signal sequence into two recording signals which can be simultaneously recorded on two channels, A memory for timing control, that is, a delay memory for converting a two-series reproduced signal obtained by simultaneous reproduction from one channel into a continuous one-series reproduced signal sequence is constituted by one memory. Since the fulfilled functions can be realized by one memory, the memory can be saved, and the size and cost of the device can be reduced.

In the above embodiment, the recording magnetic head and the reproducing magnetic head are constituted by the same head, but they may be constituted by separate heads.

FIG. 10 shows the configuration of an embodiment of the magnetic reproducing apparatus according to the present invention. This embodiment is a digital V
This is an example applied to TR. In FIG. 10, magnetic heads 13A and 13B, reproduction amplifiers 21A and 21B,
And A / D converters 22A and 22B are shown in FIG.
This is the same as the embodiment.

The A-channel and B-channel R obtained from the magnetic tape by the magnetic heads 13A and 13B
The F signal is supplied to A / D converters 22A and 22B via reproduction amplifiers 21A and 21B, respectively, and is converted into a digital RF signal. R of A channel
The F signal is supplied to the FIFO buffer 30A, and while the write enable signal (“H”) is being output from the write control circuit 31A, a write clock generator similar to the reproduction write clock 6 generator of FIG. (Not shown), the data is written into the FIFO buffer 30A.

A written in the FIFO buffer 30A
While the read control circuit 32A outputs the read enable signal (“H”), the RF signal of the channel
Are read from the FIFO buffer 30A in accordance with a read clock signal output from a read clock generator (not shown) similar to the read clock generator 9 during reproduction.

The RF signal of the B channel is supplied to the FIFO buffer 30B, and while the write enable signal ("H") is being output from the write control circuit 31B, the same as the reproduction write clock generator 6 of FIG. The data is written to the FIFO buffer 30B according to a write clock signal output from a write clock generator (not shown).

B written to FIFO buffer 30B
While the read enable signal (“H”) is being output from the read control circuit 32B in FIG.
Is read from the FIFO buffer 30B in accordance with a read clock signal output from a read clock generator (not shown) similar to the read clock generator 9 during reproduction. The RF signals of the A and B channels read from the FIFO buffers 30A and 30B are combined, and
Is supplied to the equalizer 23.

The write control circuits 31A and 31B output a drum rotation signal, that is, an RF switching pulse SWP.
In response to the change, a write reset signal is generated and the generation of a write enable signal is started.

The read control circuits 32A and 32B receive the drum rotation signal delayed by a predetermined time by the delay circuit 33, that is, the RF switching pulse SWP, and generate a read reset signal at the change point and a read enable signal. Starts generating.

The FIFO buffer 30A receives signals from the write control circuit 31A and the read control circuit 32A, respectively.
Upon receiving the write reset signal and the read reset signal, the write address pointer and the read address pointer are reset to 0. The FIFO buffer 30B
When a write reset signal and a read reset signal are received from the write control circuit 31B and the read control circuit 32B, respectively, the write address pointer and the read address pointer are reset to 0.

FIG. 11 shows the FI of the embodiment shown in FIG.
FIG. 12 shows a write operation of the FO buffers 30A and 30B, and FIG. 12 shows a read operation of the FIFO buffers 30A and 30B of the embodiment shown in FIG. Less than,
The operation of the embodiment of FIG. 10 will be described with reference to FIGS. R of A channel and B channel obtained from magnetic tape by magnetic heads 13A and 13B
The F signal is supplied to A / D converters 22A and 22B via reproduction amplifiers 21A and 21B, respectively, and is converted into a digital RF signal. R of A channel
The F signal is supplied to the FIFO buffer 30A, and the B channel RF signal is supplied to the FIFO buffer 30B.

When the drum rotation signal, that is, the RF switching pulse SWP changes, the write control circuits 31A and 31B respectively generate a write reset signal and start generating a write enable signal.
Thus, the A channel RF signal is sequentially written to the FIFO buffer 30A, and the B channel RF signal is
The data is sequentially written to the FIFO buffer 30B.

Thereafter, after a lapse of the time set by the delay circuit 33, the read control circuits 32A and 32B respectively output the read reset signal in accordance with the delayed drum one rotation signal, that is, the change point of the RF switching pulse SWP. And starts the generation of the read enable signal. As a result, the A-channel RF signal is sequentially read from the FIFO buffer 30A, and the B-channel RF signal is sequentially read from the FIFO buffer 30B. The A and B channel RF signals read from the FIFO buffers 30A and 30B are combined into a single-system RF signal as shown in FIG.

According to the embodiment of FIG. 10, at the changing point of the drum rotation signal, that is, the RF switching pulse,
Since the write address and the read address of the FIFO buffers 30A and 30B are reset, a stable operation can be realized because the read address does not overtake the write address.

FIG. 13 shows the configuration of another embodiment of the magnetic reproducing apparatus of the present invention. This embodiment is obtained by considering the variable speed reproducing mode of the CUE and REVIEW such digital VTR using V _X head.

In FIG. 13, the magnetic heads 13A and 13A obtained from the magnetic tape wound around the drum 76 are shown.
3B, the A-channel and B-channel RF signals are supplied to A / D converters 22A and 22B via reproduction amplifiers 21A and 21B, respectively, and are converted into digital RF signals.

When the A channel is selected by a control device (not shown), the terminals 41A and 41C of the switch 41 are connected, and the RF signal of the A channel is supplied to the FIFO buffer 30 via the switch 41. .
When the B channel is selected by a control device (not shown), the terminal 41B of the switch 41 and the terminal 41B are connected to each other.
C is connected, and the RF signal of the B channel is
1 to the FIFO buffer 30.

The level detector 42 detects a period in which the level of the reproduced A channel or B channel RF signal is equal to or higher than a predetermined value, and outputs a signal indicating this period to the FIFO enable signal creation circuit 31E.

The drum rotation signal generating circuit 44 includes a drum rotation detector 43 such as a PG mounted on the drum 76.
And outputs the drum one rotation signal, that is, the PF switching pulse SWP, to the FIFO write enable signal creation circuit 31E, the FIFO write reset signal creation circuit 31R, and the delay circuit 33.

FIFO write enable signal creation circuit 3
1E outputs a FIFO buffer 30 write enable signal during a period in which the level of the reproduction RF signal detected by the level detector 42 is equal to or higher than a predetermined value, starting from the changing point of the drum 1 rotation signal SWP.

FIFO write reset signal creation circuit 31
R receives the drum rotation signal, that is, the RF switching pulse SWP, and outputs a write reset signal to the FIFO buffer 30 at the change point.

FIFO read enable signal creation circuit 3
2E is the drum rotation signal delayed by the delay circuit 33 for a predetermined time, that is, the RF switching pulse SW.
In response to P, the generation of the read enable signal is started at the change point.

FIFO read reset signal generating circuit 32
R is the drum rotation signal delayed by the delay circuit 33 for a predetermined time, that is, the RF switching pulse SWP
Accordingly, a read reset signal is generated at the change point.

FIFO buffer 30 resets the write address pointer and the read address pointer to 0 when receiving the write reset signal and the read reset signal from FIFO write reset signal generating circuit 31R and FIFO read reset signal generating circuit 32R, respectively. .

The reproduction RF signal supplied to the FIFO buffer 30 from the terminal 41C is written in the same manner as the reproduction write clock 6 generator in FIG. 2 while the write enable signal is being output from the FIFO write enable signal creation circuit 31E. The data is written to the FIFO buffer 30 according to a write clock signal output from a clock generator (not shown).

The reproduced RF signal written in the FIFO buffer 30 is supplied to the FIFO read enable signal creation circuit 3
While the read enable signal is being output from 2E, data is read from FIFO buffer 30 in accordance with a read clock signal output from a read clock generator (not shown) similar to read clock generator 9 during reproduction shown in FIG.

FIG. 14 shows an example of the movement of the two magnetic heads 13A and 13B close to each other and the reproduction signals of the two adjacent channels, that is, the A and B channels during normal reproduction in the embodiment of FIG. FIG. 15 shows two magnetic heads 1 close to each other during variable speed reproduction in the embodiment of FIG.
3A and 3B show an example of the movement of 3A and 13B, a reproduced signal of two adjacent channels, that is, A and B channels, and a write enable signal. As shown in FIG. 15, at the time of variable speed reproduction, since the magnetic heads 13A and 13B cross between tracks, that is, between channels, the reproduced RF signal has a Soloban ball shape. During variable-speed reproduction, a period during which the reproduction RF signal is equal to or higher than a predetermined level is detected by the level detector 42 (see FIG. 15B).
If a write enable signal is supplied from the FO write enable creation circuit 31E to the FIFO buffer 30 (FIG. 15)
(C)), the storage capacity of the FIFO buffer 30 can be reduced.

FIG. 16 shows an example of the reproduction signal, enable signal and reset signal during the CUE operation of the embodiment of FIG. 13, and FIG. 17 shows the REVIE of the embodiment of FIG.
An example of a reproduction signal enable signal and a reset signal during the W operation is shown. During variable speed reproduction such as CUE and REVIEW, the rotation of the drum 76 is corrected in order to keep the data rate constant, so that the interval of the RF switching pulse is different from that during normal reproduction. In the embodiment of FIG. 13, the write enable signal, the write reset signal, the read enable signal, and the read reset signal are transferred to the FIFO buffer 30 based on the drum 1 rotation signal, that is, the RF switching pulse SWP.
, So that accurate and stable write and read operations can be performed.

Further, by setting the storage capacity of the FIFO buffer 30 to the maximum data amount (for one rotation of the drum) during variable speed reproduction, a stable operation can be ensured. For example, the data amount when the drum rotation speed is 150 Hz is about 120,000 bits, and the data amount when the drum rotation speed is 70 Hz is about 300,000 b.
its. In this case, a FIFO buffer having a storage capacity of 300 Kbits may be prepared.

[0062]

According to the magnetic recording / reproducing apparatus of the first aspect,
A single recording signal sequence can be simultaneously recorded on two channels.
A timing control memory for converting a sequence of recording signals into a continuous recording signal sequence and a timing control memory for converting two sequences of reproduction signals obtained by simultaneous reproduction from two channels into a continuous sequence of reproduction signals are used. Since the memory is constituted by one memory, the function conventionally performed by the two memories can be realized by one memory, so that the memory can be saved and the size and cost of the device can be reduced.

[0063]

[Brief description of the drawings]

FIG. 1 is a block diagram showing a magnetic recording / reproducing apparatus according to an embodiment of the present invention in a recording state.

FIG. 2 is a block diagram showing a magnetic recording / reproducing apparatus according to an embodiment of the present invention in a reproducing state.

FIG. 3 is a time chart showing a recording signal sequence of each unit of the embodiment of the magnetic recording and reproducing apparatus shown in FIG. 1;

FIG. 4 is a time chart showing a reproduced signal sequence of each unit of the embodiment of the magnetic recording / reproducing apparatus shown in FIG. 2;

FIG. 5 is an explanatory diagram showing an example of a head arrangement of the magnetic recording and reproducing device shown in FIGS. 1 and 2;

FIG. 6 is an explanatory diagram showing an example of azimuth of a head of the magnetic recording / reproducing apparatus shown in FIGS. 1 and 2;

FIG. 7 is an explanatory diagram showing an example of a recording pattern of a head of the magnetic recording and reproducing device shown in FIGS. 1 and 2.

FIG. 8 is a plan view and a side view showing an example of a head and a tape of the magnetic recording / reproducing apparatus shown in FIGS. 1 and 2;

FIG. 9 is an explanatory diagram showing that tape vibration occurs due to eccentricity of the drum.

FIG. 10 is a block diagram showing a configuration of an embodiment of a magnetic reproducing apparatus according to the present invention.

11 is a time chart showing a write operation of the FIFO buffers 30A and 30B of the embodiment shown in FIG.

FIG. 12 is a time chart showing a read operation of the FIFO buffers 30A and 30B of the embodiment shown in FIG.

FIG. 13 is a block diagram showing a configuration of another embodiment of the magnetic reproducing apparatus of the present invention.

FIG. 14 is an explanatory diagram showing an example of movement of two adjacent heads and a reproduced signal of two adjacent channels during normal reproduction in the embodiment of FIG. 13;

FIG. 15 is an explanatory diagram showing an example of movements of two adjacent heads, reproduced signals of two adjacent channels, and a write enable signal during variable speed reproduction in the embodiment of FIG. 13;

FIG. 16 is an explanatory diagram showing an example of a reproduction signal, an enable signal, and a reset signal during the CUE operation of the embodiment in FIG. 13;

17 is an explanatory diagram showing an example of a reproduction signal enable signal and a reset signal during a REVIEW operation of the embodiment in FIG.

18 is a block diagram showing an example of a recording of a side structure of a conventional digital VTR using the stepped V _X heads.

19 is a block diagram showing an example of the reproducing side of a conventional digital VTR using the stepped V _X head configuration.

[Explanation of symbols]

 4 Memory 5 Write clock generator for recording 6 Write clock generator for reproduction 7 Write clock switch 8 Read clock generator for recording 9 Read clock generator for reproduction 10 Read clock switch 11 Recording / reproduction switch 12A, 12B Recording amplifier 13A, 13B Magnetic head 21A, 21B Reproduction amplifier 22A, 22B A / D converter 30, 30A, 30B FIFO buffer 31A, 31B Write control circuit 31E FIFO write enable signal generation circuit 31R FIFO write reset signal generation circuit 32A, 32B read control circuit 32E FIFO read enable signal creation circuit 32R FIFO read reset signal creation circuit 33 delay circuit 44 drum one rotation signal creation circuit

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G11B 5/09

Claims (1)

(57) [Claims] 1. A magnetic recording / reproducing apparatus for simultaneously recording data on two channels of a magnetic recording medium by two magnetic heads having different azimuth angles arranged close to each other and reproducing data simultaneously from the two channels, A timing control memory for converting a recording signal sequence into two series of recording signals that can be simultaneously recorded on the two channels; and a two-series reproduction signal obtained by simultaneous reproduction from the two channels into one continuous series. A magnetic recording / reproducing apparatus , wherein a timing control memory for forming a reproduction signal sequence is constituted by one memory .