JPH03270255A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To enable a valid fuse to be formed relatively easily during process by allowing a polycrystal silicon film to remain only at both sides of a U-groove surface which is provided on a semiconductor substrate. CONSTITUTION:A poly Si film 11 which remained at an inside of a U groove which insulates and separates a periphery of a transistor element is short- circuited or leaks to the poly Si film of a lead-out electrode of a base or a collector for conduction. Then, a poly Si film 13 which remains at a shoulder of this U groove is utilized as a fuse which is built into the transistor. Therefore, the selecting a desired call, applying a high voltage between a base 23 and a collector 24 of a bipolar transistor of a desired call, and performing blow-out by allowing an excessive amount of current to flow to the polycrystal silicon film 13 at an inside of the U groove, an area between the base 23 and the collector 24 can be turned into a non-conductive state.

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device, particularly a method of manufacturing a fuse built into an LSI.

The purpose is to form an effective fuse relatively easily during the process.

■A cell having a bipolar transistor formed on a semiconductor substrate, whose base and collector are electrically connected by a polycrystalline silicon film remaining inside the surface of the U-groove;
The method includes means for selecting the desired cell, and voltage applying means having means for cutting the polycrystalline silicon film of the bipolar transistor corresponding to the desired cell using an overcurrent to bring it into a non-conducting state. ■Process of providing a U-groove on a semiconductor substrate, selectively oxidizing the inner surface of the U-groove to form a silicon dioxide film, and filling the U-groove with a polycrystalline silicon film, and the upper part of the U-groove. oxidizing the polycrystalline silicon film to form a silicon dioxide film; and covering the entire surface of the semiconductor substrate with the polycrystalline silicon film.

A step of patterning the polycrystalline silicon film to form base and collector extraction electrodes, and leaving the polycrystalline silicon film only on both sides of the U-groove surface, and selectively removing the remaining polycrystalline silicon film. selectively forming cells in which the base and collector are rendered non-conductive by etching and cutting.

(2) Alternatively, the remaining polycrystalline silicon film may be selectively oxidized to selectively form a cell in which the base and collector are rendered non-conductive.

[Industrial application field]

The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device, and particularly to a method for manufacturing an LSI fuse.

In recent years, with the development and use of a wide variety of LSI semiconductor devices,
A wide variety of methods are used to design and manufacture the internal circuitry.

[Conventional technology]

Conventionally, in the circuit operation of a semiconductor device, 1. O is determined.

Further, in the redundant circuit of the RAM, whether or not the redundant circuit is used is determined depending on whether the fuse is connected or broken.

[Problem to be solved by the invention]

As mentioned above, various methods have been adopted.

Higher integration, higher miniaturization, and faster speeds all pose many technical difficulties in their design and manufacturing.

The present invention relates to a manufacturing process of a semiconductor device.

It is provided for the purpose of creating a method that performs the role of switch operation with relative ease.

[Means to solve the problem]

FIG. 1 is a diagram explaining the principle of the present invention.

FIG. 2 is a schematic cross-sectional view of an embodiment of the present invention in the order of steps.

FIG. 3 is a schematic cross-sectional view of the U-groove forming step of the present invention.

In the figure, l is a silicon (Si) substrate, 2 is a buried layer,
3 is a semiconductor layer, 4 is the first silicon nitride (Si3N4)
Film, 5 is field silicon dioxide (SiO7) film, 6
is the second Si3N4 film, 7 is the U groove, and 8 is the Si in the trench.
0□ film, 9 is a channel cut 10 is a polycrystalline silicon (poly-Si) film for fitting into the U-groove ring, 11 is a U-groove cover 5i
02 film, 12 is the third Si:+N+ film, 13 is the poly-Si film for electrode extraction, 15 is the SiO□ film, 16 is 5
i02 film, 17 is SiO□ film, 18 is SiO□ film,
19 is a poly-Si film.

20 is an emitter, and 21 is a poly-Si film for an emitter electrode.

22 is an internal base diffusion layer, and 23 is an external base diffusion layer.

24 is a collector diffusion layer, 25 is a barrier metal layer, and 26 is a 1-Cu metal layer.

In the manufacturing process of a semiconductor device, there is a process of removing the Si3N4 film 6 used as a mask at the end of the process of creating a U-groove for element isolation. At this time, when the Si3N4 film 6 is removed and then treated with an aqueous hydrofluoric acid solution, the poly-Si oxide film 11 and the field oxide film 5 in the U groove are etched.
The difference in level at the shoulder of the U groove becomes large.

Furthermore, in a bipolar transistor using a double poly self-alignment line in an LSI, the poly-Si film 13 for the base lead electrode remains on this step.

For this reason, as shown in FIG.
is short-circuited or leaked to the poly-Si film of the extraction electrode of the base and collector, resulting in conduction.

The poly-Si film 13 remaining on the shoulder of this U-groove is used as a fuse built into the transistor.

That is, one object of the present invention is to connect a cell having a bipolar transistor whose base and collector formed on a semiconductor substrate l are in a conductive state by the polycrystalline silicon film 13 remaining inside the surface of the U groove 7 to a desired transistor. A semiconductor characterized in that it has a means for selecting a cell, and a voltage applying means having a means for cutting the polycrystalline silicon film of the bipolar transistor corresponding to the desired cell by using an overcurrent to bring it into a non-conducting state. Depending on the device.

Alternatively, a step of providing a U-groove 7 on the semiconductor substrate.

A step of selectively oxidizing the inner surface of the U-groove 7 to form a silicon dioxide film 8 and burying a polycrystalline silicon film IO in the U-groove 7; a step of oxidizing to form a silicon dioxide film 11, a step of covering the entire surface of the semiconductor substrate 1 with a polycrystalline silicon film 13, and a step of patterning the polycrystalline silicon film 13 to form base and collector extraction electrodes. In addition, by leaving the polycrystalline silicon film 13 only on both sides of the U-groove surface and selectively etching and cutting the remaining polycrystalline silicon film 13, the base and collector are made non-conductive. selectively forming cells to be in a state.

The present invention is also achieved by including the step of selectively oxidizing the remaining polycrystalline silicon film to selectively form a cell in which the base and collector are rendered non-conductive.

[Effect]

In the present invention, by utilizing the poly-Si film remaining on the shoulder portion of the U-groove as a fuse, accurate and simple switching operations can be performed.

That is, in the fuse ROM, a desired cell is selected, a high voltage is applied between the base and collector of the bipolar transistor of the desired cell, and an overcurrent is caused to flow through the polycrystalline silicon film 13 inside the U-groove to blow it out. Accordingly, it is possible to bring the base and collector into a non-conducting state.

Furthermore, in the case of a mask ROM, the polycrystalline silicon film 13 inside the U-groove of the bipolar transistor of a desired cell is selectively etched and cut.

Alternatively, the base and collector can be made non-conductive by oxidizing and insulating them in an oxygen atmosphere using a resist or the like as a mask.

〔Example〕

FIG. 2 is a schematic cross-sectional view of an embodiment of the present invention in the order of steps.

As shown in FIG. 2(a), Si
Impurities are introduced into the substrate 1, and an n+ type buried layer 2 is formed by annealing and the above-mentioned ion implantation.

Next, as shown in FIG. 2(b), after forming a semiconductor layer 3 by depositing single crystal Si to cover the buried layer 2 by the CVD method, the first layer was patterned by the LOCO3 method.
Using the 5i3Na film 4 as a mask, the semiconductor layer 3 is selectively oxidized to form a field 5i02 film 5 as an element isolation region.

Next, the first Si3N4 film 4 used as a mask is
An element region is formed by removing.

Next, as shown in FIG. 2(C), a U-groove is formed in the field 5102 film 5 using a patterned second Si3N4 film 6 (not shown) as a mask, which is a step directly related to the present invention. Therefore, the U-groove portion will be enlarged with reference to FIG. 3 and explained in order of steps.

First, as shown in FIG. 3(a), a second 5iaN film 6 is deposited over the entire surface of the field 5iO7 film 5 formed on the Si substrate 1 by the CVD method.

As shown in FIG. 3(b), the second 5j3Na film 6 is selectively etched by RIE so as to have an opening in the region above the field SiO2 film 5. As shown in FIG.

Next, the second Si patterned by RIB
3N, using the film 6 as a mask, selectively etches from the field 5i02 film 5 in the opening to the Si substrate 1 to form a U-groove 7 extending from the field SiO□ film 5 to the Si substrate 1.

As shown in FIG. 3(c), the inside of the U-groove 7 is selectively oxidized by thermal oxidation, and the SiO2 film 8 in the trench is formed on the surface of the U-groove.
form.

As shown in FIG. 3(d), impurities are introduced into the Si substrate 1 under the U-groove 7 by ion implantation to create a channel cut 9.
After forming poly-Si inside the U groove 7 by CVD method.
is buried to form a poly-Si film 10.

Next, as shown in FIG. 3(e), U is removed by thermal oxidation.
The poly-Si film 8 on the top of the groove 7 is oxidized to form a U-groove cover of 5 inches.
There are two films 11. This 5in2 film 11 is
Since i supply is small, the peripheral part of 7 is thinner than the central part,
One level difference is formed with respect to the field 5iO7 film 5.

As shown in FIG. 3(f), the second Si3N4 film 6 used as a mask is etched and removed by RIB. At this time, the field SiO□ film 5 is exposed.

Furthermore, the surfaces of the field 5iO7 film 5 and the U-groove cover SiO2 film 11 are thinly cleaned and etched using a hydrofluoric acid-based aqueous solution in order to improve the adhesion of the poly-Si film in the first step. The difference in level between the SiO2 film 5 and the cover 5in2 film 11 increases.

The steps up to this point correspond to the steps shown in FIG. 2(C).

Next, as shown in FIG. 2(d), a third Si3N4 film 12 is deposited on the entire surface by CVD, and the Si3N4 film 12 is selectively etched using R1,E. At this time.

A Si3N4 film 12 is left on the field 5in2 film 5.

Next, a poly-Si film 3 is deposited on the entire surface by CVD. FIG. 3(g) corresponds to this step.

As shown in Figure 2(e), poly-Si
After depositing a third Si3N4 film I4 (not shown) on the film 13, the third 5j3Na film 14 is selectively etched in the region of the Si3N4 film I4 by RIB to form an opening, and a polygon is etched in the opening. The Si film 13 is exposed.

Next, the poly-Si film 13 within the opening is selectively oxidized by thermal oxidation using the third Si3N4 film 14 as a mask to form S.
iO□ film 15 film type 5 film type 5 At this time, poly-Si film 13A for extracting the collector and poly-Si film 13B for extracting the external base.
They are separated by a 5in2 film I5. After this, the poly-Si film 13 is patterned to form each extraction electrode, but in the etching process of patterning.

As shown in Figure 3(h), poly S1 is placed on both sides of the U groove.
The film 13C remains, which is electrically connected to the poly-Si film 13 of the collector and base extraction electrode that crosses the surface of the U-groove, resulting in a short circuit between the base and the collector.

Next, as shown in FIG. 2(f), using a patterned resist (not shown) as a mask, phosphorus (P) and arsenic (As) are sequentially implanted into the poly-Si film 3A for extracting the collector by ion implantation. The resist used as a mask is removed, and a poly-Si film 13B for drawing out the external base is formed using a similarly patterned resist as a mask.
After introducing boron (B), the resist used as a mask is removed, and the third 5iJ4 film 14 is also removed.

Next, as shown in FIG. 2(g), a SiO□ film 16 is formed by CVD to cover the poly-Si films 13A and 13B.
5102 film 16. was deposited by RIE. Poly-Si film 1
After selectively etching 3B to form an opening and exposing the semiconductor layer 3 in the opening, the inside of the opening is oxidized by thermal oxidation to form a 5in2 film 7, and then the inside of the opening is etched by ion implantation. An impurity for forming an internal base is introduced into the semiconductor layer 3 through the 3102 film 17 .

Next step, 5102 film 18. by CVD method. Poly-Si film 1
9 is deposited, and the poly-Si film 19.5102 film 18 is selectively etched by RIE to form an opening for the emitter 20 and expose the semiconductor layer 3 within the opening of the emitter 20.

Next, in order to remove a high resistance layer (natural oxide film) such as 5i02 generated on the semiconductor layer 3 within the opening of the emitter 20, the inside of the emitter opening is cleaned with a hydrofluoric acid aqueous solution.

Next, a poly-Si film 21 is deposited by CVD to cover the emitter opening, arsenic is introduced into the poly-Si film 21 by ion implantation, and the poly-Si film 21 is selectively etched by RIE to draw out the emitter. After forming the poly-Si film 21 for
8 is selectively etched to form poly-Si for the collector drawer.
Openings are formed in the regions above the film 13A and the poly-Si film 13B for leading out the base, and annealing is performed to diffuse impurities from the poly-Si films 21.13A and 13B, respectively, to form the emitter diffusion layer 20. Internal base diffusion layer 22. External base diffusion layer 23. A collector diffusion layer 24 is formed, and a poly-Si film 21 and a poly-Si film 13A in the opening are formed.
.

After forming a barrier metal layer 25 made of titanium nitride (TiN) in the openings so as to make contact with each of the barrier metal layers 13B, a metal layer 26 made of aluminum-copper (Al-Cu) is formed so as to make contact with the barrier metal layer 25. By forming this, a semiconductor device as shown in FIG. 2(g) is obtained.

In fuse ROM, select the desired cell by 5, for example, the X coordinate and Y coordinate.
A high voltage is applied between the base and collector of the bipolar transistor of the desired cell selected by the two coordinate decoders, and the base and collector are A non-conducting state can be established between the two.

In the mask ROM, after forming the poly-Si film 13 fuse, the polycrystalline silicon film 13 inside the U-groove of the bipolar transistor of a desired cell is selectively etched and cut, or a resist or the like is masked. By oxidizing and insulating in an oxygen atmosphere,
It is possible to bring the base and collector into a non-conducting state.

〔Effect of the invention〕

As explained above, according to the present invention, when the Si, N, and films used as masks for forming the U-groove are removed, the portion of the poly-Si film left on the upper part of the U-groove is embedded in each transistor in the device. It can be used as a fuse.

[Brief explanation of drawings] FIG. 1 is a diagram explaining the principle of the present invention. FIG. 2 is a schematic cross-sectional view of an embodiment of the present invention in the order of steps. FIG. 3 is a schematic cross-sectional view of the U-groove forming step of the present invention. Figure here. 1 is a Si substrate, 2 is a buried layer. 3 is a semiconductor layer, and 4 is the first (7) 5jJa film. 5′! Field 5i02 membrane. 6 is the second Si3N4 film, and 7 is the U groove. 8 is the SiO+ film inside the trench. 9 is a channel cut. 10 is a poly-Si film for embedding U information. 11 is a U-groove cover SiO□ film. 12 is the third Si3N4 film. 13 is a poly-Si film for electrode extraction. 14 is the third Si3N film, and 15 is the 5102 film. 16 is S'102 film, 17 is SiO□ film. 18 is a 5102 film, 19 is a poly-Si film. 20 is the emitter. 21 is a poly-Si film for the emitter electrode. 22 is an internal base diffusion layer. 23 is an external base diffusion layer. 24 is a collector diffusion layer.

Claims (1)

[Claims] 1) A polycrystalline silicon film (1) in which the base and collector formed on the semiconductor substrate (1) remain inside the surface of the U-groove (7).
3), a cell having a bipolar transistor in a conductive state, a means for selecting the desired cell, and a means for selecting the polycrystalline silicon film (13) of the bipolar transistor corresponding to the desired cell by an overcurrent. 1. A semiconductor device comprising: voltage application means having means for disconnecting to bring the device into a non-conductive state. 2) providing a U-groove (7) on the semiconductor substrate (1);
selectively oxidizing the inner surface of the U-groove (7) to form a silicon dioxide film (8), and burying a polycrystalline silicon film (10) in the U-groove (7); 7) oxidizing the upper polycrystalline silicon film (10) to form a silicon dioxide film (11); and covering the entire surface of the semiconductor substrate (1) with a polycrystalline silicon film (13); patterning the polycrystalline silicon film (13) to form base and collector extraction electrodes, and leaving the polycrystalline silicon film (13) only on both sides of the U-groove surface; A method for manufacturing a semiconductor device, comprising the step of selectively etching and cutting a crystalline silicon film (13) to selectively form a cell in which a base and a collector are brought into a non-conductive state. 3) providing a U-groove (7) on the semiconductor substrate (1);
selectively oxidizing the inner surface of the U-groove (7) to form a silicon dioxide film (8), and burying a polycrystalline silicon film (10) in the U-groove (7); 7) oxidizing the upper polycrystalline silicon film (10) to form a silicon dioxide film (11); and covering the entire surface of the semiconductor substrate (1) with a polycrystalline silicon film (13); patterning the polycrystalline silicon film (13) to form base and collector extraction electrodes, and leaving the polycrystalline silicon film (13) only on both sides of the U-groove surface; 1. A method of manufacturing a semiconductor device, comprising the step of selectively oxidizing a crystalline silicon film to selectively form a cell in which a base and a collector are rendered non-conductive.