JPH03270134A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To acquire a wiring electrode having excellent coverage by exposing and developing a resist on a layer insulating film through a mask for a first contact formation and by exposing, developing and baking the resist through a mask for second contact formation whose contact diameter is smaller than that of the mask for first contact formation and by forming a contact hole by drying etching. CONSTITUTION:A gate electrode 3, an impurity diffusion layer 4 and a layer insulating film 5 are formed on a semiconductor substrate 1 through a gate insulating film 2, a photoresist 6 is applied, and exposure is carried out through a mask 7 for first contact formation having a registration mark. The resist is developed to acquire a resist pattern 8 for first contact formation and a resist pattern 9 of a mask registration mark. Then, a mask 10 for second contact formation whose contact diameter is smaller than that of the mask 7 is mask-registered and exposed to develop and bake the resist again. Thereby, a step-like resist pattern 11 for second contact formation is acquired. Then, a contact hole 12 is formed in the layer insulating film 5 and a wiring electrode 13 is formed.

Description

[Detailed description of the invention] Industrial applications The present invention relates to a method for manufacturing a semiconductor device.

Conventional technology Semiconductor devices, especially memory devices, are in high demand for high integration, and fine multilayer electrode structures are being frequently used, making it essential for wiring electrodes to have good coverage in contact hole areas. ing.

An example of a conventional method for manufacturing a semiconductor device having multilayer electrodes will be described with reference to FIG. As shown in FIG. 2A, a gate electrode 23 is formed on a semiconductor substrate 21 via a gate insulating film 22, and an impurity diffusion layer 24 is formed by implanting impurity ions.
form. Next, as shown in the same figure (b), the interlayer insulation 1
! ! 125 is formed, a photoresist 26 is further applied, and exposed through a mask 27 for contact formation.

Next, as shown in FIG. 2C, the resist 26 is developed and baked to obtain a resist pattern 28 for forming a contact. Next, as shown in FIG. 2D, a contact hole 29 is formed in the interlayer insulation 1lI25 by anisotropic dry etching, and a wiring electrode 30 is formed by sputtering of aluminum or the like.

Problems to be Solved by the Invention In such a conventional semiconductor device manufacturing method, since the contact hole 29 formed in the interlayer insulating film 25 has a substantially vertical cross-sectional shape, the coverage of the wiring electrode 30 is poor and the protective film is The problem has been that disconnections are more likely to occur due to thermal stress and increased charge density in the wiring.

To address this issue, a method has been used to date in which after forming a resist pattern for contact formation, wet etching is performed and then dry etching is performed, but during wet etching, it is difficult to control the etching depth.
Not suitable for forming fine patterns. Also, CW with different diameters
(Contact Window) There is also a method of forming contact holes in two stages by forming a resist pattern for the second time and etching for the second time using a mask, but this is not desirable for mass production because it inevitably increases the number of steps.

The present invention solves the above-mentioned conventional problems, and aims to provide a method for manufacturing a semiconductor device that can form wiring electrodes with good coverage in fine patterns without an extreme increase in the number of steps. shall be.

Furthermore, a second object of the present invention is to provide a manufacturing method that improves processing accuracy when forming contact holes.

Means for Solving the Problems In order to achieve this object, the method for manufacturing a semiconductor device of the present invention includes first coating a resist on an interlayer insulating film, and then exposing it to light through a mask for forming a first contact. , developed, and then exposed, developed, and baked through a second contact forming mask having a smaller contact diameter than the first contact forming mask, and forming a contact hole by dry etching. .

Furthermore, as a second invention, in order to improve the processing accuracy of the contact hole, a resist pattern of the alignment mark is formed when exposed and developed using the first contact forming mask, and a resist pattern of the alignment mark is formed. The method includes a step of aligning a mask for forming a second contact based on the pattern.

Function: With this configuration, the resist pattern of the contact hole itself becomes step-like, and the contact hole is formed in a step-like manner by dry etching, so that a wiring electrode with good coverage can be obtained.

Further, according to the configuration of the second invention, when forming contact holes in a step-like manner, the second contact forming mask is aligned based on the resist pattern of the alignment mark formed by the first contact forming mask. Therefore, there is little misalignment of the contact hole formed by the second mask with respect to the contact hole formed by the first mask, and the processing accuracy for forming the contact hole is improved.

EXAMPLE An example of the present invention will be described below with reference to FIG. As shown in FIG. 2A, a gate electrode 3 is formed on a semiconductor substrate 1 via a gate insulating film 2, and an impurity diffusion layer 4 is formed by ion implantation of an impurity such as arsenic. Next, as shown in FIG. 6(b), an interlayer insulating film 5 made of BPSG (boron-phosphosilicate glass) or the like is formed, and then a positive type film made of a novolac resin such as TSMR-8900 manufactured by Tokyo Ohka Kogyo (Kiku Co., Ltd.) is then formed. photoresist 6 is coated to a uniform thickness of about 1.2 μm, and exposed to G-ray ultraviolet light for 100 µm through a first contact forming mask 7 having alignment marks.
Expose to approximately 0111SeC. Next, as shown in FIG. 2C, by developing the resist with an aqueous solution of an organic alkali such as trimethylammonium hydroxide, a resist pattern 8 for forming a first contact is obtained, and a resist pattern for mask alignment marks is obtained. Get 9. Next, the same figure (
As shown in d), a second contact forming mask 10 having a smaller contact diameter than the first contact forming mask is used to form a resist pattern 9 of the mask alignment mark.
Match the mask based on 2001se with G-ray ultraviolet light.
Exposure to about c. Next, as shown in figure (e), the resist was developed again and baked at 150°C for 30 minutes.
Resist pattern 1 for forming a stepped second contact
Get 1. Next, as shown in FIG. 6(f), contact holes 12 are formed in the interlayer insulating film 5 by anisotropic dry etching.
are formed, and wiring electrodes 13 are formed by sputtering aluminum or the like. Note that this wiring electrode 13 may be formed by a vacuum evaporation method such as an electron beam method in addition to sputtering.

Effects of the Invention As is clear from the above embodiments, the present invention provides a step in which the resist pattern itself of the contact hole has a step-like shape, so that only the dry etching step is required without an extreme increase in the number of steps. Accordingly, it is possible to realize an excellent method for manufacturing a semiconductor device that can form an at-electrode having a good coverage shape in a very fine pattern.

Furthermore, according to the second invention, since the second contact formation mask is aligned based on the resist pattern obtained with the first contact formation mask, a stepped resist pattern can be formed with high precision. This makes it possible to realize an excellent method for manufacturing semiconductor devices.

[Brief explanation of drawings]

1(a) to 1(f) are process diagrams for explaining a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 2(a)
) to (d) are process diagrams for explaining a conventional method of manufacturing a semiconductor device. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 5... Interlayer insulating film, 6... Photoresist, 7... First
10... Second contact forming mask, 12... Contact hole, 13... Wiring electrode.

Claims (2)

[Claims] (1) A step of applying a photoresist to an interlayer insulating film on a semiconductor substrate that has been subjected to a predetermined treatment, a step of exposing and developing the photoresist through a mask for forming a first contact, and a step of applying a photoresist to an interlayer insulating film on a semiconductor substrate that has been subjected to a predetermined treatment, and a step of exposing and developing the photoresist through a mask for forming a first contact. a step of exposing, developing, and baking the photoresist through a second contact-forming mask having a smaller diameter than the first contact-forming mask; and a step of forming a contact hole in the interlayer insulating film by dry etching. A method for manufacturing a semiconductor device, comprising: forming wiring electrodes by a vacuum deposition method such as sputtering. (2) A first contact formation mask includes an alignment mark pattern, a registration mark resist pattern is formed, and a second contact formation mask is aligned based on the alignment mark resist pattern. 2. The method of manufacturing a semiconductor device according to claim 1, further comprising the step of: