JPH03268088A - General evaluation circuit - Google Patents

Abstract

PURPOSE:To fast obtain the score of a candidate character to be recognized by totalizing successively the scores obtained for each area of the same code. CONSTITUTION:A counter 1 is provided together with the latches 2-1, 2-2, the class dictionaries 3-1 - 3-3, the score buffers 4-1 - 4-3, and the adders 5-1 and 5-2. The feature data to be recognized is divided and the scores are given to the classes to serve as the candidates. These scores are successively totalized. Thus it is possible to fast and successively obtain the scores of the code to serve as the candidates in the pipeline processing. In such a constitution, a general evaluation circuit that can obtain the scores at a high speed can be obtained in an associative matching recognition system.

Description

[Detailed Description of the Invention] [Summary] Regarding a comprehensive evaluation circuit that obtains a score in an associative matching method, the present invention aims to provide a comprehensive evaluation circuit that quickly obtains a score in an associative matching recognition method. ,
The division area unit is divided into a plurality of representative classes, the scores of the class to which the division area unit belongs are assigned, and the scores of the classes to which the plurality of codes to be candidates belong are accumulated in the code unit for recognition. In the associative matching method,
A counter for instructing the plurality of codes, a latch circuit that sequentially shifts each time the value of the counter changes, and classes to which the plurality of codes belong are stored in units of the divided areas, and the counter values and the latch circuit a class dictionary addressed by the value to be stored, and a score corresponding to the class within the divided area unit as a class address;
It is configured to include a score buffer to which the class output of the class dictionary is added to the address, and a plurality of adders provided corresponding to the score buffer to sequentially add the scores of the classes output from the score buffer.

[Industrial Field of Application] The present invention relates to a recognition device for characters, speech, etc., and more particularly to a comprehensive evaluation circuit for obtaining a score in an associative matching method.

[Conventional technology]

With the development of computer systems, reading devices have been put into practical use that capture image data, cut out characters from the captured image data, and recognize each character in the text of the read document. This reading device divides the dot data read by an image scanner, etc. into predetermined area units, compares the characters within each division (inside the squares) with the predetermined characters, and finds the most similar character. Outputs characters as the result. This predetermined data is generally stored in a dictionary memory, and the dictionary memory stores, for example, each prescribed character as vF signature data. When a character to be recognized is input, the input character is similarly characterized and the distance from the predetermined characteristic data stored in the dictionary memory is determined.

The smallest character from this determined distance is output as the recognition result.

[Problem to be solved by the invention]

In the method described above, which calculates the distance between feature data and outputs the shortest distance as a recognition result, the more candidate characters there are to be recognized, the more time it takes to recognize them. For this reason, there is an associative matching recognition method that speeds up this recognition process. In this method, first, the region to be recognized, that is, the feature region, is divided, and in each division unit, a class (representing a representative characteristic) and a class to which a candidate, for example, a character, belongs are stored. Then, rank the classes similar to the input feature vector for each divided region, give the highest score to the highest rank, add up the scores of the classes to which the candidate character belongs, and find the one with the highest score as the candidate character. There is. This associative matching recognition method enables faster processing than the exhaustive matching method.

However, as the demand for character recognition increases, the processing speed is also required to be faster.

This associative matching recognition method also has a problem in that as the number of characters increases, it takes longer to process, ie, it takes more time to obtain scores, and the overall recognition processing speed slows down.

SUMMARY OF THE INVENTION An object of the present invention is to provide a comprehensive evaluation circuit that quickly obtains a score in an associative matching recognition method.

[Means for Solving the Problems] FIG. 1 is a block diagram of the present invention. This invention is special! k
Divide the 9M area into a plurality of classes represented by each divided area, assign scores to classes to which each divided area belongs, and assign scores to classes to which multiple codes to be candidates belong to each code unit. This involves an associative matching recognition method that performs recognition by accumulating the information.

Counter 1 indicates a plurality of candidate codes to be recognized.

The latch circuits 2-1 and 2-2 sequentially shift each time the value of the counter 1 changes. Counter l is a counter that increments, and latches 2-1 to 2-2 sequentially shift data each time the value of counter l changes, so the output of counter 1 becomes the maximum value, and the output of counter 1 becomes the maximum value, and the output is sequentially shifted by one lower value. The rough edges 2-1 and 2-2 are stored.

Class dictionaries 3-1.3-2 to 3-5 store classes to which a plurality of codes belong in units of the divided areas, and address them using the value of the counter 1 and the values stored in the latch circuits 2-1 to 22. be instructed.

Each of the score buffers 4-1, 4-2 to 4-3 stores the score using the class of the divided area unit as an address. That is, the scores assigned to the classes output from the class dictionary are stored at addresses corresponding to the classes.

Then, the class output of the class dictionary is added to the address.

Adders 5-0.5-1 to 5-2 are score numbers 4-1
．． Provided corresponding to 4-2 to 4-3, score buffer 4
-1.Sequentially add the class scores output from 4-2 to 4-3. For example, the adder 5-0 adds the initial value etc. and the output (score) of the score buffer 4-1, and then adds the output of the next score buffer 4-2 and the output of the adder 5-0, The results are output to the adder again and the additions are performed sequentially. Note that the adders 5-1 and 5-2 are synchronous type adders that output an addition result every time a synchronization signal is applied.

[For production]

When counter 1 generates an address, that counter addresses class dictionary 3-1. 20 Counter 1 is a circuit that outputs a code to be recognized, and when this value is added to the address, class dictionary 3-1 outputs the class number to which the code belongs to score buffer 4-1. The latches 2-1 to 22 are circuits that sequentially shift the values of the counters, and the latch 2-1 shifts the value of the counter 1 by -1.
Furthermore, the next latch stores a value further decreased by -1.

That is, when the class dictionary 3-1 is addressed by the counter, the class dictionary 3-2 is addressed with the previous output code. Score buffer (4-1, 4-2~4
-3), scores are given to classes and stored in the order of closestness, corresponding to the characteristics of characters to be recognized, etc., determined in units of divided regions. When the score buffer 4-1 is addressed by the class dictionary 3-1, the score of the class addressed by the counter value is added to the adder 5-0.

Note that this value is added to an initial value, for example, 0.

The result is then added to adder 5-1. This adder 5
-0 outputs data when counter 1 increments, and when it increments, the following code is output. At this time, the adder 5-0 is outputting the previous data mentioned above.

The latch 2-1 stores the same value as the counter value during the operation described above, that is, the code, and the class dictionary 3-2 is addressed to the same class as the class dictionary 3-1 by the aforementioned clock. In other words, the same class of divided areas of different areas is designated. Then, it is converted into a score corresponding to that class in the score buffer 4-2 and added to the adder 5-1.

Since the adder 5-1 adds the value output from the score buffer 4-2 and the value output from the adder 5-0, the result is the addition of scores corresponding to the same code. By sequentially repeating the above-described operations, the adder adds up the scores of the same divided area, and finally the adder 5-2 can output the score corresponding to this code.

By the above-described operation, the scores for each area of the same code are sequentially accumulated, so that the scores for candidate characters to be recognized can be obtained at high speed.

(Example〕 The present invention will be described in detail below using the drawings.

FIG. 2 is a system configuration diagram of a character recognition device using a comprehensive evaluation circuit according to an embodiment of the present invention.

Information read by an image scanner or the like is stored in the image memory 10 as image data.

This image memory 10 has a storage capacity for one page read by an image scanner, and stores each dot of read information as white or black two-digit data, that is, 0.1 data.

The image data stored in the image memory 10 is applied to a noise removal module 11 to remove noise generated during reading. For example, the noise removed by this noise removal module 11 is noise unrelated to character information, etc. For example, a 3 x 3 mask with a black center and 8 dots surrounding the center dot.
The dots are noises such as white, and the noise removal module 11 makes the dots in the center white. This noise removal module is provided in the character recognition preprocessing unit 12, but it is not limited to this. For example, it may be performed when storing each character in the normalization module 16, which will be described later. You can also do it at the time of cleansing.

The image information from which noise has been removed by the noise removal module 11 is sent to the row histogram module I3, the column histogram module 14, and further to the readout control module 1.
Join 5. The row histogram module 13 is a module that projects the read information, for example, the content of the paper read by the above-mentioned image scanner, in the column direction in units of dots, and calculates the number of dots in the row for each dot unit.

That is, this is a process of determining how many black dots are present in each one-dot row (horizontal direction) for each one-dot row. Also, the column histogram 14 is a process of projecting in the column direction in the same way as the row histogram described above, and calculating the number of projected black dots.

The row histogram module 13 sequentially counts the dots in the field (dots are read out in the row direction from the image memory 10 one by one) and added through the noise removal module 11 (dot reading similar to raster scanning). (dot rows). Then, the number of black dots is sequentially calculated for each line. The number of black dots becomes the row histogram corresponding to each row. The column histogram I4 also has counters corresponding to the number of dots in one dot row.
Each time a dot is added to a row, the counter corresponding to the black dot is incremented. By performing the above-described operations for one page, the row histogram module 16 and the column histogram module 14 obtain so-called row histograms and column histograms representing the number of dots for each row position and column position, respectively. The result is then applied to the read control module 15.

The readout control module 15 sequentially obtains row positions and column positions from these row histograms and column histograms. For example, this position can be obtained by the period of the row histogram or the period of the column histogram.

The read control module 15 determines the row and column positions, but also performs the following processing. Image data, for example, information read from an image scanner, may have a tilt depending on the position of the paper and the like.

For this reason, the readout control module 15 sequentially changes the angle at which the histogram is obtained so that the column histogram and the row histogram take the maximum value, and obtains a correction angle.

Then, input the image information added from the above-mentioned noise removal module 11 again to obtain the final histogram,
From the point where the row histogram obtained by the corrected slope (the histogram takes the maximum value) changes from 0 to positive (possibly from positive to 0), one line of data corresponding to the slope is read out for one period. The data is stored in a row buffer provided within the control module 15.

The read control module 15 further obtains the column histogram within the row of one row of data stored in the row buffer, cuts out the data from the position where the column histogram changes from 0 to positive, and outputs it to the normalization module 16. It is also output to the conversion table creation module 17.

This extracted data is data for a single character area.

The conversion table creation module 17 is a module that obtains conversion data for normalizing one character by the normalization module 16. It projects the conversion data in the column direction and the row direction on the one character area cut out by the readout control module 15, and The counters in the column and row directions are incremented dot by dot (row and column) from the column and row where the dot exists, and the value up to the final value within the area of one character is determined.

In the normalization module 16, from the final values of the cut-out character in the row and column directions and the size of the cut-out character, the character is enlarged to a character that exists throughout the entire cut-out area. For example 64X64
An enlargement process is performed to make the dot area into one character area. The column direction and row direction values of characters are converted to conversion table creation module 17.
If there are 48 dots (both columns and rows), processing is performed to convert the 48-dot character to 64 dots. In this process, data in a row or column at a specific position is repeated to make the same data and enlarge the characters. Furthermore, in the case of reduction, rows and columns at specific positions are repeatedly read out and ORed together to reduce them as the same row or example.

The normalization module 16 allows one character area, for example 64X
After one character has been enlarged within 64 dots, the thinning module 18 performs a process of thinning the character. In this thinning module 18, one dot (top, bottom, left and right) of the center dot (
3x3), and one dot to the left and the second dot above from the center, for a total of 11 dots, to perform line thinning processing. This mask can also be formed using 9 dots of 3×3.

By controlling the center dot to be O when the pattern is predetermined by the mask described above, thinning of the area around one dot forming a character can be achieved in one process. By sequentially repeating this thinning of the mask, it is possible to create a character with a one-dont line.

For example, 64×6 obtained by the thinning module 18
The 4-dot thinned character is added to the line segmentation module 19 and converted into line segments. This line segmentation module calculates the sum of black dots that exist in the vertical direction from the target dot, that is, the center dot, when they exist in the horizontal direction, when they exist in the upper right and lower left, and when they exist in the upper left and lower right. Each dot is represented by four types of line elements. If the line element belongs to more than one of the above four types, priority is given in the order of, for example, the vertical direction, then the horizontal direction, etc., and in which direction the line element exists is determined for each dot.

Note that if the center is 0 dot, that is, white, it is assumed that no line exists.

In the line segmentation module 19, there are four directions: up and down, left and right, diagonally upward to the right, diagonally upward to the left, and five types, including the case where there is no line element, so the state is expressed as a 3-bit value for each dot. , a total of 3X64X64 information,
Add to feature vector module 20.

The feature vector module 2o divides the line segmentation information obtained by the line segmentation module 19 described above into units of 8 dots in the left, right, top, and bottom, respectively, and divides the divided areas into one area each in the downward and right directions (2× 2 areas) with a total of 16 dots is defined as one vector module area, and count how many line elements exist in the four directions (up/down, left/right, upper right, and upper left) in the l vector module area. . A feature vector is calculated using a 16x16 dot area as one vector module area, but since this one vector module area is moved in units of 8 dots, there are 7 areas in each of the row and column directions, resulting in a total of 7 x 7 feature vectors. This is the area of

In the feature vectorization module 2o, the number of directions is calculated for each area as described above, but when calculating this number, weighting is applied to each area, with the center being higher and the surrounding areas being lower as they move outward. There is. For example, each dot in a 4 x 4 area centered on the weight is given a weight of 4, each of the two dots around it is given a weight of 4, each of the two dots around it is given a weight of 2, and each of the two dots around it is given a weight of 4. Each dot is set to 1, weighting is performed, and a feature vector is determined.

This feature vector has specific characters to be recognized all made the same size by the normalization module 16, so
If they are the same character, they have almost the same feature vector,
The feature vectors differ for each character. However, since there are very similar modules, in the embodiment of the present invention, in order to speed up the calculation process and improve the recognition rate, a standard pattern of feature vectors is used for each feature vectorization region, i.e. Classification is performed within each square, and the distance between the standard pattern of 20 classes and the added unknown human power within each square is determined. That is, the distance between the feature vector in each square of the standard pattern and the feature vector in the square obtained by the feature vector module 2o is determined for each square. Each of the squares is divided into classes (class 1 to class 20), and the distance ranking of the classes within each square is determined in descending order of distance to the fifth class.

The distance calculation module 21 stores this distance in the class dictionary 23-
1 (standard patterns are stored in class units). Note that when searching for individual candidate characters, the candidate dictionary 23-2 is used (at this time, the switch SW selects the candidate dictionary 23-2).

The top selection and score allocation module 22 determines the top five classes mentioned above and determines the score corresponding to each class for each square. That is, the top selection & score assignment module 22 determines the score to be given to each class from the 1st to 5th ranks based on the distance obtained from the distance calculation module 21, and calculates the score of each character. For the first distance (short distance), 5 points are given, then 4 points, 3, 2.1, and so on. These are provided corresponding to squares 1 to 49, respectively. The processing results of the top selection score module 22 are added to the comprehensive evaluation module 24.

The comprehensive evaluation module 24 is a module that calculates the degree of matching between an input object, that is, an input character and its candidate, and has three types of operation: an associative matching mode, an exhaustive matching mode, and an individual matching mode.

The associative matching mode is a mode in which the score of a candidate is calculated from the mask corresponding to the candidate stored in the associative dictionary 23-3 and the class to which the candidate belongs.

The associative dictionary uses the candidate ID as an address for each mask, and the mask ID of the class to which that candidate belongs in that mask.
is stored. This data is obtained by clustering a set of c dim dimension partial vectors corresponding to the mask ID of each candidate according to their (weighted) distances, and only the results are stored in the associative dictionary. At the same time, a class dictionary 23-1 in the distance calculation module is also created correspondingly.

Note that the associative dictionary 23-3 and the class dictionary 23-1 correspond to each other and have the same type. When storing two or more types of dictionaries in one memory, the specification of the dictionary to be used becomes the dictionary reference start position.

The associative dictionary 23-3 is a table in which the class ID: K of the class to which candidate a belongs with mask m is written.
)=, then for candidate a (=1 to c cand), it is obtained as follows. Note that P (m, k) represents the score here. Based on this formula, the overall evaluation value V (a
).

The total matching mode and individual matching mode of the comprehensive evaluation module are modes in which calculations are made for each candidate.

The total matching mode is a=1-c cand, the individual matching mode is J=1~ck ind, a=b(j),
Find the distance expressed as d (m, a). This value V (a) is the (weighted) distance of the feature vector between candidate a and the input object.

The top candidate selection module 25 selects and outputs a plurality of characters, for example, five characters determined from the top in each character correspondence.

The top five characters become the recognition result in the read image data.

All of the operations described above are performed by pipeline processing. That is, data for one page, for example, in the image memory 10 that stores image data is read out by pipeline processing, divided into lines by the control module 15, and outputted to the normalization module 16 in units of characters. The character wheel is subjected to the aforementioned thinning, line segmentation, feature vectorization, and recognition processing.

The top selection module 25 is a module that ranks candidates based on the overall evaluation value and selects the top five candidates.
If the input is in associative exhaustive matching mode ((a'+ v
(modified version of aNa', a = 1~c cand) If it is the individual integer unit mode ((j, v(a)Ij = 1~c kind,
a = b (j)) (Comprehensive evaluation output of individual matching) Descending/ascending order: (Character association two-person order, others: Smallest order). Further, the output is the candidate IDCs arranged in the order of the input sort results or the input order) and their comprehensive evaluation value.

The comprehensive evaluation module according to the embodiment of the present invention shown in FIG. 2 described above has an associative matching mode, an exhaustive matching mode, and an individual matching mode, and the present invention relates to the associative matching mode. Below, the comprehensive evaluation circuit or comprehensive evaluation module of the present invention will be further explained in detail.

The third is a configuration diagram of a comprehensive evaluation circuit according to an embodiment of the present invention.

The counter 30 is a counter that sequentially outputs character codes for adding up evaluation values (scores) for each character, and outputs the counter value or code sequentially every time a clock is applied.

The output of the counter 30 is added to the address of the class dictionary Co-C2 via the buffer 31. Class dictionary C0-C2
stores the class corresponding to the character code for which the feature vector was obtained in units of squares. In other words, the address is a character code, and the class of the characters to which the character code belongs is stored in units of squares.

The class dictionaries CO, C1, and C2 are accessed in common by the count value output from the counter 30, and the same character (
The class number of each cell to which the code) belongs is output from the class dictionary Co-C2, and the buffer module BO-8
2 through the buffer b1b2 in the data buffer b3.
Input to the address terminal of b4.

Data buffer b3. b4 is a buffer that stores scores for classification in units of squares. This data buffer b3. For example, b4 is a memory, and before performing the comprehensive evaluation, the data corresponding to the class number obtained from the scoring module and the class number corresponding to that data are added via buffers b7 and b8, and the class number becomes an address. Data buffer b3. The score is stored in b4. That is, when the class corresponding to the character output from the class dictionary is added to the address of the data buffer b3-b4, the data buffer b3-b4 stores its output, that is, the score, in the buffer b9. Adder A via b10
Add to 1.

Since the output of the counter 30 in response to the first clock is commonly applied to the class dictionaries C0-C2, the values (scores) corresponding to each class are simultaneously added to the adder AI from the buffer module BO-82.

Adder AI is a three-man power adder that adds three scores output from buffer modules BO to B2 and adds it to the first man power of adder A2.

Buffer module BO by adder A1.

The scores of the squares corresponding to Bl and B2 are summed and added to adder A.
2, the next clock is added to the counter 30 and increments the counter. The output of the counter 30 is also applied to a flip-flop 32 (latch), and the output of the counter 30 is
The flip-flop 32 takes in the value before 0 is incremented.

By this flip-flop 32 taking in the value of the counter 30, the class dictionary C3,
The character code corresponding to the score added by the adder AI is added to C4, and the class dictionaries C3 and C4 output the class number to which the character belongs. This class dictionary C3,
C4 is similar to the above-mentioned class dictionaries CO to C2, and stores the class to which the character belongs in units of squares. To explain in more detail, the class dictionary CO~C
2 is square 0. Square 1. While the class number of the code belonging to square 2 is memorized, the class dictionaries C3 and C4
is square 3. It remembers the class of that code for square 4.

When the class dictionaries C3, C4 are addressed by the above-mentioned flip-flop values, the class dictionaries C3, C4 output the class number corresponding to that character code.

Its output is buffer module B3. Join B4. Buffer module B3. B4 has the same configuration as the buffer module BO described above, and the scores to which the class belongs for each cell are stored in advance in the data buffer in the same manner as described above, so that the buffer module B3. B4 outputs the score for that class, and adder A2 outputs the output of adder A1 and buffer module B3. The outputs of B4 are added and applied to adder A3.

Similar to the adder A2 described above, the next class dictionaries C5 and C6
, an adder A3 sequentially adds outputs from a similar buffer module (not shown), and finally an adder An converts the data corresponding to the class in the class dictionary Cm-1° and m into a score using the buffer module. and adder An
Add in addition to.

Then, in step 2, the result is added to the data buffer [)B1 and stored.

The aforementioned class dictionary CO, CL C2, class dictionary C
3゜C4, class dictionaries C5, C6, . . . the addresses added to the class dictionaries (:m-1, Cm) are input by the flip-flop 32 before changing the output of the counter 30 by the first clock. It is then latched by the flip-flop 33, and added to each class dictionary group sequentially by one clock unit.As a result, the result added by the adder AI is further added by the adder A2. However, the scores at that time are obtained by adding the scores of the classes for the same character.Therefore, the total score stored in the data buffer DBI becomes the score corresponding to one code.

On the other hand, the character codes sequentially shifted by flip-flops 32, 33, . As a result, that code is added to the addition result output by the adder An. That is, the data buffer DBIDB2 stores scores and codes (character codes) of the scores.

When each character is divided into 20 classes, the class dictionary co-cm corresponds to each character code and outputs its class number. Then, the data buffer outputs the score corresponding to each class. It can be configured by providing modules. Also, at this time, the square is 4
If there are 9 adders, there will be 28 adders.

Buffer modules BO, Bl, B2, . b8, buffer b5. data buffer b3. It has joined b4. A class number corresponding to each class is added to this 16-bit address bus.
A score corresponding to the class number is added to the 32-bit data bus. In other words, data buffer b3
In order to store data corresponding to the class number in b4,
Data buffer b3. It is stored in b4.

Further, in order to store associative dictionaries (class dictionaries) used from a system computer (not shown) in the class dictionaries CO to Cm, each class dictionary is accessed and stored in class units. This buffer has buffer 36.37
Remember each one through. This class dictionary Co-C
m is also made of RAM, and can be made to correspond to various characters by the above-mentioned rewriting.

In the embodiment of the present invention shown in FIG. 3 described above, 3
The adders A1 to An that add up the individual human power are calculated to perform the accumulation. Note that the present invention is not limited to this, and similar results can be obtained, for example, by using an adder with two inputs to access the class dictionary and buffer module in one event, and adding them sequentially. Further, the adders A1 to An may not be made by three people, but may be made by more than three people. [Effects of the Invention] As described above, according to the present invention, the input and feature data to be recognized can be divided into candidates. Since scores are given to the classes that should become candidates and are accumulated sequentially, the scores of the codes that should be candidates can be sequentially and rapidly calculated by pipeline processing. As a result, a device for high-speed associative matching recognition can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the present invention, FIG. 2 is a system configuration diagram of an embodiment of the invention, and FIG. 3 is a detailed configuration diagram of the embodiment of the invention. 1...Counter, 2-1~2-2...Latch, 3-1.3-2~3-3...Class dictionary, 4-1.4
-2~4-3... ・Score no＼゛・Sofa, 5-1~5
-2... Adder.

Claims (1)

[Claims] A feature region is divided into a plurality of classes represented by each divided region, and scores are assigned to the class to which each of the divided regions belongs, and a class to which a plurality of codes to be candidates belong is divided. In an associative matching method in which recognition is performed by accumulating scores for each code, a counter (1) that indicates the plurality of codes, and a latch circuit (2-1 to 2-1) that sequentially shifts each time the value of the counter changes. 2-2), the class to which the plurality of codes belongs is stored in units of the divided areas, and the value of the counter (1) and the latch circuit (2-2) are stored.
-1 to 2-2), and the class dictionary (3-1, 3-2 to 3-3) addressed by the values stored in the divided area units, and the scores corresponding to the classes in the divided area unit are stored as class addresses. and the score buffer (4-1, 4-2 to 4-3) where the class output of the class dictionary is added to the address.
), and is provided corresponding to the score buffer (4-1, 4-2 to 4-3), and is provided corresponding to the score buffer (4-1, 4-2 to 4-3).
) A comprehensive evaluation circuit comprising a plurality of adders (5-0, 5-1 to 5-2) that sequentially add the scores of classes output from the circuits.