JPH03256016A - Focus state detector - Google Patents

Abstract

PURPOSE:To shorten the time required for the detection end of the focus state or the judgement of a state wherein the focus state can not be detected by controlling the time when the difference between a 1st and a 2nd feature signal corresponding to luminous flux from a subject image reaches a specific value as charge storage time and detecting the focus state from the output of a photoelectric converting means. CONSTITUTION:This device is equipped with the charge storage type photoelec tric converting means 1092, a monitor means 103, an arithmetic means 111, a storage time control means, and a focus detecting means. Two kind of feature signals whose difference corresponds to the value of a contrast are used and the photoelectric converting means 102 finds the integration time when a con trast which is high enough to detect the focus state by arithmetic from the values of the two kind of feature signals when charges are accumulated for a temporary integration time. Consequently, the time up to the end of the detec tion of the focus state and the time up to the judgement of the state wherein the focus state can not be detected can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a focus state detection device in a camera, and more particularly to a focus state detection device that detects a focus state from a phase difference of images.

[Prior Art] A focus state detection device is used in a camera or the like, which uses an image sensor to read information regarding a subject image and detects a focus state based on the read information.

As such a focus state detection device, one is known that detects the focus state using the contrast of a read object. In such a focus state detection device, in order to accurately detect the focus state, it is necessary that the read object information has sufficient contrast. Conventionally, the technology to obtain sufficient contrast for subject information has been based on the charge accumulation time (hereinafter referred to as integration time) of the image sensor.
A known technique is to increase the absolute value of the contrast by increasing the length of the charge as long as possible within the range in which the accumulated charge is not saturated. Further, as a technique for determining the integration time at this time, for example, the following has been used.

The first technique involves repeatedly accumulating charge in the image sensor (hereinafter referred to as integration) while changing the integration time, and finding an integration time at which the peak value or average value of the output signal at that time is at a constant level. It is something. Here, the peak value refers to the maximum value of the output (amount of received light) of each photoelectric conversion element constituting the image sensor, and the average value refers to the average value of the output of each of these photoelectric conversion elements.

The second technique is to arrange another sensor at a position optically equivalent to the image sensor and control the integration time so that the output of the sensor is at a constant level.

The third technique is a technique disclosed in Japanese Patent Application Laid-Open No. 57-64711, in which an element dedicated to integral time control is arranged near the image sensor, and when the output of the element reaches a certain determination level. This is to end the integration of the image sensor. This element dedicated to integral time control is constructed and arranged so that its output is proportional to the average value of the output of the image sensor.

[Issue 11i to be Solved by the Invention] However, in all of the focus state detection devices that detect the focus state using the contrast of the object as described above,
Since the integration time is controlled to maximize the contrast of the subject using the peak value or average value of the image sensor, even if sufficient contrast has already been obtained to detect the focus state, , integration continues until the peak value or average value reaches a certain level (that is, until the contrast reaches the maximum), and therefore the time required to complete the focus state detection becomes longer than necessary. I had an issue.

In addition, if the contrast obtained in this way is not sufficient to detect the focus state, a message indicating that the focus state cannot be detected is displayed, but the contrast obtained is insufficient to detect the focus state. Since the determination as to whether the detection is sufficient or not cannot be made until all calculations are completed, there is also the problem that it takes a very long time to make such a determination.

The present invention has been tried in view of the problems that conventional focus state detection devices have, and is aimed at reducing the time required to complete focus state detection or determining that focus state detection is impossible. It is an object of the present invention to provide a focus state detection device that can shorten the time required for detection.

[Means for Solving the Problems] A focus state detection device of the present invention includes a charge accumulation type photoelectric conversion means that receives a luminous flux from a subject image and outputs a photoelectric conversion signal according to the subject image, and the photoelectric conversion device described above. a monitor means for outputting first and second characteristic signals corresponding to the luminous flux from the subject image for controlling charge accumulation in the means;
and a calculation means for determining a difference between the second characteristic signal and calculating a time during which the difference reaches a predetermined value as a charge accumulation time, and a charge accumulation time of the photoelectric conversion means based on the calculated charge accumulation time. It is provided with an accumulation time control means for controlling, and a focus state detection means for detecting a focus state based on the output of the photoelectric conversion means in which charge is accumulated based on the accumulation time.

[Operation] The focus state detection device of the present invention uses two types of characteristic signals such that the difference between the two corresponds to the magnitude of contrast,
From the values of the above-mentioned two types of characteristic signals when the photoelectric conversion means accumulates charge for a temporary integration time, an integration time is calculated to obtain sufficient contrast to detect the focal state. This is what I did.

[Example] Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram schematically showing the configuration of a focus state detection device according to a first embodiment of the present invention. In the figure, 101 is an optical lens system that guides the light beam from the subject;
02 is a photoelectric conversion device for photoelectrically converting the luminous flux from the subject guided by the optical lens system 101; 103 is a monitor circuit that monitors the output of the photoelectric conversion device 102;
4 is an amplifier circuit that amplifies the output of the photoelectric conversion device 102 with an amplification factor according to the level of the signal monitored by the monitor circuit 103; 105 is an A/D conversion circuit that converts the output of the amplifier circuit 104 into a digital signal; 106 is an A/D conversion circuit that converts the output of the amplifier circuit 104 into a digital signal A/D conversion circuit 1
05 is a memory for storing the output; 107 is a photoelectric conversion device 1;
A driver circuit 108 controls the output signal of 02, and a control circuit 108 controls the entire focus state detection device and performs processing for detecting the focus state. Note that when detecting the integration time, a certain area of the pixel group (photoelectric conversion element group) constituting the photoelectric conversion device 102 is used as a focus area, and the 2N type of the pixel group within this focus area is used. Feature signals (for example, average value, maximum value, minimum value, etc.) are detected, and the integration time is calculated based on these feature signals.

A method of calculating the integral time using such a characteristic signal will be explained. The two types of characteristic signals are:
For example, a maximum value and an average value, a maximum value and a minimum value, etc. can be used, but any type of signal may be used as long as the difference between the two is related to the contrast of the subject. Here, an example will be explained in which the maximum value and the average value are used. Figure 2 shows the maximum value yM and the average value y
It is a graph showing the relationship between A and integration time t. As shown in FIG. 2, since the maximum value yM and the average value yA are each proportional to the integration time t, the difference between them yM-yA is also proportional to the integration time t.

That is, it can be expressed as )'M Yh-α·t+β (1). In addition, α and β are the difference yM−yA between the maximum value and the average value when the integration time t is a certain constant value.
It can be determined by measuring the type. Since the magnitude of contrast necessary to perform focus state detection is determined in advance for each device, after determining α and β, the difference between the maximum value and the average value corresponding to this contrast yM−yA
By substituting the above equation (1), the optimum value of the integration time can be calculated. As described above, according to the present invention, the optimum value of the integration time can be calculated with only two measurements. Note that if β can be approximated to 0 in the above equation (1), the optimum value of the integration time can be calculated by one measurement.

FIG. 3 is a block diagram schematically showing the configuration of a focus state detection device according to a second embodiment of the present invention. In the figures, the same reference numerals as in FIG. 1 indicate the same components as in FIG. 1, respectively. In addition, 109 is an AMI (Asplif'iedMO8Inte) as a photoelectric conversion device.
110 is a band-limiting filter circuit (low-pass filter) based on the value of the MTF product of the lens optical system 101 and AM1109, 11
1 is an arithmetic circuit that performs arithmetic operations to detect a focus state;
12 is a sequence control circuit that controls the entire focus state detection device.

The operation of the focus state detection device shown in FIG. 3 will be explained below.

The light flux of the object is divided into two images (pupil division) by the optical lens system 101 and projected onto the AM 1109. A
M1109 performs photoelectric conversion on each image and sends a signal proportional to the amount of light to monitor circuit 103 and amplifier circuit 104. The monitor circuit 103 monitors the output signal of the AM 1109 in real time, and sends this signal to the sequence control circuit 112 at fixed time intervals or every time it reaches a fixed value. The amplifier circuit 104 amplifies the signal manually input from the AM 1109 at an amplification factor designated by the sequence control circuit 112 and outputs the signal to the filter circuit 110 . The filter circuit 110 extracts AM1 from the manually generated signal.
The high frequency noise generated in the circuit 109 is erased and sent to the A/D conversion circuit 105.

The A/D conversion circuit 105 converts the input analog signal into a digital signal according to the timing given from the sequence control circuit 112, and sends it to the sequence control circuit 112 or the memory 106.

The driver circuit 107 is either the sequence control circuit 112 or □
A control signal for the AM 1102 to output the peak value or average value of the focus area is sent to the AM 1102 in accordance with the signal input from the AM 1102 . The arithmetic circuit 111 receives a command from the sequence control circuit 112, performs a calculation for focus state detection, and sends the calculation result to the sequence control circuit 112.
send to The sequence control circuit 112 controls the entire timing sequence and also controls the lens optical system 10.
Obtain lens information from 1 and drive the lens.

Next, AM1109 will be explained in more detail.

FIG. 4 is an electrical circuit diagram showing the circuit configuration of AM1109. As shown in the figure, the AM1109 includes a sensor control circuit 121 that controls the entire AMI and communicates with the outside, an H control circuit 122 that controls the readout of pixels (photoelectric conversion elements) in the horizontal direction, and pixels in the vertical direction. A V control circuit 123 that controls the readout of each pixel, an R control circuit 124 that controls the reset operation of each pixel, and capacitors C1 to Cn and CD% capacitors C1 to Cn that independently hold the output of each pixel for one horizontal line. Gate 138 to reset Cn and CD
-1 to 138-n and 138-DSC1 to Cn and a game that amplifies and outputs the charges accumulated in CD) 13B
-1 to 13B-n and 133-D, gate 133-1
Gates 131-1 to 131-n and 131-D that read out the signals amplified by ~133-n and 133-D, and gates 1B2-1 to 132- that prohibit accumulation of charge in the capacitors C1 to Cn and CD. n and 132-D, pixel cells DIJ (I-1, 2, -,
n, J-1゜2,...2m), current amplifier (iAmp
) 125, a resistor R3, and a reference level VDD5, a current adding circuit for adding the current of the pixel output determined by the H control circuit 122 and the V control circuit 123 (by appropriately determining the amplification factor) ), pixel signal output v
O51, average value output V. S□, dark level output vDos,
Peak value output VM05, signal line iF Os average value. , transistors 151, 153 and inverter 15 forming a circuit for switching when outputting from
2. Resistor R1*R2 and transistor 136°1 that constitute a circuit for switching the gain when outputting pixel signals
37, gates 134 and 135 for switching between monitor signal output and pixel signal output, signal readout power supply VDD1,
It is composed of a power supply VDD2 for pixel cell DIJ, a power supply VDD3 for resetting pixel cell DIJ, a power supply VDD4 for resetting the output at the time of current addition output, and a switching gate 139.140. In addition, ■The control circuit 122 is connected to the gate 131.
-1 to 131-n and 131-D, the control circuit 123 controls the readout gate of each pixel cell DIJ, and the R control circuit 124 controls the readout gate of each pixel cell DIJ.
Controls the reset gate of Note that the pixel cell D s
o -D HD and D□~D as are pixel cells for measuring dark current (current generated in the pixel cell when no light is irradiated), and other pixel cells (for receiving the luminous flux of the subject image) It is used to remove the influence of dark current from the output of the pixel cell.

FIG. 5 shows the configuration of pixel cell DIJ. The pixel cell is 3
transistors T r I ST r 2 , T r
3 and a photoelectric conversion element PD. Note that Trl is a transistor for resetting the light receiving section,
The transistor Tr3, which is a transistor for amplifying the charge generated by Trz photoelectric conversion, is a readout transistor. Further, 11 is a terminal for inputting a signal for resetting the light receiving section, 12 is a terminal for inputting an output read signal, and 13 is a terminal for inputting a signal for resetting the light receiving section.
I4 is a terminal connected to a power source for setting the light receiving section, I4 is a terminal connected to a power source for pixel cells, and I5 is a terminal for signal output.

Figure '1s6 is a graph showing the relationship between the integration time t during photoelectric conversion and the output current value (output signal) i of the pixel cell.

As shown in FIG. 6, the longer the integration time, the larger the output current.

Next, the filter circuit 110 will be explained in more detail. FIG. 7 shows the internal configuration of the filter circuit 110. In the figure, 701, 702, and 703 are low-pass filters with different bands, and 704, 705, and 703 are low-pass filters with different bands.
06 are low-pass filters 701, 702, and 70, respectively.
This is a transistor used as a switch to switch the output of 3. The outputs of the low-pass filters 701, 702, and 703 are switched by a signal from the sequence control circuit 112.

Next, the overall operation of the focus state detection device will be explained.

First, the integration time determination mode will be explained using FIG. 8.

This mode is performed using only the pixel cells in a certain specified area (focus area) among the pixel cells D1J of the AM1109. Here, as shown in FIG. 9, pixel cells Dwp-DKQ are used.

First, initial settings are performed (step 5T801).

Gates 131-P to 131 in H control circuit 122
-Q is turned on, and a signal instructing the V control circuit 123 to read out the signals of each of the pixel cells DKI to DKN in the second row (the signal input to the terminal I2 in FIG. 5) is turned on. In addition, transistors 132.133-P to 133-
Q, 134 are turned on, and transistor 135.1 is turned on.
38 are turned off.

Next, integration is started and a timer is also started at the same time (step 5T802).

Peak detection is performed (step 5T803).

The peak value is set to the first value V1 in advance.
1 compares the time t1 at this time with a preset high brightness determination time (time required for digital processing of the output of the AM 1109) to (step 5T804).

If il<tH, the average value at this time is read out (step 5T805). To read the average value, transistors 132, 134, and 139 are turned off and transistors 138 and 140 are turned on.

The read average value is amplified by the amplifier circuit 104, high frequency components are removed by the filter circuit 110, and then the A/
The D conversion circuit 105 performs digital conversion to obtain a first average value VAI.

Furthermore, peak detection is performed (step 5T806). The second peak value is set in advance. Subsequently, the average value VA2 at this time is read out (step 5T807).

The calculation circuit 111 executes a contrast calculation subroutine (step 57808). This subroutine is
Peak value V 1 * V 2 and average value data V Al
, VA2 to calculate the optimal value tE of the integration time.

Next, set the end time of integration to tE (step 5T
809). Next, the arithmetic circuit 111 compares this tE with the preset upper limit value tMAX of the integration time (step 5T810), and if tl is less than tMAX, then continues to integrate (step 5T811), and the integration time is equal to or less than tl. Output the average value VAI: (step 5T)
812). Note that this average value is used for later exposure control. On the other hand, if it is t2atMAX, it is determined that there is no contrast necessary for detecting the focus state, and an out-of-focus display is performed (step 5T816). If tl<tH in step 5T804, peak detection is continued ( Step 5T813)
, the average value VA when the output peak value is set in advance
) is read (Step 5T814) and compared with vH, which is a preset value (Step 5T815)
. Here, v8 is the maximum value of the average values required for focus state detection when the peak value is v3.

■A3>■□, it is determined that there is not enough contrast to detect the focus state, and an out-of-focus display is performed (step 5T816). On the other hand, if vA3≦vH, it is determined that the contrast is sufficient, and the time t3 until the output peak value reaches a preset third peak value v3 is determined as the optimal value of the integration time. End the sequence.

Here, the contrast calculation subroutine will be explained.

In the contrast calculation subroutine, it is assumed that the peak value and the average value are linear with respect to the time axis, so if the contrast value (difference between the peak value and the average value) is g, then the following holds true. Using this equation (2),
What is necessary is to find an integration time t (-tH) such that g is larger than the minimum value for enabling focus state detection and the peak value at this time is not saturated. That is, V
E is the peak value when ts-tE, V MAX is the saturation level of the peak value, VAE is the average value when tWtE, V
When C is the minimum contrast value to enable focus state detection, VE<VMAX
...(3) VE −vAt>vc
+++ (4) must hold true. Note that since the present invention aims to shorten the time required to detect the focus state, tE
It is desirable to adopt the minimum value among the values that satisfy equations (3) and (4).

Next, the mode for detecting the focus state will be explained using FIG. 10.

First, pixel cells DKP to I)Ko in the focus area
Then, the output of each pixel cell is read out (step 5T100I). The integration time at this time is the time determined in the above-mentioned integration time determination mode. As in the case of the integration time determination mode, when a predetermined focus area is designated by the H control circuit 122 and the V control circuit 123 and integration is started, the pixel cell D xp-D
Charge (ie, the output of the corresponding pixel cell) is accumulated in capacitors C and -CQ corresponding to KQ. After the integration is completed, ■ When the output readout signal (terminal I2) is turned off by the control circuit 123, the pixel cells DKP to [)VCo
The output of is latched to capacitor Cp-Co. After that, the H control circuit 122 controls the gates 131-P to 13
By controlling on/off of 1-Q, pixel cell D
KP=DIQ outputs are sequentially output from AM1109. Each output value is calculated by a difference calculation circuit not shown in FIG.
The difference with the output of KD is taken and sent to the A/D conversion circuit 105 through the amplifier circuit 104 and the filter circuit 110.

Note that the pixel cell DKD is shielded from light, and the pixel cell D
XP'= D KQ's respective output and pixel cell I) x
By taking the difference from the output of o, the influence of dark current can be removed.

Next, the A/D conversion circuit 105 converts the pixel cell I)xp
~Step 5T to convert the DKQ output into a digital signal
1002) and stored in the memory 106 as an image signal (step 571003).

Subsequently, it is determined whether or not each image signal needs to be corrected (step 5T1004), and if necessary, correction is performed (step 5T1005).

Furthermore, correlation calculation (step 5T1006), standard value calculation (step 5T1007), interpolation calculation (step 5T
1008) are performed sequentially.

After that, the deviation amount calculation (step 5T1009) is performed, and the calculated deviation amount p and the maximum deviation amount j! MAX (step 5TIOIO).

If the calculated shift amount ρ is larger than the maximum shift amount 1' MAX, lens drive a (step 5T1011) is performed. Furthermore, the lens is driven b (step ST1012) to the lens position determined by the interpolation calculation, and the focus state detection mode is ended.

Here, the correlation calculation (step 5T1006) will be explained. FIG. 11 shows the configuration of the optical lens system 101.

In the figure, 211 is a photographing lens, 212 is an aperture, and 21
3 is a C lens, and 214 is an S lens. Also, 109
is AMI. With this configuration, the subject image is divided into pupils, and the two divided images are set at AM1 so that they do not overlap.
109. In addition, FIG. 12 shows two images obtained by pupil division (image A, respectively).

(image B) is shown. By performing correlation calculations ΣIaa--b,,I while shifting the distance between image A and image B by one pixel (the amount by which the images are shifted is called the amount of shift), the two images A and B are Find the distance. That is, the amount of deviation when the correlation calculation value becomes the minimum is the distance between the two.

Further, the standard value calculation (step 5T1007) calculates a value (standard tM) obtained by dividing the correlation calculation value obtained in the correlation calculation (step 5T1006) by the contrast value.

Finally, regarding the interpolation calculation (step ST100g),
This will be explained using FIG. 13. In the figure, the vertical axis is the standard value of the correlation calculation value, and the horizontal axis is the amount of deviation.

Further, S indicates a point where the standard value is the minimum, and 5l-1°81.1 indicates a point shifted by one pixel unit before and after S+, respectively. As shown in the figure, S □.

A straight line yl passing through 81 and the point with the larger standard value among 81.1, and 51-1. S.L. The intersection point S of the straight line y1, which passes through the point where the standard value is smaller than 1 and has an inclination with respect to the vertical axis, and the target straight line y2 is the point that gives the amount of deviation after the interpolation calculation.

In this example, AM1109 is used as the photoelectric conversion device.
For example, CM D (ChargeModu
lation device) type solid-state image sensor and 5IT
(Static Induction Transi
Of course, other non-destructive elements such as a ster type solid-state image sensor may also be used.

Next, a third embodiment of the present invention will be described.

This example uses a sensor (hereinafter referred to as AE) used in an automatic exposure mechanism.
This embodiment differs from the second embodiment in that the average value is detected by a sensor (referred to as a sensor).

FIG. 14 is a block diagram schematically showing the configuration of a focus state detection device according to a third embodiment of the present invention. In the figure, the same reference numerals as in Figure 3 refer to the same numbers as in Figure 3.
Shows the same thing as the figure. Further, 113 is a CCD type photoelectric conversion element (hereinafter simply referred to as CCD), and 114 is a multi-division AE sensor. The light flux passing through the optical lens system 101 is split, and one reaches the camera finder (not shown), and the other is pupil-divided and reaches the CCD 113 and the AE full sensor 14. The output of the CCD 113 is sent to the amplifier circuit 1.
04, the signal is stored in the memory 106 via the filter circuit 110 and the A/D conversion circuit 105. In addition, CCD11B is
Driven by driver circuit 107. The AE sensor 14 performs the following according to the amount of light received by each divided block.
The aperture value (AE value) of the automatic exposure mechanism is output to the sequence control circuit 112.

The arithmetic circuit 111 performs calculations such as correlation calculations based on the data read from the memory 106, and sends the results to the sequence control circuit 112.

The sequence control circuit 112 includes an amplifier circuit 104, a filter circuit 110, an A/D conversion circuit 105, a memory 106,
Driver circuit 107, arithmetic circuit 111, all AE sensors 1
4, and also drives the optical lens system 101 based on the calculation result of the calculation circuit 111.

Next, the operation of the focus state detection device according to this embodiment will be explained according to the sequence shown in FIG. 15.

First, the sequence control circuit 112 controls all the AE sensors 14
The average value VA' of the output near the focus area is estimated (Step 5T1501). A temporary integration time tA' is determined from this VA-' (Step 5T1502).

Note that the provisional integration time 1A- is tA-<tMAX(tM
AX is determined to satisfy the upper limit of the integration time. Further, the average value VA' corresponds to the output value of the AE sensor.

Next, the integration is performed by closing the integration time to 1A- (step 57150B), and pixel outputs outside the focus area are ignored at high speed, and only the outputs within the focus area are read out at low speed (step 5T1504). The A/D conversion circuit 105 performs A/D conversion (Step 5T1505), and detects the peak value, the position of the pixel that outputs the peak value, and the minimum value and the position of the pixel that outputs the minimum value (Step 5T1506).

Contrast calculation (step 5T1507) is performed in the same manner as in the second embodiment described above. Note that, as the average value, the above-mentioned expected average value E' is used.

Based on the result of the contrast calculation, the optimal value tl of the integration time is determined.
NT is determined (step 571508), and the integration is continued until the time from the start of integration reaches t INT (step 5T1509).

Thereafter, the focus state is detected in the same manner as in the second embodiment described above. Note that when detecting the focus state, pixel outputs outside the focus area are ignored at high speed, and only outputs within the focus area are read out at low speed.

In each of the embodiments described above, the peak value and the average value were used as the feature signal, but other feature signals, such as the average value and the Of course, a difference value, a peak value and a minimum value, etc. may be used.

[Effects of the Invention] As explained in detail above, according to the focus state detection device of the present invention, the time required to complete focus state detection or until it is determined that focus state detection is impossible is time can be reduced.

[Brief explanation of drawings]

FIG. 1 is a block diagram schematically showing the configuration of a focus state detection device according to a first embodiment of the present invention, and FIG. 2 is a graph showing the relationship between the maximum value and average value of pixel output and integration time. FIG. 3 is a block diagram schematically showing the configuration of a focus state detection device according to a second embodiment of the present invention, and FIG. 4 is an electric circuit diagram schematically showing the circuit configuration of the AMI shown in FIG. 3. ,
Figure 5 is an electrical circuit diagram schematically showing the configuration of the pixel cell shown in Figure 4, and Figure 6 shows the integration time and output current value of the pixel cell during photoelectric conversion in the pixel cell shown in Figure 5. 7 is a diagram schematically showing the internal configuration of the filter circuit shown in FIG. 3, and FIG. 8 is a diagram showing the sequence of the integration time determination mode of the focus state detection device shown in FIG. FIG. 9 is a conceptual diagram for explaining the specification of the focus area when executing the integral time determination mode shown in FIG. 8, and FIG. A flowchart showing the sequence of the state detection mode, FIG. 11 is a configuration diagram schematically showing the configuration of the optical lens system shown in FIG. 3, and FIG. 12 conceptually shows the relationship between the two images obtained by pupil division. The graph shown in Figure 13 is a graph for explaining the interpolation calculation.
FIG. 4 is a block diagram schematically showing the configuration of a focus state detection device according to a third embodiment of the present invention, and FIG. 15 shows a sequence of an integration time determination mode of the focus state detection device shown in FIG. 14. It is a flowchart. 101... Optical lens system, 102... Photoelectric conversion device, 103... Monitor circuit, 104... Amplification circuit, 1
05... A/D conversion circuit, 106... Memory, 10
7... Driver circuit, 108... Control circuit, 109... AMI, 110... Filter circuit, 1
11... Arithmetic circuit, 112... Sequence control circuit, 113... CCD type photoelectric conversion element (CCD),
114... Automatic exposure mechanism sensor (AE sensor). Figure 1

Claims (1)

[Scope of Claims] Charge accumulation type photoelectric conversion means for receiving a light beam from an object image and outputting a photoelectric conversion signal according to the object image; and the object image for controlling charge accumulation of the photoelectric conversion means. a monitor means for outputting first and second characteristic signals according to the luminous flux from the source, and calculating a difference between the first and second characteristic signals and calculating a time when the difference reaches a predetermined value as a charge accumulation time. calculation means for controlling the charge accumulation time of the photoelectric conversion means based on the calculated charge accumulation time; and accumulation time control means for controlling the charge accumulation time of the photoelectric conversion means based on the calculated charge accumulation time; A focus state detection device comprising: a focus state detection means for detecting a focus state.