JPH03248420A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH03248420A
JPH03248420A JP4637890A JP4637890A JPH03248420A JP H03248420 A JPH03248420 A JP H03248420A JP 4637890 A JP4637890 A JP 4637890A JP 4637890 A JP4637890 A JP 4637890A JP H03248420 A JPH03248420 A JP H03248420A
Authority
JP
Japan
Prior art keywords
impurities
lamp
semiconductor substrate
plasma
reactor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4637890A
Other languages
Japanese (ja)
Inventor
Takashi Kuroi
隆 黒井
Takehisa Yamaguchi
偉久 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP4637890A priority Critical patent/JPH03248420A/en
Publication of JPH03248420A publication Critical patent/JPH03248420A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To enable diffusion of impurities to be controlled for improving the amount of activation and uniformity of implantation distribution of the impurities to be improved by performing a high-speed annealing treatment simultaneously or continuously when introducing the impurities using plasma. CONSTITUTION:An anode 4 is provided within a reactor 3, a plasma is generated by applying voltage to a susceptor 5 which is a cathode electrode, ions are accelerated in the direction of electric field, and impurities are introduced into a semiconductor substrate 1. A crystal plate 6 is mounted to a side wall of the reactor 3 and a lamp 2 such as a tungsten halogen lamp and a reflection plate 7 are mounted to an outside of the crystal plate 6 TO enable RTA treatment to be made. When impurities are introduced into the semiconductor substrate 1 by plasma doping, the semiconductor substrate 1 is rapidly heated by the lamp 2 such as the tungsten halogen lamp simultaneously to activate the introduced impurities or the impurities are introduced into the conductor substrate 1 after plasma doping and are rapidly heated by the lamp 2 continuously to activate the impurities.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は半導体装置の製造方法に関し、特に浅い接合
の形成に適した半導体装置の製造方法に関するものであ
る。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device suitable for forming a shallow junction.

〔従来の技術〕[Conventional technology]

@LsIに代表される半導体製造工程では多数回にわた
る不純物の導入が必要である。不純物を導入する方法と
しては気体や固体の不純物源や直接表面上に堆積したド
ープガラスからの熱拡散法。
In the semiconductor manufacturing process represented by @LsI, it is necessary to introduce impurities many times. Impurities can be introduced by thermal diffusion from gaseous or solid impurity sources or doped glass deposited directly on the surface.

イオン注入法等がある。最新のLSIにおいてはその集
積度が上昇し、トランジスタの微細化が進んでいる。そ
の結果、ショートチャネル効果を抑制するための浅い接
合の形成や高アスペクト比のトレンチの垂直側壁へのド
ーピング等のプロセス技術が必要とされる。従来の方法
の1つであるイオン注入法においては原理も深く理解さ
れているが、低加速電圧大電流の発生が困難であること
や注入に起因する結晶欠陥の回復には注入後に熱処理を
要するために0.1μm程度の浅い接合の形成が困難で
あり、またトレンチ側壁へのドーピングはシャドウィン
グ効果のために未注入部が発生するなどの問題点を生じ
る。
There are ion implantation methods, etc. In the latest LSIs, the degree of integration is increasing, and transistors are becoming smaller. As a result, process techniques such as forming shallow junctions and doping the vertical sidewalls of high aspect ratio trenches are required to suppress short channel effects. The principle of ion implantation, which is one of the conventional methods, is well understood, but it is difficult to generate a large current at a low acceleration voltage, and heat treatment is required after implantation to recover crystal defects caused by implantation. Therefore, it is difficult to form a shallow junction of about 0.1 .mu.m, and doping the sidewalls of the trench causes problems such as the generation of undoped regions due to shadowing effects.

このような問題点を解消するための不純物の導入法の1
つとしてプラズマドーピング法があげられる。この方法
はBZ HA 、 A S H3、P H:+等のドー
ピングガスをH,He、Ar等のガスで希釈し、プラズ
マを発生させ、半導体基板と電極間の電界により半導体
基板に不純物を導入する方法である。この方法を用いる
と、高アスペクト比のトレンチ内部への不純物の導入が
可能となり、また高濃度で浅い接合の形成が可能であり
、また半導体基板への損傷も低減される。
One method of introducing impurities to solve these problems
One example is plasma doping. This method dilutes a doping gas such as BZ HA, A S H3, PH:+ with a gas such as H, He, Ar, etc., generates plasma, and introduces impurities into the semiconductor substrate by an electric field between the semiconductor substrate and an electrode. This is the way to do it. Using this method, it is possible to introduce impurities into the interior of a trench with a high aspect ratio, it is possible to form a shallow junction with a high concentration, and damage to the semiconductor substrate is reduced.

第3図は従来のプラズマドーピング装置を示したもので
あり、ガス導入管8よりリアクタ3内にドーピングガス
が封入され、アノード4とサセプタ5であるカソード電
極の間に放電を起こし、プラズマを発生させることによ
り半導体基板1に不純物を導入する。
Fig. 3 shows a conventional plasma doping apparatus, in which doping gas is sealed into a reactor 3 through a gas introduction pipe 8, and a discharge is caused between an anode 4 and a cathode electrode, which is a susceptor 5, to generate plasma. By doing so, impurities are introduced into the semiconductor substrate 1.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来のプラズマドーピングにおいては半導体基板の表面
近傍に不純物原子が10 ”atoms/cm”以上ド
ーピングされるが、その活性化濃度が低いという問題点
があった。その−例をあげると不純物原子は1.0 ”
atoms/cm’以上ドープされているにもかかわら
ず、活性化量は10 ”/cm’程度である。
In conventional plasma doping, the vicinity of the surface of a semiconductor substrate is doped with impurity atoms of 10 "atoms/cm" or more, but there is a problem that the activation concentration is low. For example, the impurity atom is 1.0"
Even though it is doped with atoms/cm' or more, the activation amount is about 10''/cm'.

その結果、プラズマドーピング後の熱処理は必要不可欠
なものとなり、熱拡散によるキャリアの広がりのために
浅い接合の形成が困難となっている。
As a result, heat treatment after plasma doping has become indispensable, and it has become difficult to form shallow junctions due to the spread of carriers due to thermal diffusion.

さらに、プラズマドーピングによって半導体基板中に導
入される不純物は数百eV〜数KeV程度の低いエネル
ギーで加速されるために被注入面の状態に非常に敏感と
なり、不純物の注入分布の不均一性を生じ、また不純物
濃度のコントロールが困難であるという問題点があった
Furthermore, since impurities introduced into a semiconductor substrate by plasma doping are accelerated at low energies of several hundred eV to several KeV, they are extremely sensitive to the condition of the implanted surface, causing non-uniformity in the impurity implantation distribution. There was also the problem that it was difficult to control the impurity concentration.

この発明は上記のような問題点を解消するためになされ
たもので、プラズマドーピングにより導入された不純物
を大きく拡散させることなく活性化量を向上でき、かつ
不純物の注入分布の均一性を向上できる半導体装置の製
造方法を得ることを目的とする。
This invention was made to solve the above-mentioned problems, and it is possible to improve the activation amount without significantly diffusing impurities introduced by plasma doping, and to improve the uniformity of the impurity implantation distribution. The purpose of this invention is to obtain a method for manufacturing a semiconductor device.

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係る半導体装置の製造方法は、プラズマドー
ピング法によって不純物原子を基板に導入する際、これ
と同時にあるいはこれに連続して高速熱アニール(RT
 A ; Rapid Thermal Anneal
)処理を行うようにしたものである。
In the method for manufacturing a semiconductor device according to the present invention, when impurity atoms are introduced into a substrate by a plasma doping method, rapid thermal annealing (RT) is performed at the same time or in succession.
A; Rapid Thermal Anneal
) processing.

〔作用〕[Effect]

この発明における半導体装置の製造方法により不純物層
を形成した場合、プラズマドーピングと同時にまたは連
続してPTA処理を行うので、不純物の広がりが抑制さ
れ、かつ活性化量を高くできるとともに浅い接合が形成
できる。さらに基板表面反応を促進することによりドー
ピング量を増大させることができ、かつPTA処理温度
をコントロールすることにより基板中の活性化量をコン
トロールすることができる。
When an impurity layer is formed by the method of manufacturing a semiconductor device according to the present invention, since PTA treatment is performed simultaneously with plasma doping or consecutively, the spread of impurities is suppressed, the amount of activation can be increased, and a shallow junction can be formed. . Furthermore, the amount of doping can be increased by promoting the reaction on the substrate surface, and the amount of activation in the substrate can be controlled by controlling the PTA treatment temperature.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図は本発明の一実施例による半導体装置の製造方法
を示す図であり、1は半導体基板、2はランプ、7は反
射板である。
FIG. 1 is a diagram showing a method of manufacturing a semiconductor device according to an embodiment of the present invention, in which 1 is a semiconductor substrate, 2 is a lamp, and 7 is a reflector.

図に示すように半導体基板1にプラズマドーピングで不
純物を導入する際に同時にタングステンハロゲンランプ
等のランプ2で半導体基板1を急加熱することにより、
導入された不純物を活性化する。あるいはプラズマドー
ピングで不純物を半導体基板1に導入し、連続してラン
プ22で急加熱を行い不純物を活性化する。
As shown in the figure, when impurities are introduced into the semiconductor substrate 1 by plasma doping, the semiconductor substrate 1 is simultaneously rapidly heated with a lamp 2 such as a tungsten halogen lamp.
Activate the introduced impurities. Alternatively, impurities are introduced into the semiconductor substrate 1 by plasma doping and then rapidly heated by the lamp 22 to activate the impurities.

また、第2図は本発明の半導体装置の製造方法を実現す
るための半導体製造装置の一例であり、第1図と同一符
号は同一部分を示し、3はリアクタ、4はアノード電極
、5はカソード電極であるサセプタ、6は石英板、8は
ガス導入管、9は排気管、10は排気ポンプ、11は絶
縁物である。
Further, FIG. 2 shows an example of a semiconductor manufacturing apparatus for realizing the semiconductor device manufacturing method of the present invention, in which the same reference numerals as in FIG. 1 indicate the same parts, 3 is a reactor, 4 is an anode electrode, and 5 is an A susceptor is a cathode electrode, 6 is a quartz plate, 8 is a gas introduction pipe, 9 is an exhaust pipe, 10 is an exhaust pump, and 11 is an insulator.

図に示すようにリアクタ3内にアノード4が設けられ、
カソード電極であるサセプタ5に電圧を印加することに
よりプラズマを発生させ、電場方向にイオンが加速され
、半導体基板1に不純物が導入される。リアクタ1の側
壁には石英板6が取り付けられ、石英板6の外側にはタ
ングステンハロゲンランプ等のランプ2と反射板7が取
り付けられ、PTA処理が行えるようになっている。ド
ーピングガスはガス導入口8からリアクタ3内に導入さ
れ、排気口9からポンプ10によって排気される。また
カソード電極であるサセプタ5は絶縁物11によりリア
クタ3と絶縁されている。
As shown in the figure, an anode 4 is provided within the reactor 3,
By applying a voltage to the susceptor 5, which is a cathode electrode, plasma is generated, ions are accelerated in the direction of the electric field, and impurities are introduced into the semiconductor substrate 1. A quartz plate 6 is attached to the side wall of the reactor 1, and a lamp 2 such as a tungsten halogen lamp and a reflector 7 are attached to the outside of the quartz plate 6, so that PTA processing can be performed. The doping gas is introduced into the reactor 3 through the gas inlet 8 and exhausted by the pump 10 through the exhaust port 9. Further, the susceptor 5, which is a cathode electrode, is insulated from the reactor 3 by an insulator 11.

以下、本発明である半導体装置の製造方法の特性につい
て説明する。本発明ではプラズマドーピングと同時にR
TA処理が行われるため、導入された不純物の活性化量
が向上し、かつ急熱短時間処理のため、導入された不純
物の拡散を抑えることができ、その結果、浅い接合の形
成が可能となる。またプラズマドープ中にランプによる
光が半導体基板に照射されるために基板表面反応が促進
され、その結果、導入される不純物の量は増加すること
になる。さらに、RTA処理の温度を変化させることに
より導入された不純物の活性化量をコントロールするこ
とができる。またプラズマドーピングに連続してPTA
処理を行う場合においては急加熱短時間処理が行われる
ために浅い接合の形成が可能となる。
Hereinafter, the characteristics of the method for manufacturing a semiconductor device according to the present invention will be explained. In the present invention, R
Since the TA treatment is performed, the amount of activation of the introduced impurities is increased, and because of the rapid heating and short time treatment, the diffusion of the introduced impurities can be suppressed, and as a result, it is possible to form shallow junctions. Become. Furthermore, since the semiconductor substrate is irradiated with light from a lamp during plasma doping, substrate surface reactions are promoted, and as a result, the amount of introduced impurities increases. Furthermore, the amount of activated impurities introduced can be controlled by changing the temperature of the RTA treatment. In addition, PTA is applied continuously to plasma doping.
When processing is performed, rapid heating and short-time processing is performed, making it possible to form a shallow bond.

なお、上記実施例においてはPTA処理はプラズマドー
ピングと同時あるいはこれに連続して行うようにしたが
、上記実施例の発展例として以下に示すように、各処理
毎に雰囲気を変えてPTA処理を行ってもよい。−例を
あげると、まず最初にNF3 、Cj!zガス等の還元
性の強いガスをリアクタ3内に封入し、PTA処理によ
り急加熱を行う。その結果、基板上に形成されている自
然酸化膜が除去され、不純物の導入される面がクリーニ
ングされる。つぎにリアクタ内のガスを排気し、その後
は上記実施例と同様に、Bz Hb 、AsH3、PH
3等のドーピングガスをリアクタ内に封入してプラズマ
を発生させ、これと同時にあるいは連続してRTA処理
を行う。この一連の処理を行う本実施例においては、上
記実施例に加えて、プラズマドーピング前に自然酸化膜
を除去でき、基板表面をクリーニングできるので、さら
に不純物分布の均一性の向上を図ることができる。
In addition, in the above embodiment, the PTA treatment was performed simultaneously with plasma doping or sequentially, but as a further example of the above embodiment, as shown below, the PTA treatment was performed by changing the atmosphere for each treatment. You may go. -To give an example, first of all, NF3, Cj! A strongly reducing gas such as z gas is sealed in the reactor 3, and rapid heating is performed by PTA treatment. As a result, the native oxide film formed on the substrate is removed, and the surface into which impurities are introduced is cleaned. Next, the gas in the reactor is exhausted, and then Bz Hb, AsH3, PH
A doping gas such as No. 3 is sealed in a reactor to generate plasma, and RTA treatment is performed at the same time or in succession. In this embodiment, which performs this series of processing, in addition to the above embodiment, the native oxide film can be removed before plasma doping, and the substrate surface can be cleaned, so that the uniformity of impurity distribution can be further improved. .

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば、プラズマドーピング
と同時にまたは連続してPTA処理を行うようにしたの
で、半導体基板に高濃度の不純物の導入が可能となり、
かつ浅い接合が形成でき、ショートチャネル効果に強い
、精度の高い半導体装置が得られる効果がある。
As described above, according to the present invention, since the PTA treatment is performed simultaneously with plasma doping or consecutively, it is possible to introduce high concentration impurities into the semiconductor substrate.
In addition, a shallow junction can be formed, and a semiconductor device with high precision that is resistant to short channel effects can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の半導体装置の製造方法を示す断面図、
第2図は本発明の半導体装置の製造方法を実現するため
の半導体製造装置を示す図、第3図は従来の半導体製造
装置を示す図である。 1は半導体基板、2はランプ、3はリアクタ、4はアノ
ード電極、5はカソード電極であるサセプタ、6は石英
板、7は反射板、8はガス導入管、9は排気管、10は
排気ポンプ、11は絶縁物である。 なお図中同一符号は同−又は相当部分を示す。
FIG. 1 is a cross-sectional view showing the method for manufacturing a semiconductor device of the present invention;
FIG. 2 is a diagram showing a semiconductor manufacturing apparatus for implementing the semiconductor device manufacturing method of the present invention, and FIG. 3 is a diagram showing a conventional semiconductor manufacturing apparatus. 1 is a semiconductor substrate, 2 is a lamp, 3 is a reactor, 4 is an anode electrode, 5 is a susceptor which is a cathode electrode, 6 is a quartz plate, 7 is a reflection plate, 8 is a gas introduction pipe, 9 is an exhaust pipe, 10 is an exhaust gas The pump 11 is an insulator. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims] (1)半導体装置の製造方法において、 プラズマを用いて不純物を導入する際、同時あるいは連
続して高速アニール処理を行うことを特徴とする半導体
装置の製造方法。
(1) A method for manufacturing a semiconductor device, characterized in that a high-speed annealing process is performed simultaneously or consecutively when introducing impurities using plasma.
JP4637890A 1990-02-26 1990-02-26 Manufacture of semiconductor device Pending JPH03248420A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4637890A JPH03248420A (en) 1990-02-26 1990-02-26 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4637890A JPH03248420A (en) 1990-02-26 1990-02-26 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH03248420A true JPH03248420A (en) 1991-11-06

Family

ID=12745481

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4637890A Pending JPH03248420A (en) 1990-02-26 1990-02-26 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH03248420A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE1006988A3 (en) * 1993-04-13 1995-02-07 Imec Inter Uni Micro Electr Device for use in the field of rapid thermal annealing techniques
JPH07142421A (en) * 1993-11-22 1995-06-02 Nec Corp Method and equipment for forming shallow junction in semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE1006988A3 (en) * 1993-04-13 1995-02-07 Imec Inter Uni Micro Electr Device for use in the field of rapid thermal annealing techniques
JPH07142421A (en) * 1993-11-22 1995-06-02 Nec Corp Method and equipment for forming shallow junction in semiconductor device

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