JPH0324778U - - Google Patents
Info
- Publication number
- JPH0324778U JPH0324778U JP1989085850U JP8585089U JPH0324778U JP H0324778 U JPH0324778 U JP H0324778U JP 1989085850 U JP1989085850 U JP 1989085850U JP 8585089 U JP8585089 U JP 8585089U JP H0324778 U JPH0324778 U JP H0324778U
- Authority
- JP
- Japan
- Prior art keywords
- connect
- output
- input
- video signal
- digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000037431 insertion Effects 0.000 claims description 6
- 238000003780 insertion Methods 0.000 claims description 6
- 239000002131 composite material Substances 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Studio Circuits (AREA)
Description
第１図は本考案の実施例を示す複合画面表示回
路のブロツク線図、第２図は同実施例のテレビモ
ニタ表示画面図である。
１……映像信号を輝度信号と色差信号とに分離
するデコーダ、３……小画面挿入のためのメモリ
、５……輝度信号と色差信号とを映像信号に変換
するエンコーダ、６……単色画の映像信号発生器
、７……タイマー録画予約内容表示等の文字挿入
回路、８……小画面挿入回路、９……小画面と親
画面の同期関係等を制御するコントロール回路、
Ａ……親画面信号、Ｂ……挿入する小画面信号で
ある。
FIG. 1 is a block diagram of a composite screen display circuit showing an embodiment of the present invention, and FIG. 2 is a diagram of a television monitor display screen of the same embodiment. 1...Decoder that separates the video signal into a luminance signal and color difference signal, 3...Memory for inserting a small screen, 5...Encoder that converts the luminance signal and color difference signal into a video signal, 6...Monochrome picture 7...Character insertion circuit for displaying timer recording reservation contents, etc., 8...Small screen insertion circuit, 9...Control circuit for controlling the synchronization relationship between the small screen and the main screen, etc.
A: Main screen signal, B: Small screen signal to be inserted.
Claims (1)
て行うビデオテープレコーダにおいて、複合映像
信号を輝度信号と２系統の色差信号とに分離する
デコーダ入力に接続し、同デコーダ出力の輝度信
号と２系統の色差信号とをそれぞれアナログ／デ
ジタル変換器に接続し、同アナログ／デジタル変
換器出力の３系統信号をそれぞれデジタルメモリ
回路入力に接続し、同デジタルメモリ回路出力の
３系統信号をそれぞれデジタル／アナログ変換器
入力に接続し、同デジタル／アナログ変換器出力
の輝度信号と２系統の色差信号とをそれぞれ映像
信号に変換するエンコーダ入力に接続し、テレビ
モニタ画面のバツクグランド用の単色画の複合映
像信号発生器出力を文字挿入回路入力とコントロ
ール回路とに接続し、同コントロール回路出力を
前記デジタルメモリ回路に接続し、前記文字挿入
回路出力信号と前記エンコーダ出力の映像信号と
を小画面挿入回路入力に接続し、同小画面挿入回
路出力の複合映像信号をテレビモニタに接続し、
表示画面の一部に入力映像信号を小画面として表
示してなるビデオテープレコーダ。 In a video tape recorder that performs timer recording reservations on the screen display of a TV monitor, the composite video signal is connected to the input of a decoder that separates the luminance signal and two systems of color difference signals. Connect the three signals output from the same analog/digital converter to the digital memory circuit input, and connect the three signals output from the same digital memory circuit to the digital/analog converter. Connect to the input of an encoder that converts the luminance signal and two color difference signals output from the digital/analog converter into video signals, respectively, to generate a single-color composite video signal for the background of the TV monitor screen. connect the output of the controller to a character insertion circuit input and a control circuit, connect the output of the control circuit to the digital memory circuit, and connect the character insertion circuit output signal and the video signal of the encoder output to the small screen insertion circuit input. Then, connect the composite video signal output from the same small screen insertion circuit to a TV monitor,
A video tape recorder that displays the input video signal as a small screen on a part of the display screen.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989085850U JPH0324778U (en) | 1989-07-21 | 1989-07-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989085850U JPH0324778U (en) | 1989-07-21 | 1989-07-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0324778U true JPH0324778U (en) | 1991-03-14 |
Family
ID=31635193
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989085850U Pending JPH0324778U (en) | 1989-07-21 | 1989-07-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0324778U (en) |
-
1989
- 1989-07-21 JP JP1989085850U patent/JPH0324778U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6112437B2 (en) | ||
| JPH0324778U (en) | ||
| JPS61166673U (en) | ||
| JPS60257694A (en) | Television receiver | |
| JPH0518515B2 (en) | ||
| JPS61136678U (en) | ||
| JPH0879646A (en) | Character display circuit | |
| JPS6285060U (en) | ||
| JPH0420786U (en) | ||
| JPH02130180U (en) | ||
| JPS6444764U (en) | ||
| JPH01107307U (en) | ||
| JPS61173990U (en) | ||
| JPH0293492A (en) | Video signal processor | |
| JPH02141185U (en) | ||
| JPS63148989U (en) | ||
| JPS6157764U (en) | ||
| JPH0232286U (en) | ||
| JPS6043077U (en) | Video signal generator | |
| JPS6210580U (en) | ||
| JPS63114565U (en) | ||
| JPS63121984U (en) | ||
| JPH0329990U (en) | ||
| JPH0485881U (en) | ||
| JPS63163086U (en) |