JPH03246962A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To make the driving power of a drive circuit optimum by installing a drive-circuit well-potential supply circuit which supplies only the potential of a well forming the drive circuit from the outside separately from the potential of a well in other peripheral circuit. CONSTITUTION:A drive circuit 6 and a peripheral part 7 are separated by a well-potential separation groove 5. In order to change Ids of P-channel transistors 3, well-potential supply terminals TI is externally set at such well potential as to provided a desired Ids. When the Id of an N-channel transistor 4 is set in the same manner, the driving power of the whole drive circuit can be changed. However, when a large difference is caused between the well potential of the circuit 6 and the well potential of the circuit 7, there is a possibility that a leakage current flows between them. When the grooves 5 is formed for them, it is possible to prevent the leak completely.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit formed with a drive circuit that drives and outputs signals such as clocks and data.

[Conventional technology]

FIG. 4 is a circuit diagram showing a drive circuit in a conventional semiconductor integrated circuit. In the same figure (a), 1.2 is an inverter, inverter 1 consists of transistors larger than the basic size and smaller than those of inverter 2 in the subsequent stage, inputs signal a, and inverter 2 inputs signal a. Output.

Further, in the same figure (b), 3 is a P-channel MO3I-transistor, and 4 is an N-channel Mos transistor.

In the drive circuit shown in FIG.
(and N-channel MOS) transistors with large gate widths were used to drive and output clocks and data.

Next, the operation of the conventional drive circuit shown in FIG. 4 will be explained. The conventional drive circuit, as shown in Figure 4,
An inverter with a gate width large enough to drive loads such as wiring capacitance and gate capacitance, and an inverter with a gate width larger than the inverter that is smaller than that inverter and has a gate width of the basic size used in other peripheral circuits. The structure is such that only an even number of stages (two stages in FIG. 4) are connected in series. In other words, the gate width of the subsequent inverter is large.

Here, the reason why the inverters in the drive circuit are connected in series in only an even number of stages is to keep the logic unchanged, and the reason why the gate width is gradually increased as the later stages increase is to keep the gate width from the basic size. This is because if an inverter with a wide gate width directly drives an inverter with a large gate width, the rise and fall times will become long.

[Problem to be solved by the invention]

Since the conventional drive circuit is configured as described above, once the -degree drive capability, that is, the gate width of the transistor is determined, it cannot be changed after the chip is formed. Therefore, in the wafer process, the drain-source current of the transistor that constitutes the drive circuit ■. If the voltage is too small, there is a problem that it becomes impossible to drive the load to which clocks and the like should be supplied. Also, Fs of the transistor
If you form a transistor with a larger transistor size from the beginning with more margin than the optimal gate width, assuming that it will be completed small, by the time the design is completed, the size will be too large and there will be a lot of through current. There was a problem that power consumption increased.

The present invention has been made in view of these points, and an object thereof is to obtain a semiconductor integrated circuit that can control increase/decrease in the driving capacity of a drive circuit from the outside after the wafer process is completed.

[Means to solve the problem]

In order to achieve such an object, the present invention provides a drive circuit well potential supply terminal for externally supplying only the potential of the well forming the drive circuit separately from the potential of the wells of other peripheral circuits. This is what I did.

[Effect]

In the semiconductor integrated circuit according to the present invention, the drive circuit well potential supply terminal externally supplies a well potential only for the drive circuit, separately from well potentials for other peripheral circuits.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing a drive circuit in an embodiment of a semiconductor integrated circuit according to the present invention. In the same figure, T
l is a P-channel transistor well potential supply terminal for externally supplying the well potential of the P-channel transistor of the drive circuit, and T2 is an N-channel transistor well potential supply terminal for externally supplying the well potential of the N-channel transistor of the drive circuit. Terminals 3 and 4 are P and N channel transistors constituting a drive circuit, TI is an input terminal for signal a, and TO is an output terminal for signal A. Here, as with the conventional example, the transistors constituting the drive circuit have a configuration in which inverters are connected in series in only an even number of stages, and the gate width thereof is also increased in stages as the latter stages are approached.

First, before explaining the operation of the embodiment of the present invention, it will be explained that by changing the well potential, the driving ability of the drive circuit, that is, the drain-source current Ids can be changed. Generally, the threshold voltage Vt of a MOS transistor can be expressed as the following equation (1).

V t =V t (., +γ [bar;
]・・・・・(1) Here, φ in the formula is a constant, Vsb is the substrate potential, that is, the well potential, V t (01 is the threshold voltage when Vsb = 0 (V), and T is the process parameter It is a variable according to, and is expressed by the following equation (2).

r=(jox/ε.X) 2・q・ε, i・N−・−(
2) In equation (2), tOX is the gate oxide film thickness, εO
X is the dielectric constant of SiO□, q is the amount of electron charge, ε5. is S
i is the dielectric constant, and N is the impurity concentration of the substrate. Thus, from equation (1), the threshold voltage Vt of the MOS transistor is the well potential ■. It can be seen that it varies depending on the Formulas similar to the above are described in any literature related to LS,1 design, but here we will use the rcMO3-VLSI design principle J (rPRI
NCIPLES OF CMO5VLSI DESIG
N.J., Neil H.E., Weste, Kamran.
Written by Eshraghian, ADDISONWESL
EY Pt1BLISHING COMPANY Publishing)
Formula on page 41 (2% formula%) Next, we will explain that by changing the threshold voltage ■2, the drain-source current I as changes. I d
The formula for calculating s is V, as well as the design principles of rcMO3/VLSI (PRINCIPLES OF CMOS VL
The formula (2, 2) on page 39 of SIDESIGN) j was used. The formula is shown in the following formula (3).

(0〈V gs V t〈V as)...
・ ・ ・ ・(3) In equation (3), V, 5-VL≦0 is a cutoff state, 0〈■
.

<V, SV, is a linear state, o<v, , -vt<v,
.

indicates a saturated state. In equation (3), V9s is the gate-source voltage, and V4s is the drain-source voltage. Further, β is determined by process parameters and is expressed as in the following equation (4).

β-(μ・ε/1ox) (W/L) ・・−−(
4) In equation (4), μ is the surface effective mobility of electrons, and ε
is the dielectric constant of the gate oxide film. (3) From Part 2, it can be seen that the drain-source current 1ds changes depending on the threshold voltage Vt.

Next, one embodiment of the present invention will be described. In Figure 1,
P to change the Ids of the P-channel transistor
A well potential that provides a desired Ids is externally set to the channel transistor well potential supply terminal TI.

Similarly, by setting the Ids of the N-channel transistor, the driving ability of the entire drive circuit can be changed.

By changing the well potential of the portions forming the drive circuit as described above, the driving ability of the drive circuit can be changed.

However, if a large difference occurs between the well potential of the drive circuit portion and the well potential of the peripheral circuit portion, leakage current may flow between them. To deal with this, the periphery of the drive circuit may be separated by the well potential separation groove 5. FIG. 2 shows an example in which the drive circuit 6 and the peripheral circuit 7 are separated by a well potential separation groove 5.

Next, the third step regarding the manufacturing procedure of the well potential separation groove 5 will be explained.
This will be explained using figures. First, Si wafer 8 (third
Photoresist 9 is applied to the area shown in Figure 3 (a)) (Figure 3 (b).
)) The photoresist 9 is irradiated with ultraviolet rays 11 through a mask 10 (FIG. 3(C)). As a result, only the portion irradiated with the ultraviolet rays 11 can be removed (FIG. 3(d)). Next, Si8 is etched through the photoresist 9 (FIG. 3(e)). Next, after removing the photoresist 9, a SiO□ film 12 is deposited by CVD (chemical vapor deposition) (FIG. 3(f)).

Finally, by dry etching the entire surface,
A groove filled with Sing, that is, a well potential separation groove is formed (FIG. 3 (phantom)).

〔Effect of the invention〕

As explained above, the present invention provides a drive circuit well potential supply terminal for externally supplying only the potential of the well forming the drive circuit, so that the drive capability of the drive circuit can be externally controlled. Even after the chip has been processed, the driving ability of the drive circuit can be optimized from the outside.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a drive circuit in an embodiment of a semiconductor integrated circuit according to the present invention, FIG. 2 is a configuration diagram showing a well potential isolation trench in an embodiment of a semiconductor integrated circuit according to the present invention, and FIG. FIG. 4 is a cross-sectional view showing a method for manufacturing a well potential separation trench, and a circuit diagram showing a drive circuit in a conventional semiconductor integrated circuit. 3...P channel transistor, 4...N channel transistor, T1...P channel transistor well potential supply terminal, T2...N channel transistor well potential supply terminal, TI...input terminal, To...・Output terminal.

Claims (1)

[Claims] In a semiconductor integrated circuit in which a drive circuit for driving and outputting signals such as clocks and data is formed, a drive for externally supplying only the potential of the well forming the drive circuit separately from the potential of the wells of other peripheral circuits. A semiconductor integrated circuit comprising a circuit well potential supply terminal.