JPH03246942A - Production of semiconductor substrate - Google Patents

Production of semiconductor substrate

Info

Publication number
JPH03246942A
JPH03246942A JP4384590A JP4384590A JPH03246942A JP H03246942 A JPH03246942 A JP H03246942A JP 4384590 A JP4384590 A JP 4384590A JP 4384590 A JP4384590 A JP 4384590A JP H03246942 A JPH03246942 A JP H03246942A
Authority
JP
Japan
Prior art keywords
semiconductor substrate
substrate
resin layer
resin
polyimide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4384590A
Other languages
Japanese (ja)
Inventor
Yoshio Watanabe
渡辺 良男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP4384590A priority Critical patent/JPH03246942A/en
Publication of JPH03246942A publication Critical patent/JPH03246942A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To flatten and smooth a substrate surface by forming and baking a resin layer after etching a baked resin layer. CONSTITUTION:On a semiconductor substrate 101, resin(polyimide) 102 is formed by a spin coater and baked at 200 deg.C for one hour to be softened. Then, the substrate is etched by O2 plasma and the top of a projecting part is completely exposed. At this time, the resin 102 in a recessed part remains 1.6mum below the top of the projecting part. A resin layer is formed on the substrate 101 and the level difference of 1.6mum is filled. Then, the layer is baked to be flatten allowing 0.2mum level difference. Thus, the smooth substrate surface is flattened.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は半導体基板の製造方法に関し、特に半導体基板
表面の平坦化の改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor substrate, and particularly to improvement in planarization of the surface of a semiconductor substrate.

[従来の技術] 従来より半導体基板表面を平坦化する方法として、樹脂
層を形成して表面の凹凸及びうねりを平坦化するという
技術があり、多層配線構造を有した半導体装置等の製造
工程において広く一般に用いられている。
[Prior Art] Conventionally, as a method for flattening the surface of a semiconductor substrate, there is a technique of forming a resin layer to flatten surface irregularities and undulations. Widely used.

樹脂層を形成する方法としては、ロールコータ、スピン
ナ、印刷等により塗布し形成する方法がある。
As a method for forming the resin layer, there is a method of coating and forming using a roll coater, a spinner, printing, etc.

凹凸の段差や段差間の空間部が大きくなると平坦化は間
離になるが、特開平1−188801号公報の様に、樹
脂を基板表面に充填することによって平坦化する方法が
提案されている。この方法は全面にわたる平坦性を実現
するもので、前記微小部分の平坦化に対して、平滑化と
呼び区別する。
If the uneven steps or the spaces between the steps become large, the planarization becomes more difficult, but as in Japanese Patent Application Laid-open No. 1-188801, a method of flattening by filling the substrate surface with resin has been proposed. . This method achieves flatness over the entire surface, and is called smoothing to distinguish it from flattening the minute portions.

[発明が解決しようとする課題] しかしながら、樹脂は、溶剤の揮発あるいは樹脂自体の
特性によって焼成時に熱変形が生じる。
[Problems to be Solved by the Invention] However, the resin undergoes thermal deformation during firing due to the volatilization of the solvent or the characteristics of the resin itself.

このため充填し平坦化した塗布を行っても、焼成後は半
導体基板の凹凸を反映した塗布量に応じて変形が起こり
、平坦化は難しい。また充填塗布するための治具を走ら
せるため、平坦化したい基板の形状が限定され、その基
板専用の治具を作成しなければならない。充填塗布は、
基板表面の凹凸の段差や段差間の空間部が大きな場合有
効な平坦化法ではあるが、塗布の作業性及び再現性は必
ずしもよいとはいえず、さらに前記治具と半導体基板の
物理的接触は基板表面の損傷の原因となる恐れがある。
For this reason, even if a filled and flattened coating is performed, after baking, deformation occurs depending on the coating amount reflecting the unevenness of the semiconductor substrate, making flattening difficult. Furthermore, since a jig for filling and coating is run, the shape of the substrate to be flattened is limited, and a jig specifically for that substrate must be created. Filling application is
Although this is an effective planarization method when there are large uneven steps or spaces between steps on the substrate surface, the workability and reproducibility of coating are not necessarily good, and furthermore, the physical contact between the jig and the semiconductor substrate may be difficult. may cause damage to the substrate surface.

通常、樹脂層を数回重ねて形成し平坦化する法が用いら
れているが、凹凸の段差や段差間の空間部が大きくなる
と基板の表面形状に沿った樹脂層が形成され、平坦化す
るには膜厚を非常に厚くしなければならない、これには
大量の樹脂を必要とし製造工数も多くなる。また前記し
た樹脂の熱変形によって表面の凹凸及びうねりは容易に
は解消されず、平坦化が困難であるという課題を有して
いた。
Normally, a method is used in which a resin layer is formed by stacking it several times and then flattened, but if the uneven steps or the spaces between the steps become large, the resin layer will be formed to follow the surface shape of the substrate, resulting in flattening. The film must be extremely thick, which requires a large amount of resin and requires a large number of manufacturing steps. Moreover, the unevenness and waviness of the surface due to the thermal deformation of the resin described above cannot be easily eliminated, making it difficult to flatten the surface.

本発明は、このような従来の欠点を解決するもので、そ
の目的とするところは、簡単な製造工程で半導体基板表
面の凹凸を平坦化できるとともに、全面にわたって均一
に平滑化することができる半導体基板の製造方法を提供
するものである。
The present invention is intended to solve these conventional drawbacks, and its purpose is to flatten the unevenness of the surface of a semiconductor substrate with a simple manufacturing process, and to provide a semiconductor that can be uniformly smoothed over the entire surface. A method for manufacturing a substrate is provided.

[課題を解決するための手段] 本発明の半導体基板の製造方法は、 a)前記半導体基板上に樹脂層を形成する工程と、b)
前記樹脂層を焼成する工程と、 C)前記焼成した樹脂層を所定量エツチングする工程と
、 d)前記エツチングした樹脂上に樹脂層を形成する工程
と、 e)前記樹脂層を焼成する工程、 からなることを特徴とする。
[Means for Solving the Problems] A method for manufacturing a semiconductor substrate of the present invention includes: a) forming a resin layer on the semiconductor substrate; and b)
C) etching the fired resin layer by a predetermined amount; d) forming a resin layer on the etched resin; e) firing the resin layer. It is characterized by consisting of.

[実施例] 以下、本発明の一実施例について図面を用いて詳細に説
明する。
[Example] Hereinafter, an example of the present invention will be described in detail using the drawings.

実施例においては、凹凸が約10μmのピッチで等間隔
に並び、深さ方向に約4μmの段差を有した半導体基板
を用いた。
In the example, a semiconductor substrate was used in which unevenness was arranged at regular intervals with a pitch of about 10 μm and had a step difference of about 4 μm in the depth direction.

まずこの基板上にスピンコータを用いてポリイミドを塗
布する。
First, polyimide is applied onto this substrate using a spin coater.

次にポリイミドを200℃で約1時間焼成し、完全に硬
化させる。焼成後ポリイミド層は第1図(a)の様な形
状に変化する。このとき凹部はポリイミドによってほぼ
満たされており、凸部との段差は約1.6μmになる。
Next, the polyimide is baked at 200° C. for about 1 hour to completely cure it. After firing, the polyimide layer changes into a shape as shown in FIG. 1(a). At this time, the concave portion is almost filled with polyimide, and the difference in level from the convex portion is about 1.6 μm.

次に02プラズマを使いポリイミドのエツチングを行う
、第1図(b)の様に凸部の上面が完全に露出した時点
でエツチングを終了する。エツチングは所定の膜厚を全
面にわたって均等に除去するので、このとき凹部のポリ
イミドは凸部の上面から1.6μm下方の高さまで残っ
ているはずである。
Next, polyimide is etched using 02 plasma, and the etching is terminated when the upper surface of the convex portion is completely exposed as shown in FIG. 1(b). Since etching uniformly removes a predetermined film thickness over the entire surface, the polyimide in the concave portion should remain at a height of 1.6 μm below the top surface of the convex portion.

次に再びこの基板上にポリイミド層を形成する。Next, a polyimide layer is formed again on this substrate.

これは実質的に1.6μmの段差を埋めるのと同じであ
る。
This is essentially the same as filling a 1.6 μm step.

焼成後は第1図(c)の様になり、段差は約0゜2μm
まで平坦化される。
After firing, it will look like Figure 1 (c), with a step difference of approximately 0°2 μm.
flattened to.

さらに平坦化する場合は、02プラズマを使って同様に
エツチングし、ポリイミドを塗布することによりほぼ完
全に平坦化される。
When further planarization is desired, etching is performed in the same manner using 02 plasma, and polyimide is applied to achieve almost complete planarization.

本発明の別な実施例としては、最初にポリイミドを2回
重ねて塗布することにより、焼成後の段差は0. 6μ
mまで縮まる。このときポリイミドの膜厚は8μm程度
である。この後実施例と同様にエツチングし、ポリイミ
ドを塗布すれば、段差は0.1μm以下に平坦化される
。ただしエツチングする膜厚が大きくなると、均一に除
去されずエツチング量にむらが生じる可能性があるので
注意する必要がある。
In another embodiment of the present invention, by first applying polyimide twice, the level difference after firing is 0. 6μ
Shrinks to m. At this time, the polyimide film thickness is about 8 μm. After that, etching is carried out in the same manner as in the embodiment, and polyimide is applied, thereby flattening the level difference to 0.1 μm or less. However, care must be taken because if the film thickness to be etched becomes large, it may not be removed uniformly and the amount of etching may become uneven.

このように半導体基板表面の微小部分の平坦化だけでな
く、基板全面にわたる平滑化も簡単に行うことができる
。本実施例で用いたものとは異なる矩形型形状を有した
基板でも同様に平坦化でき、さらに基板の表面形状に応
じて樹脂の粘度を適当に調整すれば、塗布を重ねる必要
はなくなり製造工程をより簡単にできる。一方、本実施
例における塗布とエツチングを繰り返すことによってほ
ぼ完全な平坦化及び平滑化をも実現できる。
In this way, it is possible to easily flatten not only a minute portion of the surface of the semiconductor substrate but also the entire surface of the substrate. A substrate with a rectangular shape different from that used in this example can also be flattened in the same way, and if the viscosity of the resin is adjusted appropriately according to the surface shape of the substrate, there is no need for repeated coatings and the manufacturing process can be done more easily. On the other hand, by repeating the coating and etching in this embodiment, almost complete planarization and smoothing can be achieved.

以上のように本発明は、半導体基板の形状あるいは微小
な表面形状にとられれることなく、表面が平滑な半導体
基板を得ることができる。
As described above, the present invention makes it possible to obtain a semiconductor substrate with a smooth surface without being limited by the shape of the semiconductor substrate or the minute surface shape.

なお本発明の実施例では樹脂にポリイミドを用いたが、
他の樹脂を用いた場合でも本発明の方法により平坦化さ
れるので、本発明は有効である。
Although polyimide was used as the resin in the examples of the present invention,
Even when other resins are used, the present invention is effective because flattening can be achieved by the method of the present invention.

また半導体基板表面が本発明の実施例の矩形型形状以外
の場合でも平坦化効果があり、本発明は有効である。
Further, even when the semiconductor substrate surface has a shape other than the rectangular shape of the embodiment of the present invention, the flattening effect can be achieved and the present invention is effective.

さらに多層構造を有した半導体装置の製造においても本
発明の方法により平坦化を行うことができるので、本発
明は有効である。
Furthermore, the present invention is effective even in the manufacture of semiconductor devices having a multilayer structure, since planarization can be performed by the method of the present invention.

[発明の効果] 以上述べてきたように本発明によれば、半導体基板の表
面形状に影響されることなく、平滑な半導体基板を簡単
な方法で得られるものである。これにより基板上に透明
電極の形成、加工が容易にできる。また表面が平坦であ
るので、多層構造を構成する一要素として加工すること
ができる。
[Effects of the Invention] As described above, according to the present invention, a smooth semiconductor substrate can be obtained by a simple method without being affected by the surface shape of the semiconductor substrate. This allows easy formation and processing of transparent electrodes on the substrate. Furthermore, since the surface is flat, it can be processed as an element constituting a multilayer structure.

本実施例の別の効果として、均一なギャップのパネルを
作成することができるので、液晶パネル等に用いられる
光導電体として応用することができる。
Another effect of this embodiment is that it is possible to create a panel with a uniform gap, so it can be applied as a photoconductor used in liquid crystal panels and the like.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(c)は本発明の一実旌例における工程
の断面図である。  2 半導体基板 樹脂 以 上
FIGS. 1(a) to 1(c) are cross-sectional views of steps in one embodiment of the present invention. 2 More than semiconductor substrate resin

Claims (1)

【特許請求の範囲】 半導体基板上に樹脂層を形成して前記半導体基板表面の
凹凸及びうねりを平坦化する方法において、 a)前記半導体基板上に樹脂層を形成する工程と、b)
前記樹脂層を焼成する工程と、 c)前記焼成した樹脂層を所定量エッチングする工程と
、 d)前記エッチングした樹脂上に樹脂層を形成する工程
と、 e)前記樹脂層を焼成する工程、 からなることを特徴とする半導体基板の製造方法。
[Claims] A method for flattening unevenness and undulations on the surface of the semiconductor substrate by forming a resin layer on the semiconductor substrate, comprising: a) forming a resin layer on the semiconductor substrate; b)
c) etching the fired resin layer by a predetermined amount; d) forming a resin layer on the etched resin; e) firing the resin layer; A method for manufacturing a semiconductor substrate, comprising:
JP4384590A 1990-02-23 1990-02-23 Production of semiconductor substrate Pending JPH03246942A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4384590A JPH03246942A (en) 1990-02-23 1990-02-23 Production of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4384590A JPH03246942A (en) 1990-02-23 1990-02-23 Production of semiconductor substrate

Publications (1)

Publication Number Publication Date
JPH03246942A true JPH03246942A (en) 1991-11-05

Family

ID=12675069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4384590A Pending JPH03246942A (en) 1990-02-23 1990-02-23 Production of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH03246942A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007173765A (en) * 2005-11-24 2007-07-05 Tokyo Electron Ltd Substrate processing method, and apparatus therefor
JP2016149576A (en) * 2016-05-09 2016-08-18 東京エレクトロン株式会社 Film formation method, program, computer storage medium, and film formation system
US9741559B2 (en) 2013-02-22 2017-08-22 Tokyo Electron Limited Film forming method, computer storage medium, and film forming system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007173765A (en) * 2005-11-24 2007-07-05 Tokyo Electron Ltd Substrate processing method, and apparatus therefor
US9741559B2 (en) 2013-02-22 2017-08-22 Tokyo Electron Limited Film forming method, computer storage medium, and film forming system
JP2016149576A (en) * 2016-05-09 2016-08-18 東京エレクトロン株式会社 Film formation method, program, computer storage medium, and film formation system

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