JPH03245691A - Contour emphasis circuit for display screen - Google Patents

Abstract

PURPOSE:To reduce cost remarkably and to realize high performance by providing a D/A converter circuit converting relevant digital R, G, B signals into analog R, G, B signals while expanding or contracting a time base of the digital R, G, B signals by a multiple of a ratio of a period of a clock signal after phase modulation with respect to the clock signal before phase modulation. CONSTITUTION:A memory control circuit 31b in a time base expansion contraction section 31 writes a digital R signal fed to an input terminal 30 via a pre- stage delay circuit 14 into a buffer memory 31a synchronously with a clock signal CK before phase modulation fed to an input terminal 34. The time base is reduced as to the center of the original waveform of the luminance signal and the time base as to the periferal part is expanded and the analog luminance signal subject to contour emphasis is outputted from a main body section 32. After digital R, G, B signals fed respectively to input terminals I1, I2, I3 are differentiated by digital differentiating circuit 11, the signal is converted into an analog signal by a D/A converter circuit 12 to generate a phase modulation signal with respect to the clock signal.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a circuit for enhancing the outline of a display screen installed in a television receiver, a personal computer, or the like.

(Prior Art) In a TV set, outline enhancement is performed to make the display screen clearer. One of these edge enhancement methods is a speed modulation method in which the scanning speed of an electron beam of a cathode ray tube is modulated by a differential waveform of a luminance signal. For details of this speed modulation method, please refer to the specifications of Japanese Patent Publication No. 55-2114 and Japanese Patent Publication No. 63-992, if necessary.

Other edge enhancement methods include a method that uses a digital filter circuit to enhance high frequencies of luminance signals and color signals. For details of this high-frequency emphasis method using a digital filtering circuit, please refer to Japanese Patent Publication No. 1-3 related to the applicant's earlier application, if necessary.
Please refer to the specifications of Nos. 0347 to 30350.

(Problems to be Solved by the Invention) In the conventional contour enhancement method using speed modulation described above, a high voltage deflection system is operated. Large and expensive parts are required, resulting in high costs.

On the other hand, the conventional high-frequency emphasis method using a digital filter circuit described above is in line with the technological trend of converting an analog video signal into a digital signal and performing various image quality improvements such as Y/C separation and noise removal. ing. However, this high-frequency emphasis method has a problem in that it requires a relatively complex and expensive digital filtering circuit. Furthermore, the high-frequency emphasis method using a digital filter circuit has a problem in that characteristics are likely to deteriorate due to ringing.

(Means for Solving the Problems) A display screen edge enhancement circuit according to the present invention creates an analog differential signal of an R, G, B signal or a luminance signal in a digital or analog format, and uses this analog differential signal at a predetermined period. The digital luminance signal is phase modulated, and the digital luminance signal is converted into an analog luminance signal while expanding or contracting the time axis of the digital luminance signal by a ratio of the period of the clock signal before and after the phase modulation.

That is, according to the display screen edge enhancement circuit according to the present invention, edge enhancement is performed within the digital video signal processing system by expanding and contracting the time axis, similar to the conventional speed modulation method, and this can be performed within the deflection system. Significant cost reduction and high performance can be achieved compared to conventional techniques.

In addition, since the display screen contour enhancement circuit according to the present invention is mainly composed of a differential circuit, a phase modulation circuit, etc. with a simple configuration, it is compared to a conventional circuit mainly composed of a digital filtering circuit with a relatively complicated configuration. This will result in lower costs.

Hereinafter, the operation of the present invention will be explained in detail together with examples.

(Embodiment) FIG. 1 is a block diagram showing the configuration of a display screen contour emphasizing circuit according to an embodiment of the present invention.
s is a digital R that forms the display screen for contour emphasis;
G and B signal input terminals, I4 is a clock signal CK input terminal, 1.2.3 are digital R, G, and B signal edge enhancement circuits, respectively, 01, ox, and 03 are display screens that have undergone edge enhancement processing, respectively. Analog R, G, B forming
This is a signal output terminal. Note that the R, G, and B signals are the three primary color signals red (Red), green (Green) + blue (B
This is a signal indicating a gradation of 1ue).

The digital R, G, B signal contour emphasizing circuit 1゜2.3 includes a digital differentiating circuit 11, a D/A converting circuit 12,
It is composed of a clock phase modulation pre-processor 3, a delay circuit 14, and a time axis expansion/contraction/D/A conversion circuit 15.

As illustrated in FIG. 2, the digital differential circuit 1 shown in FIG. and an adder 22 that adds the signals of , and outputs a signal obtained by differentiating the digital luminance signal supplied from the input terminal 2o to the output terminal 23.

The time axis expansion/contraction/D/A conversion circuit 15 in FIG. 1 is composed of a time axis expansion/contraction section 31, a main body section 32, and a low pass filter section 33, as shown in FIG. The time axis expansion/contraction section 31 at the previous stage includes a buffer memory 31a and a memory control circuit 3.
It is composed of lb. The rear main body part 32 is
It has a well-known configuration consisting of a combination of a switch, a resistor network, and a group of operational amplifiers.

The delay circuit 14 in FIG. 1 differentiates the digital R signal in the differentiating circuit 11, converts it into an analog differential signal in the D/A converter circuit 12, and uses the analog differential signal to phase-modulate the clock signal CK. This is for delaying the original digital R signal by 40 seconds and supplying the delayed original digital R signal to the signal input terminal of the time axis expansion/contraction/D/A conversion circuit 15.

Input terminal 1 in FIG. The digital R signal supplied to the
These include those in which the signal is sampled with a clock signal of a predetermined frequency (eg, four times the frequency of the color printing carrier wave) and then D/A converted, and those created in a personal computer.

As shown in FIG. 4, the original analog R signal is exemplified by waveform (A), and the clock signal CK of a predetermined period for sampling during D/A conversion is exemplified by waveform (B). make it a thing.

In this case, the digital R signal supplied to the input terminal (2) has a waveform (C).

However, this waveform (C) is displayed in the form of discrete sampling data before conversion to a binary signal so that the change in amplitude can be seen at a glance.

By supplying this digital R signal to the digital differentiation circuit 11, a digital differentiation signal shown in waveform (D) is created. This digital differential signal is sent to the next stage D/
By being converted into an analog differential signal by the A conversion circuit 12, the clock signal CK of a predetermined period supplied from the waveform (E) is converted into a pulse phase by the analog differential signal (E) output from the D/A conversion circuit 12. Modulated. This pulse phase modulation is also called pulse position modulation (PPM) and is well known as one of the most basic pulse modulation methods along with pulse amplitude modulation (PAM) and pulse width modulation (PWM).

When the polarity of the modulating signal shown in waveform (E) is positive, the phase of the modulated signal (B) advances in proportion to its amplitude, and when the polarity of the modulating signal is negative, it advances in proportion to the absolute value of its amplitude. Assume that the phase of the modulated signal (B) is delayed. In this case, the interval of the clock signal CK' after modulation is the modulation signal (E)
It is densest in the region of change from negative to positive, and coarsest in the region of change from zero to negative and from positive to zero.

Therefore, as shown in waveform (F), a phase-modulated clock signal CK' is generated by the clock signal phase modulation circuit 13, and is supplied to the D/A conversion circuit 15 together with the clock signal CK before phase modulation.

The D/A conversion circuit 15 having the configuration shown in FIG.
The time axis of the digital R signal that has passed through step 4 is expanded or contracted by the ratio of the clock signal period before and after phase modulation, and converted into an analog luminance signal.

That is, the memory control circuit 31b in the time axis expansion/contraction section 31
The digital R signal supplied to the input terminal 30 via the previous stage delay circuit 14 is sent to the buffer memory 3 in synchronization with the clock signal CK before phase modulation supplied to the input terminal 34.
1a, this memory control storage 31b reads out the written digital R signal from the buffer memory 31a in the writing order in synchronization with the clock signal CK' after phase modulation and passes it to the main unit 32, thereby controlling the time axis. Specifically, such a time axis expansion/contraction unit 31 that performs expansion/contraction is realized by a FIFO or the like that uses clock signals CK and CK' as a write clock and a read clock, respectively.

As a result, as is clear from the waveform (G) in FIG. 4, the time axis of the central part of the original waveform of the luminance signal shown by the dotted line is reduced, and the time axis of the surrounding part is expanded. As a result, an analog luminance signal indicated by a solid line that has undergone contour enhancement is output from the main body section 32.

The contour-enhanced analog luminance signal output from the main body section 32 is output to the output terminal 01 via the low-pass filter section 33 and the output terminal 34. This low pass filter circuit 3
3 is for removing harmonic components generated in the digital differentiation circuit 11 and the main body section 32 at the previous stage.

Digital G supplied to input terminals It and I.

Similarly, for the B signal, the time axes of the original G and B signals are expanded or contracted by the differential signal indicating the appearance of a contour in each of the corresponding contour emphasizing circuits 2 and 3, and the contour is emphasized.

As described above, the digital R, G, and B signals supplied to the input terminals It, It, and I3 are connected to the digital differentiating circuit 11.
A configuration has been described in which a phase modulation signal for a clock signal is created by differentiating the signal and then converting it into an analog signal in the D/A conversion circuit 12. However, instead of this configuration, the digital R, G, and B signals supplied to the input terminals III Is and Is are first converted into analog R, G, and B signals by a D/A conversion circuit, and then these are converted into analog differential signals. A configuration may also be adopted in which a phase modulation signal for a clock signal is created by supplying it to a circuit.

FIG. 5 is a block diagram showing the configuration of a display screen contour emphasizing circuit according to another embodiment of the present invention;
I 1! ＋I! 3 are input terminals for analog R, G, and B signals forming the display screen for contour enhancement, respectively; 1;
14 is an input terminal for a clock signal, 41.42° 43 is a contour emphasis circuit for analog R, G, and B signals, respectively.
, o, , Oss are output terminals for analog R, G, and B signals forming a display screen with enhanced contours, respectively.

Analog R, G, B signal contour enhancement circuit 4142.43
As representatively shown by the analog R signal contour enhancement circuit 41, the analog differential circuit 51, the A/D conversion circuit 52, the clock phase modulation circuit 53, the delay circuit 54, the time axis expansion/contraction/
It is composed of a D/A conversion circuit 55.

The analog R signal supplied to the input terminal 1++ is differentiated by an analog differentiating circuit 51 composed of a resistor, a capacitor, an operational amplifier, etc., and then sent as a modulating signal to the phase modulating circuit 5.
3. On the other hand, input terminal 1. The analog R signal supplied to the A/D converter 52 is also supplied to the A/D converter 52, where it is converted into a digital R signal in synchronization with the clock signal CK supplied via the input terminal 114. The signal is supplied to the axial expansion/contraction/D/A conversion circuit 55. On the other hand, the clock signal CK supplied to the input terminal 114 is supplied as a modulated signal to the clock phase modulation circuit 53, and is phase modulated by the differential signal of the analog R signal. This phase-modulated clock signal CK' is supplied to the time axis expansion/contraction/D/A conversion circuit 55 together with the clock signal GK before modulation.

The time axis expansion/contraction/D/A conversion circuit 55, like the D/A conversion circuit 15 in FIG. The time axis of 0 is converted to an analog R signal while being expanded or contracted by the ratio of the period of the clock signal before and after phase modulation.The analog R signal that has been A/D converted while undergoing expansion or contraction of the time axis and low-pass filtered is sent to the output terminal. Output to 01□.

Input terminal II! and analog G supplied to 113.

Similarly, for the B signal, the corresponding contour enhancement circuit 42.4
3, a clock signal CK" phase-modulated with an analog differential signal indicating the appearance of a contour is created.

In parallel with this, original analog G.

The B signal is once converted to a digital signal in synchronization with the clock signal CK before phase modulation, is delayed, and then converted to an analog signal while undergoing expansion and contraction of the time axis twice the period of the clock signal before and after phase modulation. Outline enhancement based on time axis expansion/contraction is performed, and the result is output to output terminals 01□ and O13.

FIG. 6 is a block diagram showing the configuration of a display screen contour emphasizing circuit according to still another embodiment of the present invention.
+ I tz, 1! 3. Input terminal 114 for digital R, G, and B signals that form the display screen to be highlighted;
is an input terminal for the clock signal CK, 61 is a digital inverse matrix circuit, 62 is a digital differentiation circuit, and 63 is a D/
A conversion circuit, 64 is a clock phase modulation circuit, 65a to 6
5c is a digital delay circuit, 66a to 66c are time axis expansion and contraction/D/A conversion circuits, 0. ,．． 0° and Oo are analog R, G, which form the display screen that has undergone contour enhancement processing, respectively.
This is the output terminal for the B signal.

Input terminal ■□) IKm+ Digital R, G that forms the display screen for contour emphasis, which is supplied to 113.

The B signal is supplied to the digital inverse matrix circuit 61, and is also supplied to the corresponding time axis expansion/compression/D/A conversion circuits 66a to 66c via the corresponding delay circuits 65a to 65c. R supplied to the digital inverse matrix circuit 61,
G and B signals are Y-(0,51R+G+0.19B)
/1.7, it is converted into a digital luminance signal Y.

The digital luminance signal Y output from the digital inverse matrix circuit 61 is differentiated by a digital differentiation circuit 62 having the configuration illustrated in FIG. 2, and then converted into an analog differential signal by a D/A conversion circuit 63. This analog differential signal is supplied to the clock phase modulation circuit 64 as a modulation signal. On the other hand, this clock phase modulation circuit 64 has an input terminal I.

A clock signal CK of a predetermined period synchronized with the digital R, G, and B signals is supplied as a modulated signal. The clock signal CK' which has undergone phase modulation with the analog differential signal of the luminance signal is supplied to the time axis expansion/contraction/D/A conversion circuits 66a to 66c together with the clock signal GK before modulation.

In the time axis expansion and contraction/D/A conversion circuits 66a to 66c, the digital R1G and B signals that have passed through the delay circuits 65a to 65c are converted to analog R and G while being expanded and compressed in the time axis by twice the period of the clock signal before and after phase modulation.

It is converted into a B signal. This analog R, G, B signal is
Output terminal Oz+ as analog R, G, and B signals forming a display screen that has undergone contour enhancement based on expansion and contraction of the time axis;
It is supplied to each of Otz and 0zsl.

The configuration in which the digital luminance signal output from the digital inverse matrix circuit 61 is differentiated by the digital differentiation circuit 62 and then converted into an analog differential signal by the D/A conversion circuit 63 has been described above. However, instead of this configuration,
It is also possible to obtain an analog differential signal by converting the digital luminance signal output from the digital inverse matrix circuit 61 into an analog luminance signal by a D/A conversion circuit and then supplying the signal to an analog differential circuit.

FIG. 7 is a block diagram showing the configuration of a display screen contour emphasizing circuit according to still another embodiment of the present invention. 1
+ I sty I ss is an input terminal for analog R, G, and B signals that form the display screen for contour emphasis, 13
4 is an input terminal for the clock signal CK, 71 is an analog inverse matrix circuit, 72 is an analog differentiation circuit, 73 is a clock phase modulation circuit, 74a to 74c are A/D conversion circuits, 75
a to 75c are digital delay circuits, 76a to 76c are time axis expansion and contraction/D/A conversion circuits, OH+ Osz+ Oss
are output terminals for analog R, G, and B signals forming a display screen that has been subjected to contour enhancement processing, respectively.

Input terminal 131e 13! + Analog R, G, B forming the display screen for contour enhancement supplied to 123
The signals are supplied to the analog inverse matrix circuit 71, and are converted into digital R1G, B signals in corresponding digital conversion circuits 74a to 74c in synchronization with the clock signal CK of a predetermined period supplied to the input terminal 1.4. , the corresponding time axis expansion/contraction via delay circuits 65a to 65e.
/A conversion circuits 66a to 66c. The R, G, and B signals supplied to the analog inverse matrix circuit 71 are Y
-(0,51R+c+0.19B)/1.7 is converted into an analog luminance signal Y according to the algorithm.

The analog luminance signal Y output from the analog inverse matrix circuit 71 is differentiated by an analog differentiation circuit 72 composed of resistors, capacitors, operational amplifiers, etc., and then supplied as a modulation signal to a clock phase modulation circuit 73.
. On the other hand, this clock phase modulation circuit 73 has an input terminal I
A clock signal CK of a predetermined period synchronized with the digital R, G, and B signals is supplied from 34 as a modulated signal. The clock signal CK' which has undergone phase modulation with the analog differential signal of the luminance signal is supplied to time axis expansion/contraction/D/A conversion circuits 76a to 76c together with the clock signal CK before phase modulation.

In the time axis expansion/contraction/D/A conversion circuits 76a to 76c, the digital small R1G, B signals that have passed through the delay circuits 75a to 75c are subjected to time axis expansion/contraction twice the period of the clock signal before and after phase modulation, and are converted to analog R, G signals. .

It is converted into a B signal. This analog R, G, B signal is
Output terminal Os+ as analog R, G, and B signals forming a display screen that has undergone contour enhancement based on expansion and contraction of the time axis;
It is output via Osx and Oo, respectively.

(Effects of the Invention) As explained in detail above, the contour enhancement circuit of the present invention has the following features:
R,G in digital or analog format.

By phase-modulating the clock signal with the differential waveform of the B signal or luminance signal, and converting the digital RG and B signals into analog R, G, and B signals while performing expansion and contraction by the ratio of the clock signal periods before and after phase modulation. , the configuration is such that contour enhancement based on expansion and contraction of the time axis, similar to the conventional speed modulation method, is performed within the digital video signal processing system, so it is significantly cheaper and more expensive than the conventional circuit that performs this within the deflection system. Improved performance is achieved.

Furthermore, since the contour enhancement circuit of the present invention is mainly composed of a differential circuit, a phase modulation circuit, etc. with a simple configuration, the cost can be reduced compared to the conventional technology using a digital filter circuit with a relatively complicated configuration. .

Furthermore, instead of creating an analog differential signal and modulating the phase of the clock signal for each R, G, and B signal,
As shown in the illustrated embodiment, R,G.

By adopting a simple configuration that performs phase modulation of the clock signal using the differentiated signal of the luminance signal created from the B signal, the amount of hardware such as differentiating circuits and clock phase modulation circuits can be reduced considerably while maintaining a considerable level of performance. can.

[Brief explanation of drawings]

FIG. 1 is a block diagram illustrating the configuration of a display screen contour emphasizing circuit according to an embodiment of the present invention, FIG. 2 is a block diagram illustrating the configuration of the digital differentiation circuit 11 in FIG. 1, and FIG.
1 is a block diagram illustrating the configuration of the D/A conversion circuit 12 in FIG. 1, FIG. 4 is a waveform diagram for explaining the operation of the circuit in FIG. 1, and FIG. 5 is another embodiment of the present invention. FIG. 6 is a block diagram showing the configuration of a display screen contour emphasizing circuit according to another embodiment of the present invention; FIG. 7 is a block diagram showing the configuration of a display screen contour emphasizing circuit according to still another embodiment of the present invention FIG. 7 is a block diagram showing the configuration of a display screen contour emphasizing circuit according to still another embodiment. Il, 1. , I, (I□, Igx, Its
)...Input terminal for digital R, G, and B signals that form the display screen for contour emphasis, I Il+ I
I! + I 13 (I sr, I sz -1
33) Input terminal for analog R, G, and B signals that form the display screen for contour enhancement, In (114,
Igx, l5n)...Input terminal for clock signal CK of predetermined period, 1.2.3...Contour emphasis circuit, 11.62
...Digital differentiation circuit, 12.63...D/A conversion circuit, 1353.64.73...Clock phase modulation circuit, 15.55, 66a ~ 66c, 76a ~ 76
c...Time axis expansion/contraction/D/A conversion circuit, 31...D/
Time axis expansion/contraction unit of A converter 15, 31a...buffer memory, 31b...memory control circuit, 32...D/A
Main body of converter 15, 33...low pass filter circuit, O
＋ , Ox , Os (O□. o1!, 013 ; O寞++ o!!l O寞z
;Os++03z+03,)... Output terminal for analog R, G, and B signals forming a display screen with edge enhancement.

Claims (6)

[Claims] (1) A digital differentiation circuit that differentiates each of the digital R, G, and B signals arranged on the time axis in synchronization with a clock signal of a predetermined period to form a planar color display screen, and these digital differentiation circuits. A D/A conversion circuit that converts each of the outputs of the circuit into an analog signal, a clock phase modulation circuit that phase modulates the clock signal with the output of these D/A conversion circuits, and the time of the digital R, G, B signals. A D/A that converts the corresponding digital R, G, B signals into analog R, G, B signals while expanding or contracting the axis by a ratio times the period of the clock signal after phase modulation to the period of the clock signal before phase modulation. A display screen contour emphasizing circuit comprising: a conversion circuit; (2) In order to form a planar color display screen, each of the digital R, G, and B signals arranged on the time axis in synchronization with a clock signal of a predetermined period is converted into analog R, G, and B signals. a D/A conversion circuit; an analog differentiation circuit that differentiates each of the outputs of these D/A conversion circuits; a clock phase modulation circuit that modulates the phase of the clock signal with the output of these analog differentiation circuits;
, G, B signals by the ratio of the period of the clock signal after phase modulation to the period of the clock signal before phase modulation, and convert the corresponding digital R, G, B signals into analog R, G, B signals. 1. A circuit for enhancing the outline of a display screen, comprising: a D/A conversion circuit for converting into a signal. (3) Digital R, G, B while arranging analog R, G, B signals on the time axis in synchronization with a clock signal of a predetermined period to form a planar color display screen.
an A/D conversion circuit that converts the signals into signals; an analog differentiation circuit that differentiates each of the analog R, G, and B signals; a clock phase modulation circuit that modulates the phase of the clock signal with the output of these analog differentiation circuits; Digital R
, G, B signals by the ratio of the period of the clock signal after phase modulation to the period of the clock signal before phase modulation, and convert the corresponding digital R, G, B signals into analog R, G, B signals. 1. A circuit for enhancing the outline of a display screen, comprising: a D/A conversion circuit for converting into a signal. (4) a digital inverse matrix circuit that converts digital R, G, and B signals arranged on the time axis in synchronization with a clock signal of a predetermined period into digital luminance signals to form a planar color display screen; A digital differentiation circuit that differentiates the digital luminance signal output from the digital inverse matrix circuit; a D/A conversion circuit that converts the outputs of these digital differentiation circuits into analog signals; a clock phase modulation circuit that phase modulates a signal, and the digital R, G
, while expanding or contracting the time axis of the B signal by a ratio times the period of the clock signal after phase modulation to the period of the clock signal before phase modulation, converting the corresponding digital R, G, B signals into analog R, G, B signals. What is claimed is: 1. A circuit for enhancing the outline of a display screen, comprising: a D/A conversion circuit for converting. (5) a digital inverse matrix circuit that converts digital R, G, and B signals arranged on the time axis in synchronization with a clock signal of a predetermined period into digital luminance signals to form a planar color display screen; A D/A conversion circuit that converts the digital luminance signal output from the digital inverse matrix circuit into an analog luminance signal; an analog differentiation circuit that differentiates the analog luminance signal output from the D/A conversion circuit; a clock phase modulation circuit that phase modulates the clock signal with an output of the circuit;
While expanding and contracting the time axes of the G and B signals by the ratio of the period of the clock signal after phase modulation to the period of the clock signal before phase modulation, the corresponding digital R, G, B signals are converted to analog R, G, B signals. What is claimed is: 1. A circuit for enhancing the outline of a display screen, comprising: a D/A conversion circuit for converting into a D/A conversion circuit; (6) Digital R, G, B while arranging analog R, G, B signals on the time axis in synchronization with a clock signal of a predetermined period to form a planar color display screen.
an A/D conversion circuit that converts the analog R, G, and B signals into analog luminance signals, an analog inverse matrix circuit that converts each of the analog R, G, and B signals into analog luminance signals, and an analog differential that differentiates the analog luminance signals output from the analog inverse matrix circuit. a clock phase modulation circuit that phase modulates the clock signal with the output of the analog differentiating circuit, the digital R,
While expanding and contracting the time axes of the G and B signals by the ratio of the period of the clock signal after phase modulation to the period of the clock signal before phase modulation, the corresponding digital R, G, B signals are converted to analog R, G, B signals. What is claimed is: 1. A circuit for enhancing the outline of a display screen, comprising: a D/A conversion circuit for converting into a D/A conversion circuit;