JPH03242019A - Voltage conversion type inverter circuit - Google Patents

Abstract

PURPOSE:To expand the utility of a voltage conversion type inverter circuit by applying high speed inversion and voltage conversion to an input signal without using a coupling capacitor to eliminate the need for limiting a frequency (operating frequency) of the input signal. CONSTITUTION:An input signal is amplified noninvertingly by an emitter follower circuit 3 and the amplified signal in phase to the input signal is outputted to a collector follower circuit 15 of an output section and the signal is inputted to a pnp transistor(TR) 13 of the collector follower circuit 15 via a common base circuit 16. Since the signal obtained by the emitter follower circuit 3 is inputted to the collector follower circuit 15 of the output section not through a capacitor, the coupling capacitor is not required. Thus, the limit by the frequency (operating frequency) of the input signal is eliminated and the utility of the voltage conversion type inverter circuit is expanded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a voltage conversion type inverter circuit used in electronic equipment, etc., and more specifically, the present invention relates to a voltage conversion type inverter circuit used in electronic equipment, etc. The present invention relates to a voltage conversion type inverter circuit that enables conversion and inversion.

[Conventional Example] Conventionally, this type of voltage conversion type inverter circuit has the configuration shown in FIG.
A push-pull emitter follower circuit 3 is made up of a type transistor 1 and a pnp type transistor 2, and the output section is a 5EPP circuit made up of two npn type transistors 4 and 5 with the same characteristics.
It is set as circuit 6. And emitter follower circuit 3
Since the npn transistors 4 and 5 are driven by a signal that is in phase with the input signal of
r) 7, resistor 8 and coupling capacitor 9. It is input to the bases of npn transistors 4 and 5 via a resistor 10. Note that the resistors 11 and 12 are driving impedances.

In the voltage conversion inverter circuit described above, the input signal is amplified in phase by the emitter follower circuit 3, and the npnpnp transistor 5 is driven by this amplified signal. Therefore, the output signal is an inversion of the human input signal, and is also a voltage conversion to voltage V.

[Problems to be Solved by the Invention] However, in the voltage conversion inverter circuit described above, when the frequency of the human input signal is high, that is, when the operating frequency is high, the capacitance of the coupling capacitor 7.9 may be small. , if the frequency is low, the one with large capacity,
For example, it is necessary to use a large capacity electrolytic capacitor.

In other words, depending on the frequency of the input signal (frequency used),
There is a problem in that capacitors of different capacities must be used, and that a large capacity capacitor requires space for its shape.

This invention was made in view of the above-mentioned problems, and its purpose is to provide a voltage conversion type inverter circuit that can invert an input signal at high speed and convert the voltage without using a coupling capacitor. be.

[Means for Solving the Problems] In order to achieve the above object, the voltage conversion type inverter circuit of the present invention has an input section as a push-pull emitter follower circuit including an npn type transistor and a pnp type transistor, and an output section as a push-pull emitter follower circuit. is a push-pull collector follower circuit consisting of a pnp transistor and an npn transistor, and the input stage of the pnp transistor is a common base circuit of a level shifting npn transistor. The pnp type transistor and the npn type transistor of the collector follower circuit are driven at low impedance, and the pnp type transistor of the collector follower circuit is driven with a signal in phase with the input signal via the pnp type transistor of the input stage, The gist of the present invention is to enable high-speed inversion and voltage conversion of the input signal.

[Operation] With the above configuration, the input signal is amplified in the same phase by the emitter follower circuit, and the signal in phase with this input signal is output to the collector follower circuit in the output section. The signal is inputted to the pnp transistor via the common base circuit. In this way, since the signal obtained by the emitter follower circuit is input to the collector follower circuit of the output section without passing through a capacitor, there is no restriction on the frequency of the input signal (usable frequency). Furthermore, the base ground circuit provided at the signal input stage of the output section allows level shifting and high-speed transmission of the signal, so that the input signal can be voltage-converted and inverted.

[Embodiment] Hereinafter, an embodiment of the present invention will be described based on the construction drawings and FIG. 2. In the figure, the same parts and corresponding parts as in FIG. 3 are denoted by the same reference numerals, and redundant explanation will be omitted.

In FIG. 1, the voltage conversion type inverter circuit has an output section consisting of a pnp transistor 13 and an npn transistor 14.
A push-pull collector follower circuit 15 is used, and the input stage of the pnp transistor 13 is a grounded base circuit formed by a level shifting npn transistor 16. Further, the resistor 17.1.8 is a bias resistor, the resistor 19.20 determines the amplification factor α (=resistance 19/resistance 20) of the npnpnp transistor, and the resistor 19 is the drive impedance. . Further, the resistor 21.20 has the same function as the resistor 19.20.

Next, the operation of the voltage conversion type inverter circuit having the above configuration will be explained based on the time chart shown in FIG.

First, assuming that the signal shown in FIG. 2(a) is input, the emitter follower circuit 3, which is the input section, outputs a signal of voltage level V that is in phase with the input signal (( b)). Then.

The output signal from the emitter follower circuit 3 is connected to the resistor 20,
The pnp transistor 13 is driven with low impedance through the pnp transistor 16, and the npnpnp transistor is driven with low impedance through the resistor 22. At this time, as shown in FIG. 3C, the output signal from the emitter follower circuit 3 is level-shifted by the npn transistor 16, and the level-shifted signal is sent to the pnp transistor 13 at high speed. transmitted. Further, as shown in FIG. 2D, the "H" level voltage of the output signal is lowered by the resistors 22 and 21, and this raised signal is transmitted to the npn transistor 14.

Therefore, when the input signal is LL L 1 level, the pnp transistor 13 is ONL and the npn transistor 14 is ONL, so the output signal is "H" of the voltage V.
” level. Also, when the input signal is at the 11 HI+ level, the pnp transistor 13 is turned off.
Since the L, npn type transistor 14 is turned on, the output signal becomes the II L 11 level of the ground voltage.

In this way, since no coupling capacitor is used, there is no need to limit the frequency of input power No. 3 (usable frequency), and the use of voltage conversion type inverter circuits can be expanded.

[Effects of the Invention] As explained above, according to the voltage conversion type inverter circuit of the present invention, the input section is a push-pull emitter follower circuit consisting of an npn type transistor and a pnp type transistor, and the output section is made up of a pnp type transistor. This is a push-pull collector follower circuit consisting of an npn transistor and an npn transistor, and the input stage of the pnρ transistor is a grounded base circuit of the level shifting npn transistor, so the coupling capacitor can be omitted. Limitations due to the frequency of the input signal (frequency of use) can be eliminated, and the use of voltage conversion type inverter circuits can be expanded.

[Brief explanation of drawings]

The figure is a schematic circuit diagram of a voltage conversion type inverter circuit showing an embodiment of the present invention, Figure 2 is a time chart diagram for explaining the operation of the voltage conversion type inverter circuit, and Figure 3 is a conventional voltage conversion type inverter circuit. FIG. 2 is a schematic circuit diagram of a type inverter circuit. In the figure, l and 14 are Pnp type transistors, 2 and 13 are n
PN type transistor, 3 is emitter follower circuit (human power section), 15 is collector follower circuit (output section), 1
6 is a pnp type transistor (base grounded circuit), +7.
18.19.20.21.22 are resistances. Figure 1

Claims (1)

[Claims] (1) The input section is a push-pull emitter-follower circuit consisting of an npn-type transistor and a pnp-type transistor, and the output section is a push-pull collector-follower circuit consisting of a pnp-type transistor and an npn-type transistor,
and the input stage of the pnp transistor is a common base circuit of a level shifting npn transistor, and when a signal is input, the pnp transistor in the input stage and the npn transistor in the collector follower circuit are driven with low impedance. , the pnp transistor of the collector follower circuit is connected to the pnp transistor of the input stage.
1. A voltage conversion type inverter circuit, characterized in that it is driven by a signal in phase with an input signal via a p-type transistor, and is capable of high-speed inversion of the input signal and voltage conversion.