JPH03239378A - Semiconductor photodetector - Google Patents

Abstract

PURPOSE:To obtain a surface incidence type photodetector allowing easy assembly process and operation and providing excellent low capacity characteristic by providing one electrode on an area where the surface of a first semiconductor layer is exposed and providing the other electrode on a third semiconductor layer or on a other layer laid on the third semiconductor layer. CONSTITUTION:The crystal of p<+>-InGaAs 2 is grown on a semi-insulating InP substrate 1, then, the p<+>-InGaAs 2 is removed leaving only the prescribed area composed of a circular light receiving area, a short bonding area and a connecting part which connects both area by selective etching. Then, an n<->- InGaAs light absorbing layer 3 and an n-InP window layer 4 are continually grown on the prescribed area including the circular light receiving area, then, a (p) side electrode 5 is formed on the part of the p<+>-InGaAs 2 whose surface is exposed and an (n) side electrode 6 is formed on the part of the n-InP window layer 4, respectively. Since the (p) side electrode is formed on the semi-insulating InP substrate 1, the bonding pad area does not contribute to junction capacity. Thus, a surface incidence type photodetector allowing easy assembly process and operation is obtained with excellent low capacity characteristic.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor light-receiving element used in optical communications, optical information processing, and the like.

(Prior Art) In recent years, compound semiconductor photodetectors have been actively researched, developed, and put into practical use as high-sensitivity photodetectors for optical communication or optical information processing. In particular, the pin photodiode (hereinafter p
In-PD) has no internal current gain compared to an avalanche photodiode (APD), so it is slightly inferior in terms of receiving sensitivity, but it has a gain-bandwidth product due to the avalanche rise time seen in an APD. (GB
There is no bandwidth limit due to product). Therefore, the band of the device is determined by the carrier transit time and CR time constant, and is 50 GHz.
It has been reported that values exceeding p
in-PD is attracting attention (Electronics Letters (Electron.

Lett, ) vol. 22, p. 633-635. 1986). In addition, since it is used with a low bias, it has excellent reliability.
It is also suitable for integration.

In the 1.0 to 1.6 pm wavelength band, which is the low loss band of optical fibers that are attracting attention for optical communications, InGaAs is widely used as a material for the light absorption layer of semiconductor light receiving elements. An example of the basic structure of this InGaAs-based pin-PD is shown in FIG. 3 (aXb). (a) is an example of a mesa type back-illuminated type, and (b) is an example of a planar type front-illuminated type. In the case of the mesa type shown in (a), crystals of n-InGaAs3 are grown on the n+InP substrate 7, and then an impurity that exhibits a Znn-like shape is thermally diffused to form a pn junction in the InGaAs. In other than
GaAs is removed. On the other hand, in the case of the Brehner type surface-incident type shown in (b), in addition to n-InGaAs3, n-InF3 is also successively used as a window layer to suppress surface recombination loss, and then a pn junction is formed in InGaAs3 by selective thermal diffusion, and a pn junction is formed in InGaAs3 in the light-receiving area. is formed.

(Problems to be Solved by the Invention) However, in the above two cases, in order to make the device a so-called surface incidence type in which the stray light is taken in from the surface of the element, the method shown in FIG. 3(b) is required.
It is necessary to provide a p+ region for the bonding pad adjacent to the light receiving part, which increases the junction area and increases the capacitance, which leads to response deterioration due to CR limitations and also causes poor noise characteristics. was.

On the other hand, in the case of a back-illuminated element as shown in Figure 3(a), the excess capacitance can be removed by bonding onto the p+ region of the light receiving part, but the assembly process of the element is extremely complicated and handling is difficult. It was a hassle.

The purpose of the present invention is to eliminate such conventional drawbacks.

The object of the present invention is to provide a pin-PD that has low capacitance (that is, high speed and low noise) characteristics, is a front-illuminated type, and is easy to handle.

(Means for Solving the Problems) In order to solve the above-mentioned problems, the semiconductor light receiving element provided by the present invention has a band gap exhibiting a first conductivity type in a partial region on a semi-insulating semiconductor substrate. It has a first semiconductor layer named E1, and a second semiconductor layer named bandgap E1 exhibiting a second conductivity type on a certain region of the first semiconductor layer, and a bandgap E2 (E2>E1). ) are stacked sequentially from the substrate side, and one electrode is provided on the exposed area of the surface of the first semiconductor layer, and another electrode is provided on the third semiconductor layer or between the third semiconductor layers. It is characterized in that the other electrode is provided thereon via a layer of.

(Operation) The present invention solves the problems of the prior art by taking a series of preemptions. That is, since the pin-PD according to the present invention is a front-illuminated type, assembly and handling are easy. Moreover, since the bonding pad exists on the semi-insulating substrate adjacent to the light receiving area, it does not contribute to the junction capacitance.

Therefore, there is no extra junction capacitance other than the light receiving area, and the capacitance is low (
In other words, it has characteristics of high speed and low noise.

(Example) Examples of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a schematic diagram (aXbXe) of the device cross-sectional structure in each step and a schematic plan view (dXeXf
). According to this embodiment, first, FIGS. 2(a) and (d)
), p+-InGaAs2 (carrier density ~1×101
8cm-32 layer thickness ~0.5pm) is grown. After that, selective etching is performed to obtain the results shown in FIGS. 2(b) and (e).
), the p + -InGaAs2 is removed leaving only a specific area consisting of a circular light-receiving area with a diameter of 50 pm, a rectangular bonding area, and a connecting portion connecting the two. Thereafter, by selective growth using a vapor phase epitaxy method, an n--InGaAsnGaAs light-absorbing layer (lower density ~1 x 1015 cm-3 layer thickness ~0.5 pm) and n-
InP wind layer 4 (carrier density ~1×l016 cm
-32 layers (thickness -0,'5 pm) are grown continuously (Fig. 2 (
C) and (0). After that, the exposed p + -In on the surface
A p-side electrode 5 is formed on a portion of the GaAs 2 and an n-side electrode 6 is formed on a portion of the n-InP window layer 4 to obtain an element having the structure shown in FIG.

Although this device is a front-illuminated device, since the p-side electrode is formed on the semi-insulating InP substrate 1, the area of the bonding pad region does not contribute to the junction capacitance. Furthermore, since microfabrication processes such as step wiring and air bridge formation are not used, there is no concern that the yield will decrease during the process. Additionally, since a semi-insulating substrate is used, it is also suitable for integration with other elements such as FETs.

In this example, the light receiving area is circular with a diameter of 50 pm, but 22
A circle with a diameter of 0-1O0p or -side 220-1O0p
It may be a rectangle, etc. Further, in this embodiment, the n-side electrode 6 was formed on a part of the n-InP4, but in order to improve the contact, a material such as InGaAs or InG with a small forbidden band width, such as InGaAs or InP, is used.
An aAsP layer may be formed under the n-side electrode 6.

(Effects of the Invention) As explained above, according to the present invention, it is possible to obtain a semiconductor light-receiving element that is a front-illuminated type, has simple assembly process and handling, has excellent low capacitance characteristics (that is, high-speed characteristics), and is suitable for integration. It will be done.

[Brief explanation of drawings]

FIG. 1 is a schematic structural diagram of a semiconductor light-receiving device showing an embodiment of the present invention, and FIGS. A schematic diagram of the device cross-sectional structure in the process, Figure 2 (dXeXf) is a schematic plan view corresponding to (aXbXc), and Figure 3 (
1A and 2B are schematic cross-sectional structural diagrams of a semiconductor light-receiving device showing a conventional example. In the figure, 1 is a semi-insulating InP substrate, 2 is a p+-InG
aAs, 3 is n-InGaAs, 4 and 8 are n-In
P, 5 represents a p-side electrode, 6 represents an n-side electrode, 7 represents an n-InP substrate, and 9 represents a p+-InP.

Claims (1)

[Claims] A first semiconductor layer having a bandgap E_1 exhibiting a first conductivity type is provided in a part of the semi-insulating semiconductor substrate, and a second semiconductor layer is provided on a part of the specific region of the first semiconductor layer. A second semiconductor layer with a band gap E_1 and a third semiconductor layer with a band gap E_2 (E_2>E_1) exhibiting a conductivity type are laminated sequentially from the substrate side, and the surface of the first semiconductor layer 1. A semiconductor light-receiving element, comprising one electrode on an exposed region of the semiconductor layer, and the other electrode on a third semiconductor layer or on the third semiconductor layer with another layer interposed therebetween.