JPH03239165A - Inverter system - Google Patents

Abstract

PURPOSE:To prevent an excessive short-circuit current from occurring which is caused by simultaneous ON conditions of switching elements by letting the potentials at anode and cathode sides of a diode fall at the same speed or letting the potential at the cathode side fall faster than the one at the anode side when the switching element at the high potential side is turned OFF. CONSTITUTION:With an oscillation output VB at the level H, a switching element S2 is driven at a gate potential E4. As the switching element S2 moves to an ON condition, a potential VA at a point A and the voltage VS2 at both ends of the switching element S2 drop to a potential E. Nextly, when the switching element S1 turnes OFF, the voltage V2 becomes zero in a moment. With the switching element S1 OFF and the switching element S2 ON, an electric charge of a parasitic capacity C2 falls. The next moment, a capacity element C3 is charged. Consequently, the switching element S1 maintains the OFF condition. Afterwards, the switching element S1 maintains the OFF condition since a forward drop voltage is low.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an inverter device connected in parallel with a power source and two switching elements connected in series.

[Prior Art] FIG. 7 shows a conventional circuit, and FIG. 8 shows its operating waveform diagram. The switching elements S, S2 connected in series with the DC chamber #E use MOS-FETs, and in the second conventional circuit, the drive signal of the second switching element Sl is controlled by the on/off operation of the switching element S2. It is something to do.

The oscillation circuit 1 outputs a rectangular wave output signal V8 having periods of H level and L level. Switching element S +
, S2, the output signal V@ of the oscillation circuit 1 is passed through the drive circuit 2 to the signal ■ in the switching element S2. Ua, but in the switching element S1,
(2) and : are respectively supplied with the signal V+)Bi2 via the drive circuit 3.

And ■3. is the potential at the connection point A of the series circuit of the resistor R1 and the diode D1, and is the canard potential of the diode D. The connection point A is connected to the input terminal of the drive circuit 3 and the drain of the switching element s2.

El, E2. El, E.

With power! ), inductor l- and capacitor c1 are
This is a supply element for supplying resonant power to the load 4. And capacitor C6 is for DC cut,
The capacitance of capacitor C0 is much larger than that of capacitor C0.In the second conventional example, drive circuit 2
As a power source for E2. E.

It has a power source of 2-) and controls the power source of the drive circuit 2, that is, the drive voltage of the switching element S1, by turning on and off the two switches sw, , sw2.

Now, the oscillation output ■6 with a frequency higher than the resonant frequency of the resonant circuit caused by the inductor and the capacitor C2 and the load 4 is the 8th
It is assumed that the output is as shown in Figure (a). The time is also 0
When VIl goes to H level, switch SW1 turns on.
The switch sW2 is turned off, and the switching element S is driven by the gate potential E through the drive circuit 2, as shown in FIG. . , 2 rapidly rises to E4, and the switching element S2 also rapidly shifts to the on state.

Then, ■6, VO, and □ also begin to decrease as shown in <d) and (e) of the same figure.

However, at the second time, VC is V. It descends faster than U□. Therefore, time 1. In ■. becomes zero and decreases further. At this time, diode D is forward biased and switching element S remains on for 9 minutes.

The driving voltage (gate-source voltage) of the switching element 82 is El as shown in <h> in the same figure, and this driving voltage E4 is caused by the switching element s2 operating in the saturation region as shown in (g) in the same figure. A constant current IY flows from time t1 to t2 in the loop of power supply E→switching element S→diode D1-switching element S2. This constant current 11 can be set to a minute current by setting the power source E, so that the switching element S + between the two
S2 stress is not a problem either. In addition, the switching element S has a load current I as shown in FIG.
A composite current of LOAn (FIG. 8(1)) and a constant current Iy (FIG. 8(g)) flows. In addition, the VC
As shown in (d), the potential becomes negative by the forward direction drop voltage V FI of the diode DI.

Then, at time t2, VQll? l is the same figure (
As shown in e), the voltage drops to the threshold potential VTl of the switching element S1, and at this point the switching element S is turned off. In this conventional example, the switching element 82 is rapidly turned on in the saturation region, and tR
Since a constant current of IY is flowing in the loop of E-switching element S1-diode D and -switching element s2, Vc rapidly drops and VOII□ also rapidly drops. Therefore, the time 1, - from when the output 6 of the oscillation circuit 1 is at H level until the switching element Sl is turned off is 1, -
10 is very small compared to the entire period T(t, -t o) and can be ignored, making it possible to separately excite the switching elements S+ and Sz according to the output signal of the oscillation circuit 1. .

When the switching element S is turned off at time t2, the current in the inductor L tries to continue flowing, the diode D2 is turned on, V2 is reversed from E to 0, and the current Io2 becomes the first J<
The flow continues until time t, as shown in h).

At time t2, the switch SW+ is turned off, the switch SW2 is turned on, and ■. As shown in FIG. 8(b), during the period from time t2 to time t when ur□ rapidly increases, the power supply E, - resistor R1 - switching element S2 -
Since a current flows through the path of the diode D2, Vc becomes a positive potential approximately equal to the forward drop voltage VF of the diode D2, as shown in FIG.
Since Vou□ is at a low potential (approximately 0.7 V), Vou□ maintains an L level, and switching element S maintains an off state. Eventually, the current in the inductor L is reversed due to resonance and flows through the diode D to the switching element 82. At this time, since the diode Dl is turned on, ■o becomes a negative potential by the forward drop voltage Vy1 of the diode D, as shown in Fig. 8(d), so V Out+ becomes as shown in Fig. 8(e). As shown in 1. It will maintain the level.

At time t, it is reversed to the L level, and V OII 1
2 begins to decrease as shown in FIG.
is turned off, and the current that was flowing through the inductor attempts to continue flowing, flowing in the opposite direction to the switching element S. Then, V2 is inverted from zero to E as shown in FIG. After this, diode D is turned off and V , : , ,
V O'I T l begins to rise as shown in (d)<e) of the figure, and reaches a complete H level at 11 t, 6. At time 2, the current in the opposite direction is still flowing through the switching element s1. The resonant current continues to flow through the switching element Sl. At time t, again, ■8
is inverted from the L level to H and then to the bell, and the above-mentioned operation is repeated to supply the load 4 with a current (AC power) as shown in FIG. 4(i).

As described above, in the circuit shown in FIG. 7, in a configuration where the operation of the switching element S1 follows the operation of the switching element S2, when turning on the switching element S2 on the low potential side, , the switching element S2 is driven in the saturation region as a constant current source, and a constant constant current is passed between the power supply E, the switching element Sl, the diode D1, and the switching element S2, so it is stable and can be turned on simultaneously. An excessive short-circuit current does not flow, and separate excitation control can be performed according to the output of the oscillation circuit within the inverter device.

Problems to be Solved by E-Yanmei] However, in the conventional example, the following problems arose. This is due to the parasitic capacitance between the train and source of the switching element S, which is an FET, and is shown in Fig. 9, t! -Explain with reference. As mentioned above, at time t2, the switching element S turns off, and the current in the inductor L tries to continue flowing, and the energy of this resonance instantly reverses V2 to 0 from E, and the DC current at the connection point A increases. If VA is the potential seen from the ground of type #E, VA is due to the parasitic capacitance 11 c z between the train and source of switching element S2. Because it is charged,
As shown in Figure 9<e), the potential is approximately E (
1M densely E-vr+>. And then, ■1) IJ
In A2, the switch SWl is turned on and the switch SW2 is turned off, so it quickly rises to E2 as shown in Figure (b), but it does not instantly reach E2 and the switching element S2 turns on completely. , the charge of the parasitic capacitance C2 gradually shifts to a completely on state, so that the charge of the switching element S
Since the voltage is gradually discharged through 2, the OV decreases.

Therefore, there is a difference in the speed at which QV decreases between VA and V2, as shown in FIG. 9 (end). In other words, VA decreases to OV more slowly than in case (2). Since there is a reverse recovery time of the diode D between time t2 and time t2', the voltage becomes approximately OV as shown in FIG. 4(f). Although there is no effect of the difference in potential between VA and ■2, at time t2
Even if diode D is completely turned off at
As shown in the figure (e), the parasitic capacitance C2 is not completely discharged and VA is at a certain potential E. , VC rapidly rises by the potential of E, and as the charge of the parasitic capacitance C2 is discharged via the switching element S2, 6. Therefore, from time t2' to t2'', as shown in (b) and (e) of the figure, the switching element S becomes OV.
, , S2 are both in the on state. Therefore, as shown in <g)(b) of the same figure, there is a problem in that a large short-circuit current I flows through the switching elements S, S2 via the power source E. Note that the operation from time t2'' to t is the same as the operation from time t2 to t in the conventional example shown in FIG. 7, and will therefore be omitted.

As described above, in the conventional example, due to the difference in potential between V2 and ■6 caused by the parasitic capacitance C2 of the switching element S2 on the low potential side, destruction occurs due to simultaneous ON of the switching elements S and S2, and reliability is reduced. There was a problem with the decline.

The present invention has been provided in view of the above-mentioned points, and an object of the present invention is to provide an inverter device that is stable and capable of passive control without causing an excessive short-circuit current to flow due to simultaneous ON of switching elements. That is.

[Means for Solving the Problems] The present invention connects a series circuit of a switching element on the high potential side, a diode in the forward direction of this switching element, and a switching element on the low potential side in parallel with a DC power supply. And the above diode and low potential r! In an inverter device in which the connection point of the switching element and the control terminal of the switching element on the high potential side are connected to perform on/off control alternately with one switching element, the switching element on the high potential side is turned off. At this time, the diode power anode and cathode potentials at the second point drop almost equally, or the cathode side drops quickly!
6 [Function] Therefore, when the switching element on the high potential side is turned off, the voltage between the anode and cathode of the diode is generated due to the parasitic capacitance of the switching element on the low potential side. Using a control means, the potential at the point is lowered in the same way, or the cathode side is lowered faster, thereby eliminating the influence of the charge charged in the parasitic capacitance of the switching element on the low potential side,
Excessive short-circuit current due to simultaneous turning on of both switching/switching elements is prevented.5 [Embodiment 1] An embodiment of the present invention will be described below with reference to the drawings. The present invention improves the M on the low potential side in the conventional example shown in FIG.
f+ is added as a means for eliminating the influence caused by the difference in rate of drop between the potential at V2 and the potential at point A, which is caused by the parasitic capacitance of the switching element S2 consisting of an o5-FET. As a result, even though the switching element on the low potential side is on, vl increases and the switching element on the high potential side turns on, preventing an excessive short-circuit current from flowing due to simultaneous on, and stable and simultaneous on. This enables passive control without causing excessive short-circuit current to flow.

This will be explained in detail below. Figure 1 shows a specific circuit diagram,
FIG. 2 shows its operating waveform diagram.

In this embodiment, the switching element S2 on the low potential side
A diode D is connected between the point A and the switching element S2 so as to be in the forward direction. As a result, the switching element S1. which is caused by the difference in the rate of drop between the potential of the voltage s2 across the switching element S2 due to the parasitic capacitance C2 of the switching element S2 and the potential 6 of the point A. This prevents S2 from being turned on at the same time. Note that the diode D constitutes a control means.

Next, in this embodiment, only the characteristic portion will be explained with reference to No. 20. Now, it is assumed that an oscillation output V6 having a frequency higher than the resonant frequency of the resonant circuit formed by the inductor, capacitor C3, and negative R4 is outputted from the oscillation circuit 1 as shown in the second [J(a)]. ■6 is H at time t0
When the bell comes on, switch SW is turned on and switch SW is turned on.
2 is turned off, and as shown in FIG. 2(b), the drive circuit 2f! -The switching element S2 is connected to the gate potential E through
, driven by . At this time, since the switching element S1 is on, the potential at point A becomes the E+E,f) potential as shown in [ ] (e), and the switching element S
Since the parasitic capacitance C2 between the drain and source of the switching element S is charged to E+EI, the potential between both ends of the switching element 2 is also at the potential E+El as shown in FIG. 2(f).

Then, from time t0 to t, switching element S2
As the transitions to the on state, ■. As shown in the same figure (g>), OV decreases from El, so ■6 and VS2 also change from E + E l to E as shown in (e) and (f) of the same figure.
decreases to The operation from time t to t2 is the same as the conventional example shown in FIG.

At time t2, when the switching element S1 is turned off as shown in Fig. 2(e), the current tends to continue flowing through the inductor L, and due to the energy of this resonance, ■2 becomes as shown in Fig. 2(e).
As shown in d), OV instantly changes from E. Here, the voltage Vs2 across the switching element S2 is such that the parasitic capacitance C2 between its train and source is E at time t2.
Since it is charged to the potential of E, it becomes the potential of E. Since VA is connected to diode D as shown in FIG. 1, diode D is reverse biased and turned off, and the voltage Vs2 across switching element S2 is
, and the second point is diode D.
1 is at the time of reverse recovery, and conduction is in the opposite direction, so V
Similarly to (2), A is inverted from E to 0 as shown in (e) of the same figure, and VC becomes QV as shown in (g>) of the same figure.

Then, between time t2 and t2', diode D is still in reverse recovery, so (2). is almost 0■, the switching element SI is off, and since the switching element 82 is gradually turned on completely, the electric charge of the i-main capacitor C2 is discharged through the switching element S2 and lowered. To go. In addition, since resonant current still flows through the diode D2, both V and V are almost 0.
■It is.

When the diode D is completely turned off at time t2', as shown in FIG. 2(f), the charge of the parasitic capacitance C2 is not completely discharged and 7 has some potential E0, Thereafter, from time t2 onwards, it is completely discharged and becomes 0■. Then, at these times t' and t,'', V,...
Both V2 are approximately OV, which is a lower potential than Vs2, but since V9 has a diode D, it is not affected by Vs2, and as shown in the conventional example in FIG. 7, Vs.

It does not rise as quickly as the diode D
, is off, C3 is charged through the path of power supply E, resistor R1 and C1. Here, C is a capacitance component that summarizes the parasitic capacitance of the input terminal of the drive circuit 3 and the diode D. Therefore, if the value of the resistor R1 is appropriately set, the potential at which VC rises between times t2 and t2'' is very small, so that the switching element SL maintains the off state.

After that, from time t,' to t, Vs2≦E
, when the power source E, - resistor R9 - switching element S
2-A current flows through the path of the diode D2, of which VC almost reaches the diode D2 as shown in Fig. 2(g).
The forward voltage drop ■ becomes a positive potential for 2 minutes and becomes constant. From now on, time t, or E 1-= R, -C3
There is no charging route. Since the forward drop voltage V,2 is a low potential (approximately 0.7V), Vou□ is shown in Figure 2 (
As shown in c), the switching element S1 maintains the L level and maintains the off state.

Eventually, the current in the inductor L is reversed due to resonance and flows through the switching element S2 via the diode D.

At this time, since diode D is on, the potential becomes negative by 75 minutes of the forward drop voltage of diode D, as shown in Figure 2 ([1>). and the switching element S1 maintains the off state.

The operation from when ■ is inverted to the L level at time t4 as shown in FIG. 2(a) until it is again inverted from the L level to the H level at time t is the same as in the conventional example shown in FIG. , it works by repeating this. Then, for load 4, as shown in Fig. 2 (k>
It supplies current (AC power) as shown in .

As described above, in the circuit shown in FIG. 1, the parasitic capacitance of the switching element S2 is reduced by connecting the diode D between the switching element S2 and the point A and the switching element S2 in the forward direction. It is possible to prevent the simultaneous turning on of the switching element SS2 caused by the difference in the rate of drop of the potential of the voltage V s 2 across the switching element S2 at the point A due to the difference in the rate of drop of the voltage V s 2 across the switching element S2 due to C2, so the inconveniences as in the conventional example 5 no longer occur. .

[Example 2] FIG. 3 shows Example 2, and shows that the present invention can be applied to a half-bridge configuration, and is applied to a configuration in which switching elements S1 and 82 are connected in series via a diode D. It is possible. This embodiment also has the same effects as the previous embodiment.

[Example 3] Example 3 is shown in FIG. The oscillation circuit 1 includes a timer IC1a (NEC u PD5555, etc.) and a resistor [Ry
, Rs, and capacitors C, ,C constitute an astable oscillation circuit. The frequency and on-duty of the square wave output from the No. 3 output terminal of the IC 1a are determined by the constants of the resistors R, ,R, and the capacitor C. The drive circuit 2, which is a drive circuit for the switching element S2, has an N
PN type transistor Q and PNP type transistor Q
2 and a resistor R5. Similarly, the drive circuit 3, which is a drive circuit for the switching element S, also includes an NPN type Fl i-transistor Q and a PNP type transistor Q.
Consisting of 4. Resistors R, , R, are gate resistances of switching elements S, , S2, respectively.

The power supply for the oscillation circuit 1 and the drive circuit 2 is constituted by a resistor R1, a capacitor C6, and a Zener diode ZD, and is obtained from a power supply E through a resistor R3 as a voltage E2 across the capacitor C6. Zener diode ZD,
is for overvoltage protection and power supply stabilization.

The power supply of the drive circuit 3 is composed of a resistor R, and a capacitor C5, and while the switching element S2 is on, a voltage E1 divided by the resistors R and R7 of the power supply E is accumulated in the capacitor C3. It is something. And resistance R
s, R1°, Zener diode ZD2. When FETQ turns on the switching element S2, the switching element S2 is used as a constant current source, and a certain constant current is applied to the $ source E.
- A control unit 5 that controls the drive voltage (gate-source ms pressure of S2) so that it flows in the loop of switching element S1 → diode D, → switching element S2.

A series circuit of resistor R5 and RIG is connected in parallel to diode D2, and a Zener diode ZD is connected in parallel to resistor R1o.
2 is connected, and the gate of FETQs is connected to the connection point of the resistors R5 and R2°, and FETQ
The source of s is connected to the ground line, and the drain is connected to the gate of switching element S2. Further, as in the previous embodiment, D diodes are inserted and connected between the point A and the switching element S2.

The configuration of the pond is the same as that shown in FIG.

The control section 5 in this embodiment will be explained with reference to FIG. 2 showing an operation waveform diagram. Time to″cv, is H
level, transistor Q is forward biased through resistor R6, transistor Q2 is reverse biased, and Q,
is on, Q2 is off, and voltage E2 is applied via Q to the gate of switching element S2 via resistor R2. However, at this time, in the control section 5, the resistance R,
,R,. , by setting the Zener diode ZD2, V
In other words, some Zener current flows through the Zener diode ZD2 through the resistor R9 until ZD2 becomes almost zero.
While the current is flowing, FETQs is biased with the Zener voltage of Zener diode ZD2, and Q5
is a constant current source of current I0.

Therefore, at this time, FETQs operates as a constant current source, and the driving voltage of the switching element S2 is . ut2 is VouT:=Ez R2' I.

becomes. Therefore, if we set ■-=(E 2 E 4 >y' R2,
Driving voltage ■. . , 2 can be set to a voltage E such that the switching element S2 operates in the saturation region and serves as a constant current source of Iv.

Therefore, at time t0, the switching element S2 is driven with the gate potential E4, and the state (2) occurs. II? □ rises rapidly and thereafter maintains R4 until V2 becomes almost zero.

Then, the switching element S2 rapidly shifts to the on state. Then, V starts to drop, the transistor Q3 of the drive circuit 3 turns off, Q starts to turn on, and VOLIT+ starts to fall to the - level through resistors R+ and Q4. At time 1, VC becomes zero,
When 22 further decreases, the diode D1 is forward biased and the switching element S1 still maintains the on state, so power supply E - switching element S, → diode DI=
The constant current I begins to flow in the loop of the switching element S2.

After this, V2 gradually inverts to E-0, but as described above, bias FET Q5 with the Zener voltage of Zener diode ZD2, and use FET Qs as a constant current source of current I0. The state of ut 1 "" E 4 is maintained until ■ 2 becomes almost zero, and the power supply E → switching element S
A constant current of I continues to flow in the loop of 1-diode D,→switching element S2. Then, at time t2, VQIj falls to the threshold potential T1 of the switching element S, and at this point the switching element S1 is turned off, and thereafter remains in the off state until 6 time t.
When the switching element Sl is turned off at 1, the inductor L
The current will continue to flow, and diode D2 will turn on.

At the time of 2, the gate potential of the connection point D, that is, FETQs becomes completely zero, Q is turned off, and V o
u t rapidly rises to voltage E2 via transistor Q3 and resistor R2. Thereafter, at time t, the signal 6 is inverted to the L level, and the same operation as in the embodiment is performed until the switching element S2 is turned off at time t.

The switching element S2 is turned off, and the current that was flowing through the inductor tries to continue flowing, but flows in the opposite direction to the switching element Sl. Then, ■2 is reversed from zero to voltage E, and at the same time, F E T Q s becomes ■. However, since VB is at L level, transistor Q1 is turned off and transistor Q2 is turned on. U□ maintains the L level, and the switching element S2 maintains the off state. Thereafter, the diode D1 is turned off, and the voltage E across the capacitor C3 is input to the drive circuit 3 via the resistor R1, so VC rapidly rises, the transistor Q turns on, and the transistor Q turns on. Since it shifts to the off state, V o++t+ also rapidly rises to the voltage E1 via the transistor Q1 and the resistor R1, and becomes completely H level at time t6. At this time, a current in the opposite direction is still flowing through the switch notching element S. After that, the resonant current continues to flow through the switching element SI.

At time ta, ■8 is again inverted from L level to H level,
By repeating the above-mentioned operation, AC power as shown in FIG. 2(k) is obtained for the load 4. In this embodiment, the load 4 is
You can also get arbitrary output.

As described above, the circuit shown in FIG. 4 can also achieve the same effects as the embodiment shown in FIG. 1.

[Embodiment 4] Embodiment 4 is shown in FIG. 5. In this embodiment, the control unit 6 controls the potential of point A, which is affected by parasitic capacitance C2, and the potential of V2 to drop almost to the same level. is added.

By adding this control section 6, the comparator CP compares the potentials at point A and (2), and if the potential at point (2) is greater than the potential at V2, the transistor Q6 is turned on and the control section 5 is turned off. The switching element S2 is activated to completely drive the switching element S2. The waveforms of each part in this case are shown in FIG.

As shown in FIG. 6(d) at time t2, the control unit 6 turns off the switching element SI, and at the same time, ■ = instantaneously inverts from E to 0, and at the same time, VA becomes larger than V2 and the comparator The output of CP becomes L level or H level,
Transistor Q is turned on, the gate and source gates of Q are at L level, and Q5 is turned off. Therefore, the control section 5 becomes inoperative, and the driving voltage of the switching element S2 is
. ut2 becomes E2 as shown in FIG. 6(b), completely turning on the switching element S2. This results in
The electric charge of the parasitic capacitance C2 is rapidly discharged via the switching element S2, and ■ is quickly reversed to E-〇 as shown in FIG. 6(e).

Therefore, at time t2', since VA is QV, ■ does not rise as shown in (f) of the same figure, but due to the difference in the descending speed of VA and V2 as in the conventional case. The resulting switching element S1. Simultaneous turning on of S2 can be prevented, and the inconvenience that occurs in the conventional case does not occur.

[Effects of the Invention] As described above, the present invention connects a series circuit of a switching element on the high potential side, a diode that is in the forward direction of this switching element, and a switching element on the low potential side in parallel with the DC power supply. In an inverter device, the connection point between the diode and the switching element on the low potential side is connected to the control terminal of the switching element on the high potential side, and both switching elements are controlled to be turned on and off alternately. It is equipped with a control means that causes the potentials at the anode and cathode of the diode to drop almost equally when the switching element turns off, or to make the cathode drop faster! ), when the switching element on the high potential side is turned off, the potentials at the anode and cathode of the diode, which are generated due to the parasitic capacitance of the switching element on the low potential side, are dropped in approximately the same way by the control means. Alternatively, the influence of the charge charged in the parasitic capacitance of the switching element on the low potential side can be eliminated by dropping the power (-) side quickly, thereby preventing excessive short-circuit current due to simultaneous ON of both switching elements. Therefore, it is stable and does not cause an excessive short-circuit current to flow due to simultaneous ON, thereby providing an inverter device with improved reliability. This device can passively control the inverter device according to the output signal of the oscillation circuit for driving the switching element! )
Furthermore, in a series inverter, a level shift circuit such as a photocoupler or a transformer that transmits a drive signal to the switching element on the high potential side, which is necessary for separately excitation control, is no longer required, and the circuit becomes simpler. This has the advantage of being inexpensive and simple.

In addition, in t+ti term 2, a second terminal whose cathode side is connected to the switching element on the low potential side is connected between the control terminal of the switching element on the high potential side and the switching element on the low potential side.
By configuring the control means with diodes, the above effects can be easily achieved with a single component configuration of diodes.

[Brief explanation of drawings]

FIG. 1 is a block circuit diagram of Embodiment 1 of the present invention, FIG. 2 is an operation waveform diagram of the same as above, FIG. 3 is a block circuit diagram of Embodiment 2 of the same as above, and FIG. 4 is a specific example of Embodiment 3 of same as above. Circuit diagram, FIG. 5 is a different circuit diagram of Example 4 same as above, No. 6L2I is an operation waveform diagram of same as above, FIG. 7 is a block circuit diagram of the conventional example, FIG. 8 is an operation waveform diagram of same as above, FIG. 9 is an operation waveform diagram of the same as above. E is a DC power supply, D is a diode, S is a switching element on the high potential side, S2 is a switching element on the low potential side,
D is the second diode. Figure 6 Figure 8

Claims (2)

[Claims] (1) Connect a series circuit of a switching element on the high potential side, a diode in the forward direction of this switching element, and a switching element on the low potential side in parallel with the DC power supply,
Connect the connection point between the diode and the switching element on the low potential side and the control terminal of the switching element on the high potential side,
In an inverter device in which both switching elements are controlled to be turned on and off alternately, when the switching element on the high potential side is turned off, the potentials at the two points of the anode and cathode of the diode drop almost equally, or the cathode side drops quickly. An inverter device characterized by comprising a control means for lowering the inverter. (2) The control means is characterized by comprising a second diode between the control terminal of the switching element on the high potential side and the switching element on the low potential side, the cathode of which is connected to the switching element on the low potential side. The inverter device according to claim 1.