JPH03230542A - Stage of wafer prober - Google Patents
Stage of wafer proberInfo
- Publication number
- JPH03230542A JPH03230542A JP2680690A JP2680690A JPH03230542A JP H03230542 A JPH03230542 A JP H03230542A JP 2680690 A JP2680690 A JP 2680690A JP 2680690 A JP2680690 A JP 2680690A JP H03230542 A JPH03230542 A JP H03230542A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- stage
- metal
- porous
- fiber type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 claims abstract description 16
- 239000007769 metal material Substances 0.000 claims abstract description 3
- 229910001111 Fine metal Inorganic materials 0.000 claims 1
- 239000002923 metal particle Substances 0.000 claims 1
- 239000000843 powder Substances 0.000 abstract description 6
- 230000000694 effects Effects 0.000 abstract description 4
- 239000000835 fiber Substances 0.000 abstract description 4
- 239000000463 material Substances 0.000 abstract description 4
- 229910045601 alloy Inorganic materials 0.000 abstract description 3
- 239000000956 alloy Substances 0.000 abstract description 3
- 230000002159 abnormal effect Effects 0.000 abstract description 2
- 238000000748 compression moulding Methods 0.000 abstract 2
- 229910016347 CuSn Inorganic materials 0.000 abstract 1
- 239000010419 fine particle Substances 0.000 abstract 1
- 239000011148 porous material Substances 0.000 abstract 1
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 25
- 239000000523 sample Substances 0.000 description 5
- 230000017525 heat dissipation Effects 0.000 description 4
- 238000005336 cracking Methods 0.000 description 3
- 238000011156 evaluation Methods 0.000 description 3
- 238000005259 measurement Methods 0.000 description 2
- 238000007493 shaping process Methods 0.000 description 2
- 239000010935 stainless steel Substances 0.000 description 2
- 229910001220 stainless steel Inorganic materials 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
コノ発明は、ウェハ状態における各チップの電気特性を
評価するいわゆるオンウェハプローバのステージの改良
に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in the stage of a so-called on-wafer prober that evaluates the electrical characteristics of each chip in a wafer state.
従来のオンウェハプローバのステージを第４図、第５図
について説明する。第４図は上面図、第５図は第４図の
線Ｖ−■の断面図であり、オンウエハプローバのステー
ジ（１）は真空チャック用台座（２）上に載置されたウ
ェハ台座（３）から構成されており、このウェハ台座（
３）上にウェハ（４）を載置し、真空チャック用台座（
２）の真空供給口（５）に真空を供給することにより、
ウェハ（４）がステージ（１）に固定される構造になっ
ている。The stage of a conventional on-wafer prober will be explained with reference to FIGS. 4 and 5. FIG. 4 is a top view, and FIG. 5 is a sectional view taken along line V-■ in FIG. 3), and this wafer pedestal (
3) Place the wafer (4) on top and attach the vacuum chuck pedestal (
By supplying vacuum to the vacuum supply port (5) of 2),
The structure is such that the wafer (4) is fixed to the stage (1).
オンウエハプローバのステージ（１）に真空で固定され
たウェハ（４）は、第６図、第７図に示すようにウェハ
（４）上に形成されたチップ（６）の各電極パッドにプ
ローブ針（力を圧接し、各チップの電気特性が評価され
る。以上の動作により、ウェハ（４）上の複数個のチッ
プ（６）の電気特性評価を順次実施し、全てのチップ（
６）の評価が完了した後、真空チャック用台座（２）の
真空供給口（５）からの真空供給を停止した後、ステー
ジ（１）がらウェハ（４）を取りはずすことによりオン
ウェハプロービングが完了する。The wafer (4) is fixed in vacuum on the stage (1) of the on-wafer prober, and probes are applied to each electrode pad of the chip (6) formed on the wafer (4) as shown in FIGS. 6 and 7. The electrical characteristics of each chip are evaluated by pressing the needle (force). Through the above operations, the electrical characteristics of multiple chips (6) on the wafer (4) are sequentially evaluated, and all chips (
After completing the evaluation in 6), stop the vacuum supply from the vacuum supply port (5) of the vacuum chuck pedestal (2), and then remove the wafer (4) from the stage (1) to complete on-wafer probing. do.
従来のオンウエハプローバのステージは以上のように構
成されているので、ウェハ台座（３）の真空チャック用
に形成された溝に起因する以下の２点の問題点があった
。Since the stage of the conventional on-wafer prober is constructed as described above, there are the following two problems caused by the groove formed for the vacuum chuck in the wafer pedestal (3).
（イ）放熱不良で正確な測定かできない。(b) Accurate measurements cannot be made due to poor heat dissipation.
第８図はウェハ台座（３）とウェハ（４）との接触部を
拡大して示す図であり、図においてウェハ（４）上のチ
ップ（６）のサイズがウェハ台座（３）の真空チャック
用溝の幅より小さい場合、チップ（６）の電気特性評価
時にプローブ針（力から供給される電力によりチップ（
６）が発熱するが、このチップ（６）の位置に相当する
ウェハ裏面はウェハ台座（３）に直接接触していないた
め極めて放熱が悪く、そのため直接接触している他のチ
ップ（６）よりも温度上昇が大キ＜、正確な測定ができ
ない。さらに高電力用チップの場合には熱的に破壊する
。FIG. 8 is an enlarged view showing the contact area between the wafer pedestal (3) and the wafer (4). If the width is smaller than the width of the groove, the power supplied from the probe needle (force) will cause the chip (
6) generates heat, but since the back side of the wafer corresponding to the position of this chip (6) is not in direct contact with the wafer pedestal (3), heat dissipation is extremely poor. However, if the temperature rises too much, accurate measurements cannot be made. Furthermore, in the case of high-power chips, they are thermally destroyed.
（ロ）ウェハが割れる
真空による吸引力およびプローブ針（７）による荷重等
により、ウェハ台座（３）の真空チャック用溝の部位の
ウェハ（４）に反りを生じ、プローブ針（力の接触が不
良となるのみでなく、ウェハが割れる等の問題点があっ
た。(b) The wafer cracks due to the suction force caused by the vacuum and the load from the probe needle (7), etc., causing the wafer (4) to warp in the area of the vacuum chuck groove of the wafer pedestal (3), causing the probe needle (force contact) to warp. There were problems such as not only defects but also cracking of the wafer.
この発明は以上のようにウェハ台座の真空チャック用に
形成された溝に起因する問題点を解消するためになされ
たもので、ウェハ内の全てのチップを温度上昇を抑制す
ると共に熱的に均一な条件で電気特性を評価できかつウ
ェハの変形や割れを生じさせないオンウエハプローバの
ステージを得ることを目的とする。This invention was made in order to solve the problems caused by the grooves formed for the vacuum chuck on the wafer pedestal as described above, and it suppresses the temperature rise of all the chips in the wafer and makes them thermally uniform. The purpose of this invention is to obtain an on-wafer prober stage that can evaluate electrical characteristics under suitable conditions and that does not cause deformation or cracking of the wafer.
この発明に係るオンウエハプローバのステージは、熱伝
導率の高い金属から成る微粉末又は繊維状金属を圧縮整
形して得られる多孔質金属材料により構成したものであ
る。The stage of the on-wafer prober according to the present invention is made of a porous metal material obtained by compressing and shaping fine powder or fibrous metal made of a metal with high thermal conductivity.
この発明におけるウェハステージは、直径数μｍのＣｕ
５ｎ等の合金微粉末金属又は繊維状金属で構成されてい
るため、熱的には従来用いられていたステンレスからな
るウェハステージよりも熱伝導率が１０倍程度高く、放
熱性に優れていると共に、多孔質であるため真空吸着に
よりウェハを固定することができる。The wafer stage in this invention is made of Cu with a diameter of several μm.
Since it is composed of alloy fine powder metal such as 5N or fibrous metal, its thermal conductivity is about 10 times higher than that of the conventionally used stainless steel wafer stage, and it has excellent heat dissipation. Since it is porous, the wafer can be fixed by vacuum suction.
以下、この発明の一実施例を第１図、第２図について説
明する。第１図は上面図、第２図は第１図の線■−Ｈの
断面図であり、前記従来のものと同一または相当部分に
は同一符号を付して説明を省略する。図において、（８
）はステージで、真空チャック用台座（８ａ）および真
空チャック用台座（８ａ）に埋め込まれた多孔質金属（
直径数μｍのＣｕ５ｎ等の合金微粉末金属）からなるウ
ェハ台座（８ｂ）より構成されている。An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. FIG. 1 is a top view, and FIG. 2 is a cross-sectional view taken along line 2--H in FIG. In the figure, (8
) is a stage with a vacuum chuck pedestal (8a) and a porous metal (8a) embedded in the vacuum chuck pedestal (8a).
The wafer pedestal (8b) is made of a fine powder metal alloy such as Cu5n and has a diameter of several μm.
ウェハ台座（８ｂ）上にウェハ（４）を載置し、真空チ
ャック用台座（８ａ）の真空供給口（５）に真空を供給
することにより、ウェハ（４）がステージ（８）に固定
される。ウェハ（４）上に形成されたチップ（６）の各
電極パッドにプローブ針（７）を圧接し、各チップ（６
）の電気特性が評価される。以上の動作により、ウェハ
（４）上の複数個のチップ（６）の電気特性評価を順次
実施し、全てのチップ（６）の評価が完了した後、真空
チャック用台座（８ａ）の真空供給口（５）からの真空
供給を停止した後、ステージ（８）からウェハ（４）を
取りはずすことによリオンウエハプロービングが完了す
る。The wafer (4) is fixed on the stage (8) by placing the wafer (4) on the wafer pedestal (8b) and supplying vacuum to the vacuum supply port (5) of the vacuum chuck pedestal (8a). Ru. A probe needle (7) is pressed into contact with each electrode pad of a chip (6) formed on a wafer (4).
) are evaluated. Through the above operations, the electrical characteristics of multiple chips (6) on the wafer (4) are sequentially evaluated, and after the evaluation of all chips (6) is completed, the vacuum chuck pedestal (8a) is supplied with vacuum. After stopping the vacuum supply from the port (5), the wafer (4) is removed from the stage (8) to complete the ion wafer probing.
なお、上記実施例では微粉末合金を圧縮整形して形成し
た多孔質金属を例として説明したが、Ｎｉ等の金属繊維
を用いた多孔質金属であってもよい。In the above embodiment, a porous metal formed by compressing and shaping a fine powder alloy was explained as an example, but a porous metal using metal fibers such as Ni may also be used.
また、構造的には真空チャック用台座（８ａ）に多孔質
金属からなるウェハ台座（８ｂ）を埋め込んだ構造につ
いて記したが、第３図に示すように真空チャック用台座
（８Ａ）を全て多孔質金属で構成して、この台座（８Ａ
）内に冷却用又は加熱用ヒートバイブ（９）を埋め込み
、温度制御を可能にすることができる。この場合側面等
は真空のもれが生じないようなコーテイング材でカバー
しておく。In addition, in terms of structure, we have described a structure in which a wafer pedestal (8b) made of porous metal is embedded in the pedestal for vacuum chuck (8a), but as shown in FIG. This pedestal (8A
) can be embedded with a cooling or heating heat vibrator (9) to enable temperature control. In this case, cover the sides etc. with a coating material that will prevent vacuum leakage.
以上のように、この発明によればオンウエノ１プローバ
のステージ面に真空吸着溝がないため、各チップの電気
特性評価時において、異状な温度上昇や接触の不安定さ
およびウェハの割れ等の不具合を解消できると共に、従
来のステンレス材より１０倍程度の放熱効果が得られる
ためより正確な評価ができるという効果が得られる。As described above, according to the present invention, since there is no vacuum suction groove on the stage surface of the OnUeno 1 prober, problems such as abnormal temperature rise, unstable contact, and cracking of the wafer occur when evaluating the electrical characteristics of each chip. In addition to being able to eliminate the heat dissipation effect of about 10 times that of conventional stainless steel materials, more accurate evaluation can be achieved.
第１図はこの発明の一実施例によるオンウエハプローバ
のステージを示す上面図、第２図は第１図の線■−Ｈの
断面図、第３図はこの発明の他の実施例を示す断面図、
第４図は従来のステージを示す上面図、第５図は第４図
の線■−■の断面図、第６図は従来のステージを用いて
オンウェハブロービング中の上面図、第７図は第６図の
線■−■の断面図、第８図は第７図の部分拡大図を示す
。
図において、（４）はウェハ、（５）は真空供給口、（
６）はチップ、（力は）゛ローフ針、（８）はステージ
、（８ａ）は真空チャック用台座、（８ｂ）はウェハ台
座を示す。
なお、図中同一符号は同−又は相当部分を示す。FIG. 1 is a top view showing the stage of an on-wafer prober according to an embodiment of the present invention, FIG. 2 is a sectional view taken along line - H in FIG. 1, and FIG. 3 is a diagram showing another embodiment of the invention. cross section,
Fig. 4 is a top view showing a conventional stage, Fig. 5 is a sectional view taken along line ■-■ in Fig. 4, Fig. 6 is a top view during on-wafer blobbing using the conventional stage, Fig. 7 6 is a cross-sectional view taken along the line ■--■ in FIG. 6, and FIG. 8 is a partially enlarged view of FIG. 7. In the figure, (4) is the wafer, (5) is the vacuum supply port, (
6) is a chip, (force is) a loaf needle, (8) is a stage, (8a) is a vacuum chuck pedestal, and (8b) is a wafer pedestal. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
エハプローバにおいて、ウェハが載置されるステージを
、金属微粒子を圧縮整形又は繊維状金属を圧縮整形した
多孔質金属材料によつて構成したことを特徴とするウエ
ハプローバのステージ。(1) In a wafer prober that evaluates the electrical characteristics of each chip in the wafer state, the stage on which the wafer is placed is made of a porous metal material obtained by compressing fine metal particles or compressing fibrous metal. A wafer prober stage characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2680690A JPH03230542A (en) | 1990-02-05 | 1990-02-05 | Stage of wafer prober |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2680690A JPH03230542A (en) | 1990-02-05 | 1990-02-05 | Stage of wafer prober |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03230542A true JPH03230542A (en) | 1991-10-14 |
Family
ID=12203540
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2680690A Pending JPH03230542A (en) | 1990-02-05 | 1990-02-05 | Stage of wafer prober |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03230542A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07169824A (en) * | 1993-12-13 | 1995-07-04 | Anelva Corp | Substrate heating and cooling mechanism |
| JPH0989997A (en) * | 1995-09-20 | 1997-04-04 | Hioki Ee Corp | Suction type board fixture for base board inspecting device |
| JP2008177562A (en) * | 2007-12-28 | 2008-07-31 | Matsushita Electric Ind Co Ltd | Wafer cassette device |
-
1990
- 1990-02-05 JP JP2680690A patent/JPH03230542A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07169824A (en) * | 1993-12-13 | 1995-07-04 | Anelva Corp | Substrate heating and cooling mechanism |
| JPH0989997A (en) * | 1995-09-20 | 1997-04-04 | Hioki Ee Corp | Suction type board fixture for base board inspecting device |
| JP2008177562A (en) * | 2007-12-28 | 2008-07-31 | Matsushita Electric Ind Co Ltd | Wafer cassette device |
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