JPH03229338A - Rom testing method - Google Patents

Abstract

PURPOSE:To make it difficult to decode contained ROM data and to realize the ROM copyright protection by varying the semantics of a ROM address at the time of test mode. CONSTITUTION:A value of a ROM address bus 6 selected by a regular operation mode signal 4 for determining a regular operating state of a single chip mode, etc., or a ROM test mode signal 5 for determining a simple output test state of a ROM is inputted as an input of a ROM address decoder 2 through a multiplexer group 3. The ROM address bus 6 selected by the regular operation mode signal 4 is constituted so that ROM data in a built-in ROM 1 corresponding to an address value is selected. Also, the ROM address bus 6 selected by the ROM test mode signal 5 is inputted at random so that the ROM data in the built-in ROM 1 corresponding to the address value is not selected. In such a way, it becomes difficult to decode the built-in ROM 1, and the ROM copyright protection can be realized.

Description

[Detailed Description of the Invention] Industrial Application Field The present invention prevents decoding of ROM data and protects ROM copyright by randomly outputting built-in ROM data in a ROM test of a microcomputer. This relates to a ROM test method.

Conventional technology In the past, for example, in a one-chip microcomputer, in order to test whether the built-in ROM is correct at the time of shipment, the ROM data was output in address order with a clock synchronized, or the ROM address was input from the outside. outputs ROM data corresponding to the ROM address,
It had a ROM test mode separate from the normal mode.

Problems to be Solved by the Invention There are terminal setting methods to switch settings between ROM test mode and normal mode, but once ROM test mode is set, all internal ROM data can be read from the outside, resulting in a long period of time and expense. Built-in RO developed by
M data values and know-how were sometimes leaked. The present invention solves the above-mentioned conventional problems, and aims to provide a ROM testing method that realizes ROM copyright protection by making it difficult to decode built-in ROM data.

Means for Solving the Problem In order to solve this problem, the ROM test method of the present invention changes the meaning of the ROM address or the meaning of the ROM data during the test mode, and also changes the meaning for each ROM type. The modification method has been changed so that the structure of the built-in ROM data cannot be deciphered.

Effect: With this configuration, it is difficult to decode the built-in ROM, and ROM copyright protection can be realized.

Example Examples of the present invention will be described below.

FIG. 1 is a diagram showing an embodiment of the present invention in which the meanings of bits of a ROM address are changed during a ROM test mode. The built-in ROMI outputs ROM data corresponding to the address selected by the ROM address decoder 2. As an input to the ROM address decoder 2, a normal operating mode signal 4 is sent via a multiplexer group 3 to determine a normal operating state such as single-chip mode, or a ROM test mode signal 5 is used to determine a simple output test state of the ROM.
The value of the ROM address bus 6 selected by the ROM address bus 6 is input. The ROM address bus 6 selected by the normal operation mode signal 4 selects ROM data in the built-in ROMI corresponding to the address value, and the ROM address bus 6 selected by the ROM test mode signal 5 selects the address value. input randomly so that the ROM data in the built-in ROMI corresponding to is not selected. FIG. 2 is a diagram showing the relationship between ROM address bus values and ROM address decoder input values. ROM address/s + ROM address bus value which is the value on bus 6 (here, the ROM address width is 4)
(considered in terms of bits), the multiplexer group 3
The ROM address decoder input value selected in corresponds to the ROM address bus value in the normal operation mode, that is, when the normal operation mode signal 4 is enabled, so that there is no problem in normal operation. However, in the ROM test mode, that is, when the ROM test mode signal 5 is enabled, the ROM address bus value and the ROM address decoder value do not match, and therefore the value of the output ROM data is the value on the ROM address node. have different values. R.O.
In M test mode, R corresponding to the ROM address
Since the OM is not output, it becomes difficult to decode and the ROM data can be protected.

Figure 3 shows the meaning of bits of ROM data according to the present invention.
FIG. 6 is a diagram illustrating an example of changing during the OM test mode. The output data of the built-in ROMI is selected by the multiplexer group 7 such that when the normal operation mode signal 4 is enabled, the meanings of the bits of the output data correspond to the meanings of the bits of the ROM data bus 8. When the ROM test mode signal 5 is enabled, the meaning of the bits of the output data and the meaning of the bits of the ROM data bus 8 do not correspond, and the output value of the built-in ROMI and the value on the ROM data bus 8 do not match. The bits of the built-in ROM code are output in a random manner, making it difficult to decipher.
ROM data can be protected.

Figure 4 shows the meaning of bits of ROM data of the present invention.
FIG. 6 is a diagram showing an example in which changes are made corresponding to one bit of an OM address. When the normal operation mode signal 4 is enabled, ROM output data C1l is selected such that the bit meanings of the ROM output data correspond to the meanings of the 80 bits of the ROM data bus, and normal operation can be performed. When the ROM test mode signal 5 is enabled, the ROM output data A9 or ROM output data BIO, where the bit meanings of the ROM output data and the bits of the ROM data bus 8 do not correspond, depend on the value of the ROM address bus 12. selected. The value of the ROM address bus 12 is input to the multiplexer 13 via the inverter circuit 14.
The value of the ROM address bus 12 becomes the selection signal and the ROM
The ROM output data BIO is selected as the output data 80. By replacing the selection method of the present invention with the multiplexer group 7 of FIG. 3, the meaning of the ROM data bus during the ROM test mode can be changed using the ROM address bus, and the built-in ROM can be protected.

FIG. 5 is a diagram showing an embodiment in which the meaning of bits of a ROM address or ROM data is changed using a contact mask of the present invention. ROM address or ROM
By arranging the contact 16 at any intersection between the data bus 15 and the input gate selected by the ROM test mode signal 4 of the multiplexer 17, the mask forming the input gate and the bus 15 With a single contact mask that connects the masks forming the wiring, it is possible to assign meaning to the value on the bus 15 and the value output through the multiplexer 17 by simply changing the position of the contact 16 in the ROM test mode. be.

The contact position can be changed for each ROM, and RO
Protection for each M variety is possible.

Effects of the Invention As described above, according to the present invention, ROM data can be easily prevented from being decoded, and data can be protected.

[Brief explanation of drawings]

FIG. 1 is a block diagram explaining the first invention in detail;
The figures are data relationship diagrams, Figures 3 and 4. FIG. 5 is a block diagram illustrating details of the second invention, the third invention, and the fourth invention, respectively. 1... i1ROM, 2... ROM address decoder, 3.7.13.17... multiplexer, 4... normal operation mode signal, 5...
...ROM test l-11--do message! −,6,12
...ROM address bus, 8...RO
M data bus, 9, 10.11...-ROM output data, 14... Inverter circuit, ]5...
...ROM address bus or ROM data bus, 16
······contact.

Claims (3)

[Claims] (1) When a microcomputer is used in normal operation mode, the meaning of the bits on the ROM address bus and the meaning of the address input to the built-in ROM address decoder are the same, and the values on the ROM address bus The ROM address value input to the built-in ROM address decoder matches and the ROM corresponding to the value on the ROM address bus
M data is output, and in ROM test mode, ROM
The meaning of the address bus bits and the address input to the built-in ROM address decoder are different, and R
Due to the difference between the value on the OM address bus and the ROM address input to the built-in ROM address decoder, the ROM
A ROM test method characterized by outputting ROM data that does not correspond to a value on an M address bus. (2) When a microcomputer is used in normal operation mode, the meanings of the ROM output data bits and the ROM data bus bits are the same, and the ROM output data bits have the same meanings.
The M output data value and the value on the ROM data bus match, and the R
In OM test mode, the meanings of the ROM output data bits and the ROM data bus bits are different.
2. The ROM test method according to claim 1, further comprising outputting a value different from a ROM output data value onto the ROM data bus. (3) In the microcomputer, in the ROM test mode, the ROM is
ROM according to claim 1, characterized in that the bits of the output data have different meanings and the ROM data bus has different meanings.
Test method. (3) In a microcomputer, the meaning of the bits of the ROM address bus in the ROM test mode and the meaning of the address input to the built-in ROM address decoder, or the meaning of the bits of the ROM output data and the RO
The meaning of the M data bus bits can be changed with a single contact mask that connects the part that forms the gate of the transistor and the part that forms the wiring metal, making it possible to change the bit correspondence for each ROM type. Characteristic ROM test method.