JPH0322441A - Compound semiconductor device - Google Patents

Abstract

PURPOSE:To design an LSI and VLSI composed of a plurality of elements, and to contribute to the design of an analog element particularly by inhibiting mutual intervention between the two elements. CONSTITUTION:The drain 2, source 3 and gate 4 of a first MESFET are formed onto a GaAs substrate 1, and the source 5, drain 6 and gate 7 of a second MESFET are shaped. A control electrode 8 to which negative potential must be applied to the source of the first MESFET is shaped between the two elements through Be ion implantation, etc. A second novel doping layer and a P<+> diffusion layer 9 are formed by using the same doping technique. The relative positional relationship is positioned between the first element, which must prevent deterioration, and the control electrode 8. A proper value exists between the P<+> diffusion layer (a channel stopper) and the source 3 as the first element at that time and takes 2.0mum or more in normal cases, but it depends upon the characteristics of the substrate and is not necessarily kept constant.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a compound semiconductor device, and in particular to a GaAsFET.
The present invention relates to a compound semiconductor device having:

[Conventional technology]

Conventionally, MESFEs formed on semi-insulating GaAs substrates
Isolation between adjacent elements of T was provided by the substrate itself. That is, unlike bipolar devices formed on silicon substrates, the high resistance of the substrate (10 7 to 10 8 Ω·cm) has been utilized without providing a new diffusion layer for insulation.

[Problem to be solved by the invention]

In the conventional compound semiconductor device described above, the leakage current between the elements is not sufficiently small, so that high integration is suppressed. In particular, leakage current in a GaAs substrate affects deep levels existing in all parts of the substrate. That is, electrons or holes that form a leakage current are trapped in the deep level, expanding the width of the depletion layer under the active layer, and thus deteriorating the train current flowing between the source and drain.

The magnitude of such deterioration depends on the source potential of the adjacent element.

This poses extremely serious problems in terms of circuit design and element reliability of highly integrated ICs.

Furthermore, such deterioration characteristics have temperature dependence, and the degree of deterioration is greater at lower temperatures.

[Means to solve the problem]

The compound semiconductor device of the present invention includes two GaAs MESFs.
A control electrode is provided in the middle region of the ET, and a negative potential is applied to the control electrode with respect to the source of the first element. This induces a depletion layer around the P-type diffusion layer provided under the control electrode. As a result, electrons injected from the second source electrode into the GaAs substrate do not cross the depletion layer barrier or are difficult to cross, and traps exist in the depletion layer between the active layer under the gate electrode of the first element and the substrate. Lose or reduce the chance of being captured in the level. Therefore, the first FET can operate normally, that is, maintain a constant drain current, without being mutually interfered with by the second FET. However, since a depletion layer or an inversion layer originally exists on the surface of the GaAs substrate, there is a possibility that the depletion layer of the control electrode cannot be expected to expand. Therefore, in the present invention,
A P+ diffusion layer is provided on the first element side at the same time as the control electrode.

〔Example〕

FIG. 1 is a sectional view of a first embodiment of the invention.

The drain 2, source 3, and gate 4 of the first MESFET are formed on the GaAs substrate 1, and the drain 2, source 3, and gate 4 of the first MESFET are formed.
A source 5, drain 6, and gate 7 of the ET are formed.

Thereafter, a control electrode 8 to which a negative potential is applied to the source of the first MESFET is formed between the two elements by Be ion implantation or the like. The depth of the doped layer at this time is preferably equal to or about twice the depth of the source/drain, but this is not necessarily an absolute condition. Furthermore, a second new doping layer, P+ diffusion layer 9, is formed using similar doping techniques. This relative positional relationship should be placed between the first element and the control electrode 8 to prevent deterioration.

At this time, the P+ diffusion layer (channel stopper) and the source 3 of the first element have an appropriate value, which is usually 2.0μ.
m or more, but it depends on the characteristics of the substrate and is not necessarily constant.

FIG. 2 is a sectional view of a second embodiment of the invention. A control electrode and a P+ diffusion layer (channel stopper layer) 9 are provided around the first element. That is, it has the same configuration as the first embodiment except that the four sides are surrounded.

〔Effect of the invention〕

As explained above, according to the present invention, mutual interference between two elements is suppressed, and it becomes possible to design LSIs and VLSIs made up of a plurality of elements. This is particularly advantageous in terms of design of analog elements, which are susceptible to mutual interference between elements.

Note that the above effects can be obtained by using GaAsME using a GaAs substrate.
Although we have described the case where SFET is applied to an integrated circuit as a basic element, InGaAs is an example of other compound systems.
The same applies to the system.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a first embodiment of the present invention, and FIG. 2 is a cross-sectional view of a second embodiment of the present invention.
FIG. DESCRIPTION OF SYMBOLS 1... GaAs substrate, 2... Drain, 3... Source, 4... Gate, 5... Source, 6... Drain, 7... Gate, 8... Control electrode, 9...Channel stock 5-6

Claims (1)

[Claims] MESFET formed on a GaAs substrate and the MESFET
A compound semiconductor device comprising: a P-type diffusion layer provided between SFETs and applying a negative potential to the source of the MESFET; and a P^+ diffusion layer provided between the MESFET and the P-type diffusion layer. .