JPH0322110B2 - - Google Patents

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a method for synchronizing frames in a CMI code transmission method, and in particular, synchronizing by inserting a frame signal into a main signal and a violation. This relates to frame synchronization methods.

[Conventional technology]

Although the CMI code transmission system has the problem of increased bit speed, it is widely used because it is suitable for long-distance transmission, as it has features such as the ability to easily extract clock signals and avoid spectrum concentration.

Figure 3 shows the configuration of the CMI code transmission system. On the transmitting side, the transmitting logic unit 1 creates digital data consisting of a normal NRZ signal according to the input signal, and converts this into a clock signal and a frame. It is input to CMI coder 2 along with the signal. With CMI coder 2, each of these inputs
Generates output consisting of CMI codes. On the receiving side, the received signal is converted to NRZ by CMI decoder 3.
The signal is separated into digital data, a clock signal, and a frame signal and input to the reception logic section 4, and the reception logic section 4 restores the input signal using these signals and outputs it.

FIG. 4 shows the code structure of the CMI code. The CMI encoding system encodes NRZ code "0" into "01" at double the clock frequency, and transmits "1" by alternating repetition of "0" and "1" at the clock frequency. But further CMI
A so-called violation (CRV) is added that inverts the sign of the code "1" every arbitrary number of bits. Violations violate the CMI coding rules at different locations and can therefore be easily detected, so that by inserting and detecting violations, it is possible, for example, to transmit an auxiliary signal. In FIG. 4, a violation is applied at the location shown in parentheses.

As a frame synchronization method in the CMI code transmission method, a method has conventionally been used in which a frame signal is inserted into the main signal and extracted on the receiving side to achieve frame synchronization. FIG. 5 shows the configuration of a conventional frame synchronization circuit, in which an input signal is added to a synchronization pattern comparison circuit 5, and a signal such as "11010110" consisting of 8 bits, for example, is inserted into the input signal for each frame. Frame bits are extracted and compared with the held synchronization pattern, and when they match, an output is generated to the synchronization protection circuit 6. A synchronization protection circuit 6 protects leading and trailing edges to prevent frame synchronization errors. That is, when the synchronization pattern comparison circuit 5 detects a predetermined number of matches consecutively, it determines that the frame synchronization signal has been extracted correctly and outputs the frame signal. When a mismatch is detected a predetermined number of times, it is determined that frame synchronization has been lost. The counter 7 counts the number of matches and mismatches at this time.

[Problem that the invention seeks to solve]

In this way, in the conventional frame synchronization method, synchronization is detected by extracting frame bits for each frame and protecting the leading and trailing edges, which not only takes a long time to establish frame synchronization. , a counter to measure the time of the frame length is required, and when the frame length is long, the amount of hardware increases.

[Means for solving problems]

In order to solve the problems of the conventional technology, the frame synchronization method of the present invention inserts a frame signal into the main data on the transmitting side, performs violation according to the frame signal, and sends it out. Establishment of frame synchronization is determined by detecting coincidence between the frame signal extracted from the main data and the frame signal extracted from the violation position.

[Effect]

In the frame synchronization method of the present invention, the establishment of frame synchronization is determined by detecting a match between the frame signal extracted from the main data of the received signal and the frame signal extracted from the violation position. Judgment is made in a short time.

〔Example〕

FIG. 1 shows the configuration of the transmission logic section on the transmitting side in the frame synchronization method of the present invention.
11 and 12 are multiplexers, and 13 is a delay circuit.

In FIG. 1, a frame signal is applied to multiplexer 11 along with input data, and multiplexer 11 thereby outputs a main signal with frame bits inserted into main data.

Further, the frame signal is added to the multiplexer 12 along with other violation signals, thereby outputting a signal at the violation position synchronized with the frame signal. This signal passes through a delay circuit 13 and is aligned with the main signal in frame position.
The CMI code is added to the CMI coder 2 together with the output of the multiplexer 11, and the CMI code with the frame signal position subjected to the violation is applied to the CMI coder 2.
Generated from coder 2.

FIG. 2 shows the configuration of the receiving logic section on the receiving side in the frame synchronization method of the present invention,
14 and 15 are frame detection circuits, respectively, and 16 is an AND circuit.

The main data separated by the CMI decoder 3 is applied to the frame detection circuit 14. The frame detection circuit 14 has a synchronization pattern comparison circuit shown in FIG. 5, and generates an output when a frame bit matching the synchronization pattern is detected from the input signal.

On the other hand, in the method of this embodiment, violations in CMI codes are added to frame signal positions. Frame detection circuit 15 detects violations from the input signal and generates an output signal.

The AND circuit 16 generates an output when the outputs of both frame detection circuits match. This output is a signal indicating the establishment of frame synchronization, and it is determined from this that the frame synchronization state has been established, and the main data reception operation can be started.

In the configuration shown in FIGS. 1 and 2, if there is no need to insert anything other than a frame signal as a violation signal, a multiplexer for performing violation on the transmitting side,
Also, there is no need for a demultiplexer (not shown) to separate the violation position signal at the receiving end.

〔Effect of the invention〕

As explained above, according to the frame synchronization method of the present invention, establishment of frame synchronization is determined by detecting a match between a frame signal extracted from the main data of a received signal and a frame signal extracted from a violation position. do. This method of determining the establishment of frame synchronization is sufficient when there is no noise in the transmission line system, and by applying this invention, there is no need to protect the leading and trailing edges as in conventional frame synchronization methods. Therefore, the time required to determine whether frame synchronization is established is significantly reduced.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of the transmitting logic section on the transmitting side in the frame synchronization method of the present invention, FIG. 2 is a diagram showing the configuration of the receiving logic section on the receiving side in the frame synchronization method of the present invention, and FIG. FIG. 4 is a diagram showing the configuration of the CMI code transmission system, FIG. 4 is a diagram showing the code configuration of the CMI code, and FIG. 5 is a diagram showing the configuration of a conventional frame synchronization circuit. 1...Transmission logic section, 2...CMI coder, 3...CMI
Decoder, 4... Reception logic section, 5... Synchronization pattern comparison circuit, 6... Synchronization protection circuit, 7... Counter, 1
1, 12...Multiplexer, 13...Delay circuit, 1
4, 15...Frame detection circuit, 16...AND circuit.

Claims (1)

[Claims] 1 From the main data and clock on the transmitting side
A CMI code is generated, a violation is applied to invert the subsequent code at each designated point in the CMI code, and the information is transmitted. On the receiving side, information on the position where the violation has been applied is extracted from the received signal, and the CMI code is transmitted. In the CMI code transmission system, which decodes the code and reproduces the main data, the transmitting side inserts a frame signal into the main data, performs a violation according to the frame signal, and transmits it, and the receiving side extracts it from the main data. A frame synchronization method characterized in that establishment of frame synchronization is determined by detecting a match between a frame signal extracted from a violation position and a frame signal extracted from a violation position.