JPH03220991A - Video signal processing circuit - Google Patents

Abstract

PURPOSE:To improve vertical resolution on a screen where there is a few noise and to decrease noise quantity on a screen where there is much noise by performing switching between scanning line interpolation and the averaging of a current signal by using a delay circuit which provides IH delay. CONSTITUTION:When an electric field intensity detecting circuit 110 outputs intense electric field, a control circuit 111 controls a changeover switch 105 so as to select the current signal, so an interlaced signal 101 is outputted, as it is, through the switch 105. A mean value and the interlaced signal 101 are outputted alternately as a double-speed interpolated signal 107. When the electric field intensity detecting circuit 110 is switched to a weak electric field, the control circuit 111 controls the changeover switch 105 so as to select the output of a shift register 104, so a mean value is inputted to an interpolating circuit 106 twice and the double-speed interpolated signal 107 has the same mean value twice continuously. Consequently, the vertical resolution is improved when an electric field is intense, and when the electric field is weak, the vertical resolution decreases, but a noise-free image can be obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a video signal processing circuit that performs scanning line interpolation.
In particular, it relates to scanning line interpolation using digitized video data.

[Prior Art] So-called TV or digital television is based on a technology that performs three-dimensional Y/O separation, scanning line interpolation, and non-interlacing. In particular, scanning line interpolation is important for improving image quality because it increases vertical resolution and makes line flicker less noticeable. The method of scanning line interpolation is to use a 1H line memory that stores image data for one horizontal scanning period (hereinafter referred to as 1H) or a delay circuit that delays it by 1H to create the average value of the current signal and the signal from 1H before. Scan by value #! There is a way to do interpolation.

[Problems to be Solved by the Invention] However, when such red scanning line interpolation is performed, the following problems arise. When playing low-noise video recordings, such as optical reading discs or high-quality VTRs,
Alternatively, if stable and good television reception can be achieved, scanning line interpolation may also be effective. However, in cases such as receiving television programs in areas where the electric field strength is weak, the S/
Because N cannot be taken, rather than improving image quality by scanning line interpolation,
Improvement in S/N is desired.

In the non-invention, by using a delay circuit that can delay more than IH and switching between scanning line interpolation and averaging of the current signal, scanning line interpolation is selected on a screen with little noise, and the vertical direction By increasing the image quality and switching between selecting the current signal and the average value of the memory on a noisy screen, vertical resolution is improved on a single screen with little noise, and the noise is reduced. With many circular surfaces, the purpose is to reduce the amount of noise.

[Means for Solving the Problems] In order to achieve the above object, the video signal processing circuit of the present invention provides (1) a) a video signal processing circuit that performs scanning line interpolation, and b) a delay of at least one horizontal scanning period. c) an arithmetic unit that outputs the average of the output of the ntl delay device and the current signal; d) a changeover switch that switches between the current signal and the output of the arithmetic unit; and e) an output of the changeover switch and the arithmetic unit. The present invention is characterized in that it includes an interpolation circuit that performs scanning line interpolation using the output of the .

(2) a) b) in the video signal processing circuit;
A tuner for receiving television broadcasting C) A detection circuit for detecting electric field strength from the channel; and d) A control circuit for controlling the changeover switch from the detection circuit.

[Embodiment] An example of the configuration of the present invention will be explained below based on the drawings. Fig. 1 shows the configuration of a video signal processing circuit according to the present invention.

The 101 interlaced signal is, for example, a composite video signal, a luminance signal, a chrominance signal, etc. 102 The 1H delay circuit may be any shift register capable of 1H delay.

Alternatively, it may be configured with a 1H line memory. The 103 adder adds the current signal and the output signal of the 1021H delay circuit, and in addition to multiplying the current signal by 1/2 with the 104 shift register, the average value of the current signal and the output signal of the 1021H delay circuit (more than the average (abbreviated as value signal). This configuration may be of any type as long as the average value of the current signal and the output signal of the 1.021H delay circuit can be obtained. For example, each signal is multiplied by 1/2 in a shift register, and then quality is added. Good too. The changeover switch 105 switches between the current signal and the average value signal and outputs the output to the interpolation circuit 106, and the switching control is performed by the control circuit 112. The interpolation circuit 106 performs double speed interpolation based on the output of the changeover switch 105 and the output of the shift register 104, that is, the average value signal, to obtain a 107 times speed interpolation signal. Antenna 108 and tuner 109 receive television broadcasting, and from this received signal, a field strength detection circuit 110 detects the field strength of the channel currently being received. This can be easily realized using 109 tuner RFAGO or the like. The output of the 110 field strength detection circuit is 1
It is sent to the 11 control circuit, and together with the 112 video/Rp discrimination signal, controls the changeover switch 105. 11
1 control circuit also includes 102 1H delay circuit, 104
Controls shift register and 106 interpolation circuits.

The operation of the video signal processing circuit shown in FIG. 1 will be explained based on FIG. 2. It is assumed that the 112 video/RF discrimination signal is now an RF signal. Since television broadcast signals are interlaced, the signals are transmitted vertically one by one. Therefore, the 101 interlaced signal is being transmitted in a state where it is pinched one by one, in other words, information is missing in the vertical direction. The 102 1H delay circuit extends this signal by 1Ha, and its output is the image data exactly 1H before the 101 interlace signal.The output of the 104 shift register is the current signal (101 interlace signal) and the output of the 102 1H delay circuit. This is the average value of the output signal. Although averaging reduces information, it is effective in reducing noise. If there is a strong correlation with the image 1H ago, by taking the average value, the amount of noise can be reduced to 1/1 in terms of power.
2 amplitudes becomes 1/JT. Therefore, using the average value is more resistant to noise than using the original signal as it is.

Now, suppose that television broadcasting is being received by antenna 108 and tuner 109, and the electric field strength detection circuit 110 is outputting that the electric field is strong.

The 111 control circuit controls the 105 changeover switch to select the current signal. As a result, the 101 interlaced signal is output as is from the 105 changeover switch. Therefore, as for the 107 times speed interpolation signal, the average value and the 101 interlaced signal are outputted alternately.

Next, assume that the electric field strength detection circuit 110 switches to a weak electric field. The 111 control circuit may immediately control the 105 changeover switch from now on, but if it is during the video period,
Since the switching will be visible, it is preferable to switch during the retrace period. The changeover switch 105 is controlled by the control circuit 111 to select the output of the shift register 104. Therefore, the average value will be input twice to the 106 interpolation circuit, and the same average value will continue to be input twice to the 107 times speed interpolation signal. These switching may be performed not by the 110 field strength detection circuit but by the amount of noise in the video signal.

By performing the above operations, when the electric field is strong, the vertical resolution increases, and when the electric field is weak, the vertical resolution decreases, but an image with less noise can be obtained.

Furthermore, if you are concerned about the switching of the 105 selector switch, it goes without saying that the 111 control circuit can be provided with hysteresis for a certain period of time to make this switching less noticeable.

[Effects of the Invention] As described above, according to the present invention, scanning line interpolation can be realized with a simple circuit configuration so that the vertical resolution is increased on a screen with little noise, and the noise is reduced on a screen with a lot of noise. Therefore, it is possible to reduce costs and easily downsize.

Furthermore, since the interpolation mode is automatically switched depending on the electric field strength, the user can always obtain good image quality without having to be aware of the switch when receiving television, and is ideal for small portable television receivers.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of a video signal processing circuit according to the invention. FIG. 2 is an operation diagram showing the control shown in FIG. 1. 101...Interlaced signal 102.
......IH delay circuit 103...
-Adder 104......Shift register 105...
......Switch switch 106...
・Interpolation circuit 107... Double speed interpolation signal 10B...
...Antenna 109...Tuner 110...Field strength detection circuit 111...
...Control circuit 112...Video/RF discrimination signal or higher

Claims (2)

[Claims] (1) a) A video signal processing circuit that performs scanning line interpolation, b) a delay device capable of delaying at least one horizontal scanning period, c) an arithmetic unit that outputs the average of the output of the delay device and the current signal, and d) A video signal processing circuit comprising: a changeover switch that switches between a current signal and an output of the arithmetic unit; and e) an interpolation circuit that performs scanning line interpolation using the output of the changeover switch and the output of the arithmetic unit. (2) A claim characterized by comprising: a) a tuner that receives television broadcasting; b) a detection circuit that detects electric field strength from the tuner; and c) a control circuit that controls the changeover switch from the detection circuit. 2. The video signal processing circuit according to item 1.