JPH03216033A - Multiplex/demultiplex connection system - Google Patents

Abstract

PURPOSE:To simplify the control for changeover of multiplex/demultiplex operation and to make the hardware scale small by multiplexing/demultiplexing a signal accommodated to each of plural interface units onto signals of an integral number having a transmission speed equal to a prescribed unit transmission speed. CONSTITUTION:A j-th terminal from a prescribed reference terminal position itself at an i-th slot 4i counted from a slot 41 itself placed at one end among plural slots 41, 42,..., 4n is connected to a (J-1)th terminal of an (i+1)th slot 41+l, where the relation of j<=n-i exists. Thus, n-set of terminals 31, 32, ..., 3n of the slot 41 located at one end input and output plural signals multiplexed/ demultiplexed so as to have a transmission speed equal to a unit transmission speed (N). Thus, the control for changeover of multiplex/demultiplex is simplified and the hardware scale is made small.

Description

Detailed Description of the Invention [Summary] Regarding a multiplexing/demultiplexing connection system in a multiplexing/demultiplexing device that multiplexes/demultiplexes a plurality of signals that may each have different transmission speeds, the present invention relates to a multiplexing/demultiplexing connection system in a multiplexing/demultiplexing device that multiplexes/demultiplexes a plurality of signals each having a different transmission rate. The purpose is to simplify the control for switching and reduce the hardware scale, and it accommodates one or more interface units, each of which accommodates a signal having a transmission rate that is an integral multiple of a predetermined unit transmission rate. in a multiplexing/demultiplexing connection system for multiplexing/demultiplexing into a plurality of signals each having a transmission rate equal to said predetermined unit transmission rate, each capable of connecting one of said interface units, each having a predetermined It has a plurality of slots each having a terminal in some or all of the positions where terminals can be installed in the slot, and each of the plurality of interface units transmits the signal accommodated therein at a rate equal to the predetermined unit transmission rate. a multiplexing/demultiplexing circuit for multiplexing/demultiplexing a number of signals equal to the integer and having a speed, and input/output terminals for the number of signals equal to the integer are arranged at a predetermined position in the predetermined front terminal installation possible position. The integer number of slots are sequentially arranged in a predetermined direction from a position corresponding to a reference terminal position of the plurality of slots,
A slot located at an end in one direction has a number of terminals equal to the number of the plurality of slots, the number of the plurality of fronts is n, and i is l≦i≦n-1, and the plurality of slots The i-th slot located at the end of the one direction, counting from the slot itself, each has at least n-i terminals from the predetermined reference terminal position, and among the plurality of slots, the The j-th terminal counting from the predetermined reference terminal position in each of the i-th slots counting from the slot itself located at the end of is j≦n−i.
, the n terminals of the slot connected to the j-1th terminal of the i+1th slot and located at the end of the one direction are such that each of the terminals has a transmission rate equal to the predetermined unit transmission rate. It is configured to output a plurality of multiplexed/separated signals.

[Industrial application field]

The present invention relates to a multiplexing/demultiplexing connection system in a multiplexing/demultiplexing device that multiplexes/demultiplexes a plurality of signals, each of which may have a different transmission rate.

Conventionally, when proceeding with multiplexing from the level of individual user terminal lines, it has been performed stepwise from a low-order group to a high-order group via multiple stages of multiplexing devices. By the way, in recent years, the world standard 50M, 100M, 150M, ... (150X
n) Mbps transmission speed signal and existing 1.5M in each country
, 6.3 Mbps, etc., has been proposed.

The configuration of such a "new synchronous multiplexing device" is to accommodate one or more signals having a transmission rate of 50M, IOOM, 150M, etc., which are world standards, within the overall capacity of the device, and then transmission rate unit, for example, 50
Mbps multiplex/separate into multiple signals, then
A configuration in which these multiple predetermined transmission speed unit signals are manually input to a common processing unit, and the common processing unit separates them into functional unit signals and processes them (for example, allocating them to audio signal lines for each of several thousand channels). is considered.

The present invention uses the world standard 50M and 10M among the above configurations.
A signal of 0M, 150MbpS, etc. is accommodated within the total capacity of the device, and once the signal is transferred to a predetermined transmission speed unit, for example, 50MbpS.
The present invention relates to a technique for multiplexing/separating signals into multiple signals having bps.

[Prior art and problems to be solved by the invention] Part 6
The figure shows a schematic configuration of a new synchronous multiplexing device that has been proposed in the past.

In FIG. 6, 81, 82, and 83 are slots on the back panel that accommodate interface units in the interface section, 84 is an interface section mounting information signal line that includes the interface side transmission speed, and 85 is a multiplex/ A plurality of terminals on the interface section side of the separation section, 86 a selector, 87 a plurality of terminals on the common processing section side of the multiplexing/separation section, 91 a common processing section, and 88.
89. and 90 are signal lines connecting the multiplexing/demultiplexing section and the common processing section.

In the new synchronous multiplexing device shown in Fig. 6, 50M, 100M
M, 150Mbps signal, total capacity is 150M
accommodating any signal or signals of bps,
The predetermined transmission speed unit is 3 of 50 Mbps each.
The configuration is such that the signals are multiplexed/separated into two signals and connected to the common processing section 9l.

Each slot 81, 82 . and 8
3 outputs, at each input/output terminal, one of the above-mentioned 50M, 100M, and 150Mbps signals that are input to and/or output from the interface unit accommodated in the slot. These three slots 81
．． 82 and 83 are respectively connected to three terminals of the multiplexing/demultiplexing section, and are multiplexed/separated into three signals of 50 Mbps each as the above-mentioned predetermined transmission rate unit.

Conventionally, as shown in FIG. 6, this multiplexing/demultiplexing is performed in a selector 86 using interface unit implementation information including the interface side transmission rate, which is supplied from each slot of the interface unit via the signal line 84. That is, switching control of multiplexing/demultiplexing operations is performed based on information indicating which transmission rate of signals is accommodated in each slot.

Therefore, the control for switching between multiplexing and demultiplexing operations in the multiplexing/demultiplexing section becomes complicated, and the configuration for switching increases the hardware scale.

The present invention has been made in view of the above problems, and provides a multiplexing/demultiplexing system that simplifies the control for switching multiplexing/demultiplexing operations in a new synchronous multiplexer and reduces the hardware scale. The purpose is to

? Means for Solving the Problem] FIG. 1 is a diagram showing the configuration of an interface unit and a slot in the present invention.

In Figure 1, 1k is an interface unit, 2
, is the signal (line) accommodated by the interface unit
, 6k is a multiplexing/demultiplexing circuit, 51+5■,...5ai
+ indicates multiple output signals (lines) of the multiplexing/separating circuit 6, 4
．． is a slot.

The interface unit 1k is the system of the present invention. A plurality of signals 2a are provided in the system, and each signal 2a has a transmission rate that is an integral number a times a predetermined unit transmission rate (N).

A plurality of slots 4l, 4z+...4. Each of the slots can be connected to one of the interface units (1k), and each has a terminal at some or all of the terminal positions within a predetermined slot.

Each of the plurality of interface units 1k is provided with a multiplexing/separating circuit 6k, and the multiplexing/separating circuit 6k converts the signal 2k accommodated in each at a transmission rate equal to the predetermined unit transmission rate (N). has,
Said integer a. A number of signals equal to 5. ,5■,...5m
multiplex/separate into m. Furthermore, in each of the plurality of interface units 1k, the input/output terminals of the signals 5, 5■, ... 5ak, whose number is equal to the integer am, are connected to the predetermined reference terminals at the positions where the terminals can be installed in the predetermined slots. The integer a in order from the position corresponding to the position in a predetermined direction.
．． pieces are placed.

Also, FIG. 2 shows how the plurality of slots of the present invention? FIG. 3 is a diagram showing connections between terminals.

In FIG. 2, 41, 4■, . . . 4n are the plurality of terminals, and 31, 3■, .

Among the plurality of slots 4n, 4,...4n, the slot 41 located at the end in one direction has a number of terminals equal to the number n of the plurality of slots, and ■,...The number of 4 is n, and the integer i is 1≦i≦n
-1, among the plurality of slots, the i-th slot 4l as counted from the slot 4l itself located at the end in one direction. each has at least n −i terminals from said predetermined reference terminal position.

As a feature of the present invention, the plurality of throats 41, 4■,
...4n, the jth terminal counting from the predetermined reference terminal position in each of the slots 4 located at the end in one direction and the i-th slot 4n counting from the slot 4n satisfies j≦n. -t, i+1th slot 4. .

It is connected to the j-1st terminal of 1.

? Effect] Signals accommodated in the interface unit 2. ,teeth,
In each case, the transmission speed of the signal is set to a predetermined transmission speed unit N(
The multiplexing/separating circuit 6k provided according to how many times (a times) the a. a plurality of signals 5 having a transmission rate equal to the predetermined transmission rate unit N (bps)
It is multiplexed/separated into I, 5■, . . . 5■.

On the other hand, each slot 41 can be connected to one of the interface units 1k as described above, and as shown in FIG. has.

The plurality of signal input/output terminals of the interface unit 1k are sequentially arranged in a predetermined direction from a position corresponding to a predetermined reference terminal position in the predetermined in-slot terminal installation position, Connected to one of the slots above.

? , each interface unit 1 is connected to a front having a number of input/output terminals equal to or greater than its own number of input/output terminals.

In this way, the n of the front 41 located at the end in one direction is
The terminals 3n3■, . . . 3fi are used to input and output a plurality of signals that are multiplexed/separated so that each signal has a transmission rate equal to the predetermined unit transmission rate (N).

According to the above configuration, conventional switching control for multiplexing/demultiplexing switches the multiplexing/demultiplexing mode based on information regarding the transmission speed of the signal accommodated by the interface unit mounted in the interface section. Similar functions are achieved without any special configuration, using a simple hardware configuration based on the arrangement of terminals in the slots of the back panel in which the interface unit is mounted and the connections between the terminals.

〔Example〕

FIGS. 3 to 5 are diagrams each showing one example of connections in the embodiment of the present invention. This example is 50M,I
Out of the OOM, 150Mbps signal, the total capacity is 15
Accommodating any single or plural signals of 0 Mbps, each 50 Mb as the predetermined transmission rate unit.
This shows a configuration in which the signals are multiplexed/separated into three signals p and s and connected to the common processing section 7.

In the example of FIG. 3, 7 is a common processing section, 41, 42 and 43 are three fronts of an interface section, 51.
52 and 53 are signal lines connecting the three input/output terminals of the interface section and the three input/output terminals of the common processing section 7. 141, 142, and 143 are slots 41.1 on the back panel of the interface section.
42 and 43, each of which has a 50 Mbps signal 231,
232. and 233.

In this case, since the transmission speed of the signal accommodated by each interface unit is equal to the transmission speed of the signal accommodated by each output terminal of the common processing section 7, each interface unit is not provided with a multiplexing/demultiplexing circuit. First, there is one input/output terminal, and each one is provided corresponding to a reference position of a predetermined in-slot terminal arrangement in the slot of the interface section. These terminals are then connected to the reference positions (indicated by ● in FIG. 3) of the interface parts 41, 42 and 43.

Slot 41.4 on the back panel of the interface section
Since the terminals 2 and 43 are connected according to the present invention as shown in FIG. 3 (same as in FIGS. 4 and 5), the three output terminals of the slot 41 are It becomes an output terminal.

In the example of FIG. 4, 151 and 152 are two interface units connected to the slots 41 and 43 of the interface section, each having a
Mbps and 50Mbps signals 241 and 242
It accommodates.

In this case, since the transmission speed of the signal accommodated by the interface unit 151 is equal to twice the transmission speed of the signal accommodated by each input/output terminal of the common processing section 7, the interface unit 151 includes the multiplexing/demultiplexing circuit 631. Two input/output terminals 541 and 542 are provided.

Among these input/output terminals, the terminal 541 is provided corresponding to a reference position of a predetermined in-slot terminal arrangement in the slot of the interface section. These terminals 541 and 542 are connected to the reference position of the interface section 41 and the terminals (indicated by ● in FIG. 4) at positions adjacent to the reference position.

Further, since the transmission speed of the signal accommodated by the interface unit 152 is equal to the transmission speed of the signal accommodated by each input/output terminal of the common processing section 7, the interface unit 152 is not provided with a multiplexing/demultiplexing circuit. , the number of input/output terminals is one, and is provided corresponding to a reference position of a predetermined in-slot terminal arrangement in the slot of the interface section. And this terminal is
It is connected to the reference position of the interface section 43 (indicated by ● in FIG. 4, a slot terminal exists at the O position, but the interface unit to be connected does not have a corresponding terminal).

In the example of FIG. 5, 161 is an interface unit connected to the slot 41 of the interface section, and the total capacity of the common processing section 7 is 150 Mbp.
It accommodates the signal 251 of s.

In this case, since the transmission speed of the signal accommodated by the interface unit 161 is equal to three times the transmission speed of the signal accommodated by each input/output terminal of the common processing section 7, the interface unit 161 includes the multiplexing/demultiplexing circuit 641. Three input/output terminals 551, 552 and 5
53 are provided. Among these input/output terminals, the terminal 551 is provided corresponding to a reference position of a predetermined in-slot terminal arrangement in the slot of the interface section. And these terminals 551, 552
and 553 are connected to the reference position of the interface section 4l, a terminal at a position adjacent to the reference position, and another terminal (indicated by ● in FIG. 5).

As described above, according to the present invention, the multiplexing/demultiplexing unit that conventionally performs multiplexing/demultiplexing selection control is no longer necessary, simplifying the control and hardware configuration, and reducing the cost of the device. be able to.

[Effects of the Invention] According to the present invention, it is possible to simplify the control for switching between multiplexing/demultiplexing operations in a new synchronous multiplexing device, and to reduce the size of the hardware.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of the slots of the interface unit and the back panel of the interface section in the present invention, FIG. 2 is a diagram showing connections between terminals in a plurality of slots of the present invention, and FIGS. 3 to 5 6 is a diagram showing an example of a connection in an embodiment of the present invention, and FIG. 6 is a diagram showing a configuration for a connection between an interface section and a common processing section in a conventional new synchronous multiplexing device. FIG. ? Explanation of symbols] 1. --・Interface unit, 2k- Signal (line) accommodated by the interface unit, 3n3■,
...3 ■ --- n terminals of slot 4I located at the end of one direction, 41, 4 ■, ... 4n One or more slots, 5,, 5 ■, ... 5ak - multiplex/ A plurality of output signals (lines) of the separation circuit 61, s. ．． 1 multiplexing/demultiplexing circuit, 7- common processing section, 4L 42, 43 three slots on the back panel of the interface section, 5 L 5 2.
5 3-, signal lines connecting the three input/output terminals of the interface section and the three input/output terminals of the common processing section 7, 141, 142, 143, 151, 152.161-
Interface unit, 631, 641 multiplex/
Separation circuit. 1st Part 2nd Part 2 A diagram showing an example of a connection that can be made in Embodiment 1 of the present invention 3rd Part A diagram showing an example of a connection that can be made in 1 part of Embodiment 1 of the present invention Part 4

Claims (1)

[Claims] 1. Integers (a_k) each having a predetermined unit transmission rate (N)
Connecting one or more interface units (1_k) accommodating signals (2_k) having twice the transmission rate to multiplex/separate them into a plurality of signals each having a transmission rate equal to the predetermined unit transmission rate (N) In a multiplex/separate connection system, a plurality of slots (four
_1, 4_2, ... 4_n), and each of the plurality of interface units (1_k) transmits the signal (2_k) accommodated therein at a rate equal to the predetermined unit transmission rate (N). a number of signals (5_1, 5_2,
...5_a_k) multiplexing/separating circuit (
6_k), and a number of signals (5_1, 5_2) equal to the integer (a_k);
, ... 5_a_k) input/output terminals are arranged in order in a predetermined direction from a position corresponding to a predetermined reference terminal position in the predetermined in-slot terminal installation position, the integer number (a_k) of the input/output terminals of the plurality of slots. (4_1, 4_2,...4_n)
Among them, the slot (4_1) located at the end in one direction is
The plurality of slots (4_1, 4_2, . . . 4_n) have a number (n) of terminals equal to the number of the plurality of slots.
The number of slots is n, and the integer i is 1≦i≦n-1, and among the plurality of slots, the i-th slot (4_i) is counted from the slot (4_1) located at the end in one direction.
each has at least ni terminals from the predetermined reference terminal position, and among the plurality of slots (4_1, 4_2, ... 4n), the slot (4,) located at the end in the one direction The predetermined reference terminal position in each of the i-th slot (4_i) counting from itself, the j-th terminal counting from itself is located at the i+1th slot (4_i_
The n terminals (3_1, 3_2, . . . 3_n) of the slot (4_1), which are connected to the j-1st terminal of the 1. A multiplex/separate connection system, characterized in that it inputs and outputs a plurality of signals that are multiplexed/separated so as to have a transmission rate equal to speed (N). 2. A back panel having a plurality of slots according to claim 1. 3. The interface unit according to claim 1.