JPH0320765B2 - - Google Patents
Info
- Publication number
- JPH0320765B2 JPH0320765B2 JP59266591A JP26659184A JPH0320765B2 JP H0320765 B2 JPH0320765 B2 JP H0320765B2 JP 59266591 A JP59266591 A JP 59266591A JP 26659184 A JP26659184 A JP 26659184A JP H0320765 B2 JPH0320765 B2 JP H0320765B2
- Authority
- JP
- Japan
- Prior art keywords
- transferred
- constants
- constant
- rom
- volatile memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000010586 diagram Methods 0.000 description 3
- 101100328887 Caenorhabditis elegans col-34 gene Proteins 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B15/00—Systems controlled by a computer
- G05B15/02—Systems controlled by a computer electric
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明は、デイジタル制御装置における信号
の転送方式に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a signal transfer method in a digital control device.
第１図は例えば特願昭58−40337号に示された
従来の制御回路装置を示す構成図であり、図にお
いて、１はマンマシンである定数設定操作パネ
ル、２はこの定数設定操作パネル１により設定さ
れた定数を転送され、一時的にたくわえる不揮発
性メモリ、３はこの不揮発性メモリに転送された
定数を転送され、データ変更するRAM、４は信
号の転送及び制御演算、制御を行なうプログラム
がメモリされるROM、５は４にメモリされてい
るプログラムを実行するCPU、６は５により演
算された結果を位相信号に変えるGPG回路、７
は６の信号により制御されるサイリスタ装置であ
る。
FIG. 1 is a configuration diagram showing a conventional control circuit device shown in, for example, Japanese Patent Application No. 58-40337. In the figure, 1 is a constant setting operation panel which is a man-machine; A non-volatile memory to which the constants set by are transferred and temporarily stored, 3 is a RAM to which the constants transferred to this non-volatile memory are transferred and data is changed, and 4 is a program that performs signal transfer, control calculations, and control. 5 is a CPU that executes the program stored in 4, 6 is a GPG circuit that converts the result calculated by 5 into a phase signal, 7
is a thyristor device controlled by 6 signals.
次に動作について説明する。 Next, the operation will be explained.
例えば、デイジタル制御のサイリスタレオナー
ドにおいて、運転中に速度演算部のゲイン定数の
変更をする場合は、まず定数設定パネル１上のデ
イジタルスイツチで、変更するゲイン定数を設定
する。次にこれをEEPROM(2)にロードする。そ
してEEPROMからRAM３にロードして、CPU
５はこの新しいデータを用いて、ROM４内のコ
ードに従い演算を行う。この結果をGPG６に入
力してやりGPGは新しい位相制御角をサイリス
タ装置７に出力する。 For example, in a digitally controlled thyristor Leonardo, when changing the gain constant of the speed calculation section during operation, first set the gain constant to be changed using the digital switch on the constant setting panel 1. Next, load this into EEPROM (2). Then load it from EEPROM to RAM3 and CPU
5 uses this new data to perform calculations according to the code in the ROM 4. This result is input to the GPG 6 and the GPG outputs a new phase control angle to the thyristor device 7.
従来の制御回路装置は以上のように構成されて
いるので、不揮発性メモリを含むカードの取り換
える場合、全定数を設定し直す必要があり、プロ
グラムの標準化を行なうと定数の数が膨大にな
り、その設定作業に時間がかかつてしまい、また
変更したための試験にも時間がかかるなどの欠点
があつた。 Conventional control circuit devices are configured as described above, so when replacing a card containing non-volatile memory, it is necessary to reset all constants, and when programs are standardized, the number of constants becomes enormous. There were disadvantages such as the setting work was time-consuming, and the testing required for changes was also time-consuming.
この発明は、上記のような従来のものの欠点を
除去するためになされたもので、予めROMに標
準の定数をセツトしておき、不揮発性メモリに定
数設定操作パネルから定数が転送されていなけれ
ば、ROMにセツトしておいた定数の標準値を
RAMに転送し、不揮発性メモリに定数設定操作
パネルから定数が転送されていれば、不揮発性メ
モリに転送された定数をRAMに転送することに
より、標準値でない定数のみを設定すればよい制
御回路装置を提供するものである。
This invention was made to eliminate the drawbacks of the conventional ones as described above.If standard constants are set in the ROM in advance and the constants are not transferred to the nonvolatile memory from the constant setting operation panel, , the standard values of the constants set in ROM are
Transfer to RAM and set constants to non-volatile memory If the constants have been transferred from the operation panel, the control circuit only needs to set constants that are not standard values by transferring the constants transferred to non-volatile memory to RAM. It provides equipment.
以下、この発明の一実施例を図について説明す
る。第２図において、１はマンマシンである定数
設定操作パネル、２はこの定数設定操作パネル１
により設定された定設を転送され、一時的にたく
わえる不揮発性メモリ、３はこの不揮発性メモリ
に転送された定数を転送され、データ変換する
RAM、４は信号の転送及び制御演算、制御を行
なうプログラムと定数の標準値がメモリされる
ROM、５はROM４にメモリされているプログ
ラムを実行するCPU、６はCPU５により演算さ
れた結果を位相信号に変えるGPG回路、７は
GPG回路６の信号により制御されるサイリスタ
装置、８は不揮発性メモリ２が定数設定操作パネ
ル１により定数が設定されたか否かを判定する定
数設定判定手段である。
An embodiment of the present invention will be described below with reference to the drawings. In Fig. 2, 1 is a constant setting operation panel which is a man-machine, and 2 is this constant setting operation panel 1.
The settings set by 3 are transferred to a non-volatile memory that is temporarily stored, and the constants transferred to this non-volatile memory are transferred and the data is converted.
RAM 4 stores signal transfer and control calculations, programs for control, and standard values of constants.
ROM, 5 is a CPU that executes the program stored in ROM 4, 6 is a GPG circuit that converts the result calculated by CPU 5 into a phase signal, 7 is a
A thyristor device 8 controlled by a signal from the GPG circuit 6 is constant setting determining means for determining whether or not a constant has been set in the nonvolatile memory 2 by the constant setting operation panel 1.
次に動作について説明する。 Next, the operation will be explained.
先ず、定数設定操作パネル１上のデイジタルス
イツチで、定数コード番号に従つて定数を設定す
る。ただし、標準値の場合は設定なくてもよい。
次にこれを不揮発性メモリ２に転送する。そし
て、CPU５は定数設定判定手段８を用いてこの
不揮発性メモリ２の値が設定された値か否かを判
断し、不揮発性メモリ２の値又はROM４に予め
セツトされた標準値をRAM３に転送し、このデ
ータを用いてROM内のコードに従い演算を行な
う。この結果をGPG６に入力してやり、GPGは
位相制御角をサイリスタ装置７に出力する。第３
図はこの定数設定手段をプログラムによつて実現
したもののフローチヤートである。９では定数コ
ードNo.ｎをゼロクリアして、ｎをカウンタとして
使用し、１４でカウントアツプを行ない、１５で
最終判断を行なつている。その間、ｎが最終値に
なるまで行なう処理は、１０で不揮発性メモリ２
からコードNo.の定数を読込み、１１でこの定数が
定数設定操作パネルから入力された定数かを判断
する。１２，１３ではこの判断により不揮発性メ
モリ２の値又は予めROM４に用意しておいた標
準値をRAM３に転送する。 First, constants are set using the digital switches on the constant setting operation panel 1 according to constant code numbers. However, if it is a standard value, there is no need to set it.
Next, this is transferred to the nonvolatile memory 2. Then, the CPU 5 uses the constant setting determination means 8 to determine whether the value in the nonvolatile memory 2 is the set value or not, and transfers the value in the nonvolatile memory 2 or the standard value preset in the ROM 4 to the RAM 3. Then, using this data, calculations are performed according to the code in the ROM. This result is input to the GPG 6, which outputs the phase control angle to the thyristor device 7. Third
The figure is a flowchart of this constant setting means realized by a program. At 9, the constant code No. n is cleared to zero, and n is used as a counter. At 14, the count is increased, and at 15, the final judgment is made. During this time, the processing performed until n reaches the final value is
The constant of the code number is read from , and in step 11 it is determined whether this constant is the constant input from the constant setting operation panel. At steps 12 and 13, based on this determination, the value in the nonvolatile memory 2 or the standard value prepared in advance in the ROM 4 is transferred to the RAM 3.
以上のように、この発明によれば、定数の標準
値をROMに設定しておき、不揮発性メモリの値
が定数設定パネルから設定された値か否かを判定
する定数設定判定手段を付加したので、カード取
換え時の時間の無駄を省くなどの効果がある。
As described above, according to the present invention, standard values of constants are set in the ROM, and constant setting determination means is added for determining whether the value in the nonvolatile memory is the value set from the constant setting panel. Therefore, there are effects such as saving time wasted when changing cards.
第１図は従来の制御回路装置の構成図、第２図
はこの発明の一実施例による制御回路装置の構成
図、第３図は定数設定判定手段をプログラムによ
つて実現した場合のフローチヤートである。
図において、１は定数設定操作パネル、２は不
揮発性メモリEEPROM、３はRAM、４は
ROM、５はCPU、６はGPG、７はサイリスタ装
置、８は定数設定判定手段。なお、図中、同一符
号は同一又は相当部分を示す。
FIG. 1 is a configuration diagram of a conventional control circuit device, FIG. 2 is a configuration diagram of a control circuit device according to an embodiment of the present invention, and FIG. 3 is a flowchart when constant setting determination means is realized by a program. It is. In the figure, 1 is a constant setting operation panel, 2 is a non-volatile memory EEPROM, 3 is RAM, and 4 is a
ROM, 5 is a CPU, 6 is a GPG, 7 is a thyristor device, and 8 is a constant setting determination means. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
置、このマンマシン装置に設定された定数を転送
され、一時的にたくわえる不揮発性メモリ、この
不揮発性メモリに転送された定数または予め
ROMに設定している標準値を転送され、データ
変更するRAM、上記予めROM内にメモリされ
ているコードに従いRAM内のデータを用いて制
御演算するCPU、上記不揮発性メモリが上記マ
ンマシン装置により定数が設定されたか否かを判
定する定数設定判定手段を備え、この判定結果が
否であれば予めROMに設定している標準値を、
否でなければ上記不揮発性メモリの定数を上記
RAMへ転送するようにした制御回路装置。1. A man-machine device that sets the variable constants of the control system, a non-volatile memory to which constants set in this man-machine device are transferred and temporarily stored, and constants transferred to this non-volatile memory or stored in advance.
The standard value set in the ROM is transferred to the RAM, which changes the data, the CPU performs control calculations using the data in the RAM according to the code stored in the ROM in advance, and the nonvolatile memory is transferred by the man-machine device. A constant setting determination means is provided to determine whether a constant has been set, and if the determination result is negative, a standard value preset in the ROM is set.
If not, set the above non-volatile memory constant to the above
A control circuit device that transfers data to RAM.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26659184A JPS61143806A (en) | 1984-12-18 | 1984-12-18 | Control circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26659184A JPS61143806A (en) | 1984-12-18 | 1984-12-18 | Control circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61143806A JPS61143806A (en) | 1986-07-01 |
| JPH0320765B2 true JPH0320765B2 (en) | 1991-03-20 |
Family
ID=17432934
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26659184A Granted JPS61143806A (en) | 1984-12-18 | 1984-12-18 | Control circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61143806A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63172302A (en) * | 1987-01-12 | 1988-07-16 | Matsushita Electric Ind Co Ltd | Data drive type air conditioning controller |
| JPS63220304A (en) * | 1987-03-10 | 1988-09-13 | Matsushita Electric Ind Co Ltd | Data driving type air conditioner controller |
| JPS63220303A (en) * | 1987-03-10 | 1988-09-13 | Matsushita Electric Ind Co Ltd | Data utilizing drive control type air conditioner controller |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53136181A (en) * | 1977-04-30 | 1978-11-28 | Toshiba Corp | Controller |
| JPS53136180A (en) * | 1977-04-30 | 1978-11-28 | Toshiba Corp | Controller |
| JPS55138106A (en) * | 1979-04-16 | 1980-10-28 | Hitachi Ltd | Coefficient setting system |
| JPS55166705A (en) * | 1979-06-12 | 1980-12-26 | Koyo Denshi Kogyo Kk | Sequence controller |
-
1984
- 1984-12-18 JP JP26659184A patent/JPS61143806A/en active Granted
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53136181A (en) * | 1977-04-30 | 1978-11-28 | Toshiba Corp | Controller |
| JPS53136180A (en) * | 1977-04-30 | 1978-11-28 | Toshiba Corp | Controller |
| JPS55138106A (en) * | 1979-04-16 | 1980-10-28 | Hitachi Ltd | Coefficient setting system |
| JPS55166705A (en) * | 1979-06-12 | 1980-12-26 | Koyo Denshi Kogyo Kk | Sequence controller |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61143806A (en) | 1986-07-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |