JPH03207161A - Image processor - Google Patents

Abstract

PURPOSE:To use an image memory efficiently by converting image data which is stored in a table memory according to information on an output position and read out of a storage position to the format of image data to be outputted. CONSTITUTION:A latch circuit 46 latches the image data which is read out of an image memory 14 temporarily when an image is outputted and image data to be written in the image memory 14 temporarily when an image is inputted. A look-up table LUT 48 converts respective image data from a selector 47 into image data in format matching an output device and an LUT 53 converts image data from an input device into image data in storage format corresponding to a preset kind; and a selector and shifter 54 outputs respective image data from the LUT 53 together. Consequently, various image data are stored efficiently on the same memory together without being reduced in information amount, and the storage efficiency is improved greatly.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image processing device, and particularly to an image processing device that processes image data containing a mixture of binary, multivalued, color, and the like.

[Prior Art] FIG. 10 is a block diagram of a conventional image processing device. In the figure, 1 is a CPU that controls the entire device, 2 is a C
A main memory is used to store programs of the PU 1 and is used as a work area by the CPU 1, and a communication interface (communication I/F) 3 is connected to a local area network (LAN) such as Ethernet. 4 is a keyboard for inputting character codes, etc., 5 is a pointing device (PD) for indicating the position on the display screen, 6 is an input device interface (input device I/F) for connecting the keyboard and PD5 to the CPUI, and 7 is a CPUI system bus, 8
is a CRT display device (CR) that displays image data.
T), 9 is a video RAM (VRAM) that stores video data for CRT display, and 10 is a floppy disk drive (FD) that stores user files. 11 is a hard disk drive (HD) that stores system files. 12 is a disk interface (disk I/F) that connects FDIO and HD11 to CPU
20 is an output device such as a printer, 52 is an input device such as a scanner, 19 is an input/output device interface (input/output device I/F) for connecting the input/output devices 52 and 20, and 49 is an image memory for storing image data. , 50 is a memory controller that controls reading and writing of the image memory 49, 51
is the image controller board.

In the above, conventionally, when the printer 20 is, for example, an 8-bit black and white gray printer, bit O is set to 00, even if the image is character pattern data of 1 bit/pixel.
4. Bit 1 was converted into FFH multivalued image data and developed in the image memory 49.

Further, if the scanner 52 is, for example, an 8-bit black and white gray scanner, even if the original image is black and white characters, the multivalued image data 00. -FF. was stored as is in the image memory 49.

In this way, conventionally, once the number of bits per pixel in the system is determined, the pixel data stored in the image memory 49 has the same number of bits regardless of whether it is binary image data, multivalued image data, or color image data. Met. This resulted in wasted image memory and inefficient access.

[Problems to be Solved by the Invention] The present invention eliminates the drawbacks of the prior art described above, and its purpose is to provide an image processing device that uses image memory efficiently.

[Means and operations for solving the problems] In order to achieve the above object, the image processing device of the present invention uses an image processor for storing image data. an output means for outputting image data; a table memory for storing data format information of the image data stored in the image memory in association with information on an output position to the output means; A conversion means is provided for converting image data read from a storage position of the image memory corresponding to the output position information stored in the table memory according to the output position information into an image data format to be output to the output means. The outline is as follows.

As a result, image data of various bits/pixels can be efficiently compacted and stored in the image memory, and high-quality images can be reproduced at high speed when printed or displayed.

Further, in order to achieve the above object, the image processing apparatus of the present invention includes an input means for inputting image data, an output means for outputting the image data, an image memory for storing the image data, and an image processing apparatus for storing the image data in the image memory. a table memory for storing information on a data format of image data to be output in association with information on an output position in the output means; and data for writing image data input from the input means into the image memory according to information in the table memory. The outline thereof is to include a conversion means for converting into.

Thereby, for example, depending on the nature of each image on the original image, the image data is compacted and stored in the image memory without impairing the quality of any image.

[Description of Embodiments] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of an image processing apparatus according to an embodiment. Incidentally, parts equivalent to those in FIG. 10 are given the same numbers and their explanations are omitted. In the figure, 300 is the main memory, which stores programs executed by the CPU, such as the print processing shown in Fig. 7 and the scanner reading processing shown in Fig. 8. l4 is the image memory, which stores bitmap data of 1 bit/pixel. , 4-bit/pixel gray data, 8-bit R, G, and B full-color data, etc., are efficiently and compactly mixed and stored.

The memory capacity of such an image memory 14 can be increased or decreased as necessary. A memory controller 15 controls reading and writing of data to the image memory 14. A type position information register 16 stores information on the type of image data to be stored in each part of the image memory 14 (that is, information corresponding to the number of bits per pixel) on the document or printer of the image data. It is stored in association with information on the starting position and size on the paper or display screen (that is, information on the output pixel position on the recording material or screen). 18 is a data conversion circuit, which converts the image data read from the image memory 14 into information of the type (1 bit/pixel, 4
image data sent from the input device 52 (RGB data of 8 bits/pixel, etc.) in a format compatible with the output device 200 (RGB data of 8 bits/pixel, etc.). etc.) into image data in a memory expansion format according to the type of information (1 bit/pixel, 4 bits/pixel, etc.). 190 is an input/output device interface (input/output device i/f), and input/output devices 52, 200
In addition to exchanging image data in a format suitable for each device, the current document image is received by receiving various operation timing signals (VSYNC signal, HSYNK signal, pixel clock signal, etc.) from the input/output devices 52 and 200. It outputs various synchronization signals for grasping the read pixel position or print pixel position on the paper. Reference numeral 17 denotes an access address control circuit which reads out which type of image data at which address on the image memory 14 according to the various synchronization signals and the contents of the type position information register 16.
Alternatively, it controls which type of image data is written to which address in the image memory 14.

Reference numeral 13 denotes an image interface board on which the above configurations 14 to 18 and 190 are mounted.

Here, the configuration of the full color printer 200 connected to the image processing apparatus of the embodiment will be explained with reference to FIG. In the figure, 701 is a data conversion circuit (DCNV) that converts R, G, and B data from the input/output device i/f 190 into Y, M, C, and Bk analog image signals. 7
A pulse width modulation circuit 78 forms a pulse width modulated (PWM) binary image signal by comparing the analog image signal with a triangular wave signal of a predetermined period. This binary image signal is applied to the subsequent laser output section 71l, and modulates the laser diode on/off to form a gradation image.

711 is a beam scanner, and the 2 from PWM778
Laser output section that converts value image signals into optical signals, polyhedron (
For example, an octahedral polygon mirror 712, the mirror 71
2 at high speed, an f/θ lens (imaging lens) 713, and the like. A reflecting mirror 714 changes the optical path of the laser beam. 715 is a photosensitive drum. As described above, the laser beam emitted from the laser output section is reflected by the polygon mirror 712, passes through the f/θ lens 713 and the mirror 714, and linearly scans (raster scan) the surface of the photosensitive drum 715, converting it into image data. A corresponding latent image is formed. Furthermore, 717 is a primary charger,
Reference numeral 718 is a full-surface exposure lamp, 723 is a cleaner section for collecting residual toner that has not been transferred, and 724 is a pre-transfer charger, and these members are arranged around the photosensitive drum 715. A developing unit 726 develops the electrostatic latent image formed on the surface of the photosensitive drum 715.

731Y, 731M, 731C, and 731Bk are development sleeves that directly perform development in contact with the photosensitive drum 715, respectively;
730Y, 730M, 730C, and 7308k are toner hoppers that hold spare toner of each color, and 732 is a screw that transports the developer of each color, these sleeves 731Y to 7318k, and a toner hopper 730Y.
7308k and the screw 732 constitute a developing unit 726, and these members are arranged around the rotation axis P of the developing unit.

As a result, for example, when forming a yellow toner image, development with yellow toner is performed at the position shown in this figure, and then when forming a magenta toner image, development is performed using the developing device unit 72.
6 is rotated around the axis P in the figure, and the developing sleeve 731M in the magenta developing device is disposed at a position in contact with the photoreceptor 715. The same applies to cyan and black development.

Furthermore, 716 is a transfer drum that transfers the toner image formed on the photosensitive drum 715 onto paper, and 719 is a transfer drum 7.
an actuator plate for detecting the movement position of 16, 7
20 is a position sensor that detects when the transfer drum 716 has moved to the home position by coming close to the actuator plate 719; 725 is a transfer drum cleaner; 727 is a paper press roller; 728 is a static eliminator; and 729 is a transfer unit. It is a charger, and these members 719, 72
0,725,727,729 are arranged around the transfer roller 716.

On the other hand, 735, 736 are paper feed cassettes that store 79 liters of paper (paper sheets), and 737, 738 are cassettes 735, 7
Paper feed rollers that feed paper from 36, 739, 740,
Reference numeral 741 denotes a timing roller that takes the timing of paper feeding and conveyance, and the paper fed and conveyed via these is guided by a paper guide 749 and wound around the transfer drum 716 while the leading edge is carried by a gripper (to be described later), forming an image. Shift to the formation process.

A drum rotation motor 550 rotates the photosensitive drum 715 and the transfer drum 716 synchronously.

750 transfers the paper to the transfer drum 716 after the image forming process is completed.
742 is a conveyor belt that conveys the removed paper, 743 is an image fixing unit that fixes the paper conveyed by the conveyor belt 742, and the image fixing unit 743 is a pair of thermopressure rollers 744. and 745.

FIG. 2 is a block diagram of the data conversion circuit 18 of the embodiment. In the figure, the image memory l4 has 32
Bits of data can be accessed. A latch circuit 46 temporarily latches image data read from the image memory 14 when outputting an image, and temporarily latches image data written to the image memory 14 when inputting an image. 47
is a selector, which sequentially outputs image data of the number of bits according to the type of image data (1 bit/pixel, 4 bits/pixel, etc.) from among the input 32-bit data. 48 is a lookup table (LUT), which stores each image data (1 bit/pixel,
4 bits/pixel, etc.) into image data (RGB image data of 8 bits/pixel each) in a format compatible with the output device 200. In other words, it serves as a color palette.

53 is a look-up table (LUT) that stores image data (8 bits/pixel each) from the input device 52.
B image data) is converted into image data in a storage format (1 bit/pixel, 4 bits/pixel, etc.) according to a preset type.

A selector and shifter 54 outputs the image data from the lookup table 53 in units of 32 bits in total. Reference numeral 55 denotes a control signal generation circuit, which generates various control signals such as data conversion.

FIG. 3(A) is a diagram showing an example of an image to be read or printed. In the figure, 21 is the gray character part, 4 bits/pixel 'gray data (16
can be memorized in terms of gradations). 22 is the black and white text part, 1
Can be stored as bit/pixel dot pattern data. 23 is a full-color photo portion, which can be stored as 24-bit/pixel full-color data. That is, R,G
, B each has 8 bits (256 gradations), and can store up to 16.7 million colors. 24 is a palette color image part, which can store up to 256 colors in an 8-bit/pixel palette format.

FIG. 3(B) is a diagram showing the position and size of each partial image defined for the image of FIG. 3(A). In the figure,
The gray character portion 21 starts at the pixel address (XO, YO) on the display screen (ie, the original to be read or the print paper) and has a size of horizontal WO and vertical HO. remaining part 22
The same applies to 24. In addition, the black and white text part 22
is divided into four rectangular blocks for convenience of processing.

FIG. 4(A) is a diagram showing how the various images shown in FIG. 3(A) are stored in the image memory 14. In the figure,
Area 25 starting at address #aO contains 4 bits/pixel gray image data ■, and area 26 starting at address #bO contains 1 bit/pixel black and white binary image data ■
, area 27 starting at address #cO is 24 bits/
Bixel full color image data ◎, address #dO
Areas 28 starting with 28 store 8-bit/pixel palette color image data O, respectively. Note that the area 29 starting with address #eO is an unused empty area. Furthermore, the area 26 of the black and white binary image data (2) is divided into four areas starting with addresses #bo, #b1, #b2, and #b3, respectively. In this way, the image memory 14 of the embodiment does not store the image data of the margin portion in FIG. 3(A).

FIG. 4(B) is a conceptual diagram showing the storage mode of the type and position information register l6. In the figure, 30 is the type of image data ■, 31 is the input/output pixel position of image data ■, 32 is the type of image data ■, 33 is the input/output pixel position of image data ■, and 34 is the type of image data ◎. , 35 is the input/output pixel position of image data ◎, 36 is the type of image data ■, 3
7 stores information corresponding to the input/output pixel positions of the image data (2).

FIG. 4(C) is a diagram showing specific storage contents of the type position information register 16. In the figure, the type of image data ■ is 2, and the input/output pixel position of the read original or print paper is an area starting from (XO, YO) and having a size (WO, HO). The type of image data ■ is O, and the input/output pixel positions and sizes are (Xi, Yl). (Wl, Hl) area, (X2, Y2), (W2, H2) area, (X3
, Y3), (W3, H3) and (X4, Y4)
, (W4, H4). The same applies to others.

FIG. 5 is a diagram showing a code table of types of image data.

In the figure, type O is 1 bit/vixel, type 2
is 4 bits/vixel, etc. The same applies to others.

FIG. 7 is a flowchart of print processing according to the embodiment. In the figure, in step S1, an operator inputs layout and data on a CRT screen in order to obtain desired print processing for various images. According to the layout, the type of each image data and the output pixel position information are specified and input. As a result, the CPU 1 stores code information on the image memory 14 for character data, etc., and converts image data into formats for each type (1 bit/pixel, 4 bit/pixel, etc.).
The image data is expanded in a pixel-packed format), and information on the type of each expanded image data, output start position to the output device 200, and size is written in the type and position information register l6. In step S2, it is determined whether or not the above settings have been completed, and if the settings have been completed, in step S3 the output device 2
A print command is issued to 0, and the start flag of the access address control circuit 17 is set to start the output operation. In step S4, the access address control circuit 17 refers to the contents of the type position information register 16 and determines the address of the image data to be read from the image memory l4 in relation to the output pixel position in the output device 200. In step S5, image memory 1
4, it is determined whether there is image data to be read.

Here, the relationship between the output pixel position in the access address control circuit 17 and the read address of the image memory 14 will be explained with reference to FIG.

First, the scanning direction of the output device 200 is to main scan from left to right starting from the top left of the screen, and when it reaches the right end, move to the left end of the next line below, and main scan each line from top to bottom. I shall go. Therefore, the first output pixel position in the output device 200 is (0,O). By the way, Figure 3 (A
), the top of the paper, that is, the output pixel position (
The area starting with 0, O) is a blank space.

Looking at this in relation to Figure 6, the output pixel position (0, O)
The area starting with has no read address (-), that is, there is no corresponding information in either the image memory 14 or the type position information register l6, and the type of image data is O (1 bit/vixel). There is. Therefore, the process proceeds to step S8, where the input/output device i/f 1 9
0 that the output data is O (margin). In step S9, the input/output device i/f 190 outputs the output device 2 while monitoring the output pixel position of the image data.
00 and a signal corresponding to the margin (for example, Null
) is output. In step SIO, it is determined whether or not the output of image data for one screen has been completed. If not, the process proceeds to step Sll, and the input/output device i/f 190 outputs the next image data to the access address control circuit 17. request.

In this way, when the output pixel position eventually reaches (XO, YO), the access address control circuit 1
7 refers to the contents of the type position information register 16 to obtain a match in output pixel position information, and further outputs the read address #aO of the image memory 14 from the table shown in FIG.

Also, type 2 of image data is output.

In this way, in the determination in step S5, since there is image data to be printed, the process proceeds to step S6, where the memory controller l5 reads image data from address #aO of the image memory 14 and supplies it to the data conversion circuit 18. In step S7, the data conversion circuit 18 selects type=2 as the type of image data from the access address control circuit 17.
(4 bits/vixel) is notified, and the latch circuit 4
Selector 4 selects the 32 bits of image data latched in 6.
7, the selector 47 sequentially selects (unbacks) 32 bits of image data in 4-bit units and refers to the look-up table 48 in units of 4 bits per pixel clock. 24-bit/pixel RGB image data corresponding to the bits is provided to the input/output device @i/f 190. In step S9, the input/output device i/f 190 outputs the RGB image data from the data conversion circuit 18 in synchronization with the timing signal of the output position 200.

Thereafter, the printing process proceeds in the same manner, and when the output pixel position eventually reaches (XO+WO, YO), the read address disappears from the relationship shown in FIG. 6, and the quib becomes O. Furthermore, when the output pixel position becomes (XO, YO+1), the read address of the image memory 14 becomes #(ao+Wo/
2), and the type is 2. That is, since this part of the image memory l4 has 4 bits/vixel, the read address advances by WO/2 relative to the increase in the output pixel position WO. In this way, the operations of steps S4 to S9 are repeated until one screen is completed.

FIG. 8 is a flowchart of image data input processing. In the figure, in step S21, the operator determines a desired layout from the arrangement of sentences, figures, images, etc. in the read document, and inputs the input pixel position and type of image data in the input device 52 for each image block to the type position information register 16. Set. In step S22, it is determined whether or not the settings have been completed, and if the settings have been completed, the process advances to step S23 to activate the input device 52 and the input/output device i/f190. In step S24, input/output device i/f
1 9 0 is synchronized with the human power device 52 and outputs 24 bits/
Input pixel RGB image data. Step S2
In step 5, the data conversion circuit 18 converts the read image data into image data in a corresponding format (image data in a format backed up to 1 bit/pixel, 4 bits/pixel, etc.) according to information on the type of image data. At step 826, the access address control circuit 17 refers to the contents of the type and position information register 16 and determines the write address to the image memory 14 from the relationship shown in FIG. Step S2
7, the memory controller 15 connects the image memory 14
The converted image data is written to the determined address. In step S28, it is determined whether one image has been completed, and if not, the process advances to step S29, where the input/output device i/f 190 is connected to the access address control circuit 1.
7 to write the next image data. In this way, from step S24 to step S until the end of one image.
Repeat the process up to 27.

Note that the various bits/vixels in the above-described embodiments are merely examples, and are not limited thereto.

Also, the image data was described as R, G, B, but Y, M, C, B
k may be used, or halftones may be handled using black and white multi-values.

[Effects of the Invention] As described above, according to the present invention, various types of image data are efficiently mixed in the same memory without losing their respective information amounts, and storage efficiency is significantly improved. Furthermore, it is not necessary to reserve one fraction of the memory capacity for data with the largest amount of information, and memory can be saved by changing the type of data used depending on the total memory capacity. Moreover, it is not limited by the data format of the input/output device.

[Brief explanation of drawings]

FIG. 1 is a block configuration diagram of an image processing apparatus according to an embodiment. FIG. 2 is a block diagram of a data conversion circuit 18 according to an embodiment. FIG. 3 (A) is a diagram showing an example of an image to be read or printed. , FIG. 3(B) is a diagram showing the position and size of each partial image defined for the image in FIG. 3(A), and FIG. 4(A) is a diagram showing the position and size of each partial image defined for the image in FIG.
FIG. 4(A) is a diagram showing the storage mode of various images in the image memory 14, FIG. 4(B) is a conceptual diagram showing the storage mode of the type position information register 16, and FIG. 5 is a diagram showing a code table of types of image data. FIG. 6 is a diagram showing the relationship between the output position of the output device 200 and the read address of the image memory 14. FIG. 7 is a flowchart of print processing in the embodiment, FIG. 8 is a flowchart of image data input processing, FIG. 9 is a configuration diagram of a full-color printer 200 connected to the image processing device of the embodiment, and FIG. 10 is a conventional image FIG. 2 is a block configuration diagram of a processing device. In the figure, 1... CPU, 300... Main memory, 3
...Communication interface, 4...Keyboard, 5.
...Bointing device (PD), 6...Input device interface, 7...System bus, 8...C
RT, 9...VRAM% 10...Floppy disk drive, 11...Hard disk drive, 1
2... Disk interface, 13... Image interface port, 14... Image memory, 1
5... Memory controller, 16... Type position information register, 17... Access address control circuit, 18
... data conversion circuit, 19 ... input/output device interface, 52 ... one-person device, 200 ... output device,
46...Latch circuit, 47...Selector, 48.5
3... Lookup table (LUT), 54...
-Selector & shifter, 55... Control signal generation circuit. Figure 3 (A) Figure 3 (B) (A) Figure 4 Figure 6

Claims (2)

[Claims] (1) An image memory for storing image data, an output means for outputting the image data, and storing information on the data format of the image data stored in the image memory in association with information on an output position to the output means. A table memory, and an image that outputs to the output means image data read from a storage position of the image memory corresponding to the information of the output position stored in the table memory according to the information of the output position to the output means. An image processing device characterized by comprising a conversion means for converting into a data format. (2) an input means for inputting image data; an output means for outputting the image data; an image memory for storing the image data; and an output means for outputting data format information of the image data to be stored in the image memory. The image forming apparatus is characterized by comprising: a table memory that stores information in association with position information; and a conversion means that converts image data input from the input means into data to be written to the image memory according to information in the table memory. Image processing device.