JPH03201706A - Voltage controlled oscillator - Google Patents
Voltage controlled oscillatorInfo
- Publication number
- JPH03201706A JPH03201706A JP34080589A JP34080589A JPH03201706A JP H03201706 A JPH03201706 A JP H03201706A JP 34080589 A JP34080589 A JP 34080589A JP 34080589 A JP34080589 A JP 34080589A JP H03201706 A JPH03201706 A JP H03201706A
- Authority
- JP
- Japan
- Prior art keywords
- differential amplifier
- output signal
- circuit
- phase shift
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010363 phase shift Effects 0.000 claims abstract description 33
- 230000010355 oscillation Effects 0.000 abstract description 30
- 238000010586 diagram Methods 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
Landscapes
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Abstract
Description
【発明の詳細な説明】
（イ）産業上の利用分野
本発明は、ＴＶ受像機の検波回路などに用いられるＶ
ＣＯ（を圧制御型発振ｒｊ？）の改良に関するもので、
特に周波数の変化幅が広いとともに発振周波数を変化さ
せても安定に発振が継続できる電圧制御型発振器に関す
る。DETAILED DESCRIPTION OF THE INVENTION (a) Industrial application field The present invention is directed to a V
This is related to the improvement of CO (pressure controlled oscillation rj?).
In particular, the present invention relates to a voltage-controlled oscillator that has a wide frequency change range and can continue to oscillate stably even when the oscillation frequency is changed.
（ロ）従来の技術
ＴＶ受像機の映像検波器としてＰＬＬ回路を利用したも
のが知られている。該ＰＬＬ回路は、ＶＣＯを内蔵して
いるが、該ＶＣＯの周波数変化幅としては広いものが望
まれている。第２図は、その様なりＣＯを示すもので、
第１及び第２トランジスタ（１）及び（２）と、該第１
及び第２トランジスタ（１）及び（２）の共通エミッタ
に接続された可変電流源（３）と、前記第１及び第２ト
ランジスタ（１）及び（２）のコレクタに接続された抵
抗（４）及び（５）と、前記第１及び第２トランジスタ
（１）及び（２）のコレクタ間にｔ＆続されたＬ及びＣ
からなる共振回路（立）とから槽底されており、第１出
力端子（７）の出力信号が第２トランジスタ（２）のベ
ースに、第２出力端子（８）の出力信号が第１トランジ
スタ（１）のベースに帰還されるようになっている。第
２図において、可変電流源（３）の電流値を変化させる
と、第１及び第２トランジスタ（１）及び（２）のベー
ス・エミッタ間の寄生容量が変化し、発振ループ内の位
相が変化する。(b) Prior Art A PLL circuit is known as a video detector for a TV receiver. The PLL circuit has a built-in VCO, but it is desired that the VCO has a wide frequency variation range. Figure 2 shows CO like this,
first and second transistors (1) and (2);
and a variable current source (3) connected to the common emitters of the second transistors (1) and (2), and a resistor (4) connected to the collectors of the first and second transistors (1) and (2). and (5), and L and C connected by T& between the collectors of the first and second transistors (1) and (2).
The output signal of the first output terminal (7) is connected to the base of the second transistor (2), and the output signal of the second output terminal (8) is connected to the base of the first transistor (2). It is designed to be returned to the base of (1). In Figure 2, when the current value of the variable current source (3) is changed, the parasitic capacitance between the base and emitter of the first and second transistors (1) and (2) changes, and the phase in the oscillation loop changes. Change.
従って、第１・図の回路によれば、可変電流源（３ンの
電流値を変化させることにより、ＶＣＯの発振周波数を
変化させることができる。Therefore, according to the circuit shown in FIG. 1, the oscillation frequency of the VCO can be changed by changing the current value of the variable current source (3).
（ハ）発明が解決しようとする問題点
しかしながら、第２図の回路において、発振周波数を変
化させるために可変電流源（３）の電流値を著しく低下
させると、第１及び第２トランジスタ（１）及び（２）
からなる差動増幅器の利得が低下し、発振が停止する恐
れがあった。(c) Problems to be Solved by the Invention However, in the circuit shown in FIG. 2, if the current value of the variable current source (3) is significantly reduced in order to change the oscillation frequency, ) and (2)
There was a risk that the gain of the differential amplifier consisting of the above would decrease and oscillation would stop.
（ニ）問題点を解決するための手段
本発明は、上述の点に鑑み處されたもので、共振回路が
接続された差動増幅器と、該差動増幅器の出力信号を移
相する移相回路と、前記差動増幅器の出力信号と前記移
相回路の出力信号とを加算する加算回路とを備え、前記
加算回路の出力信号を前記差動増幅器の入力端子に正帰
還させることを特徴とする。(d) Means for solving the problems The present invention has been made in view of the above points, and includes a differential amplifier connected to a resonant circuit, and a phase shifter for shifting the output signal of the differential amplifier. and an adder circuit that adds the output signal of the differential amplifier and the output signal of the phase shift circuit, and provides positive feedback of the output signal of the adder circuit to the input terminal of the differential amplifier. do.
（ホ）作用
本発明によれば、共振回路、差動増幅器及び加算回路で
発振ループを形成し、前記差動増幅器の出力信号を移相
回路で移相した後、加算回路で前記発振ループに加えて
いる。前記差動増幅器の利得は十分に高い値に設定され
ており、発振ループのみであると共振回路の中心周波数
で安定に発振する。この際は、移相回路の出力信号が零
である。この状態から移相回路の出力信号を発生させる
と、ｔＪｕ算回路の出力信号の位相が変化し、発振周波
数が変化する。(E) Effect According to the present invention, an oscillation loop is formed by a resonant circuit, a differential amplifier, and an adder circuit, and after the output signal of the differential amplifier is phase-shifted by a phase shift circuit, the adder circuit connects the output signal to the oscillation loop. Adding. The gain of the differential amplifier is set to a sufficiently high value, and if there is only an oscillation loop, it oscillates stably at the center frequency of the resonant circuit. At this time, the output signal of the phase shift circuit is zero. When the output signal of the phase shift circuit is generated from this state, the phase of the output signal of the tJu calculation circuit changes, and the oscillation frequency changes.
（へ）実施例
第１図は１本発明の一実施例を示す回路図で、（９）は
動作電流源（１０）を備える差動増幅器、（１１）は差
動増幅器（９）の出力信号を＋９０度移相した信号と一
９０度移相した信号とを作成し、両信号を所望の比で加
算した信号を発生する移相回路、（１２）は前記差動増
幅！（９）の出力信号と前記移相回路（１１）の出力信
号とをベクトル的に加算し前記差動増幅器（９）の入力
端に印加する加算回路、及び（１３）は共振回路である
。(F) Embodiment Figure 1 is a circuit diagram showing an embodiment of the present invention, in which (9) is a differential amplifier equipped with an operating current source (10), and (11) is the output of the differential amplifier (9). (12) is the differential amplification circuit that generates a signal that is phase-shifted by +90 degrees and a signal that is phase-shifted by 190 degrees, and generates a signal that is the sum of both signals at a desired ratio. (9) is an adder circuit that vectorially adds the output signal of the output signal and the output signal of the phase shift circuit (11) and applies the result to the input terminal of the differential amplifier (9), and (13) is a resonant circuit.
第１図において、共振回路（１３）、差動増幅器（９）
及び加算回路（１２）は、発振ループを形成しており、
動作電流源（１０）の電流値を十分大きい値で固定とす
る。そして、移相回路（１１）の出力信号を制御電圧源
（１４）からの制御電圧に応じて零にする。すると、前
記発振ループのみで発振がおこなわれ、共振回路（１３
〉の中心周波数の出力信号が出力端子（１５）に得られ
る。この際、差動増幅器（９）の利得は十分高く、尚且
つその値が変化しないので、発振ループは安定に発振を
継続することができる。In Figure 1, a resonant circuit (13), a differential amplifier (9)
and the addition circuit (12) form an oscillation loop,
The current value of the operating current source (10) is fixed at a sufficiently large value. Then, the output signal of the phase shift circuit (11) is made zero according to the control voltage from the control voltage source (14). Then, oscillation occurs only in the oscillation loop, and the resonant circuit (13
An output signal having a center frequency of > is obtained at the output terminal (15). At this time, since the gain of the differential amplifier (9) is sufficiently high and its value does not change, the oscillation loop can continue to oscillate stably.
次に、移相回路（１１）及び加算回路（１２）の動作に
ついて説明する。制御電圧源（１４）がらの制御電圧に
応じて移相回路（１１）は、入力信号の移相を行う。該
移相回路（１１）の動作を第３図の具体例を用いて説明
する。第３図において、（１６）は第１及び第２トラン
ジスタ（１７）及び（１８）からなる第１差動増幅器、
（１９）は第３及び第４トランジスタ（２０）及び（２
１）からなる第２差動増幅器、（２２）及び（２３）は
差動的に制御される可変を流源、及び（２４）は９０度
移相回路である。信号源（２５）からの入力信号■１に
応じた第１及び第３トランジスタ（１７）及び（２０）
のコレクタ電流の変化は互いに逆相であり、又可変電流
源（２２）及び（２３）の電流値の比に応じて加算され
る。その為、可変電流源（２２）及び（２３）の電流値
を等しくすると、第１出力端子（２６）に出力信号は発
生しない。又、その状態から可変電流源（２２）及び（
２３）の電流比を変化させれば、その比に応じて第１出
力端子（２６）の出力信号は正負に変化する。第１出力
端子（２６）に接続された９Ｏ度移相回路（２４）は、
第１出力端子（２６）に流れる電流を９０度移相する。Next, the operations of the phase shift circuit (11) and the adder circuit (12) will be explained. The phase shift circuit (11) shifts the phase of the input signal according to the control voltage from the control voltage source (14). The operation of the phase shift circuit (11) will be explained using the specific example shown in FIG. In FIG. 3, (16) is a first differential amplifier consisting of first and second transistors (17) and (18);
(19) is the third and fourth transistor (20) and (2
1), (22) and (23) are differentially controlled variable sources, and (24) is a 90 degree phase shift circuit. The first and third transistors (17) and (20) according to the input signal ■1 from the signal source (25)
The changes in the collector currents are in opposite phases to each other, and are added according to the ratio of the current values of the variable current sources (22) and (23). Therefore, if the current values of the variable current sources (22) and (23) are made equal, no output signal is generated at the first output terminal (26). Also, from that state, the variable current source (22) and (
23), the output signal of the first output terminal (26) changes between positive and negative depending on the ratio. The 90 degree phase shift circuit (24) connected to the first output terminal (26) is
The phase of the current flowing to the first output terminal (26) is shifted by 90 degrees.
従って、第１出力端子（２６）に得られる出力信号をベ
クトルで示すと第４図のｖ２軸上の任意の点を取り得る
。尚、第２出力端子（２７）に得られる出力信号は、第
１出力端子（２６）に得られる出力信号の逆相となる。Therefore, if the output signal obtained at the first output terminal (26) is expressed as a vector, it can take any point on the v2 axis in FIG. Note that the output signal obtained at the second output terminal (27) has the opposite phase of the output signal obtained at the first output terminal (26).
従って、第３図の回路によれば入力信号を±９０度移相
すると共にレベルを変化することができる。Therefore, according to the circuit shown in FIG. 3, it is possible to phase-shift the input signal by ±90 degrees and change the level.
そこで、差動増幅器（９）、移相回路（１１）及び加算
回路（１２）の出力信号を各々ベクトルＶｌ。Therefore, the output signals of the differential amplifier (9), the phase shift circuit (11), and the adder circuit (12) are each converted into a vector Vl.
ｖ２、及びｖ３とし、その関係をベクトル表示すると第
５図の如くなる。第５図において、ベクトルＶ２は、ｖ
２軸上のベクトルＶ２０からベクトルＶ２］の間の任意
の点を取り得る。その為、前記ベクトル■２と前記ベク
トルＶ１とをベクトル加算した出力ベクトルｖＯは、ベ
クトルＶ１を対称にしてベクトルＶ３０からベクトルＶ
３１の間の位相の任意の点を取り得る。When v2 and v3 are represented and their relationship is expressed as a vector, it becomes as shown in FIG. In FIG. 5, vector V2 is v
Any point between vector V20 and vector V2 on the two axes can be taken. Therefore, the output vector vO obtained by vector addition of the vector 2 and the vector V1 is obtained from the vector V30 with the vector V1 symmetrical.
It can take any point of phase between 31 and 31.
その結果、加算回路（１２）の出力信号の位相（ベクト
ルＶＯ）は、第２の発振ループの移相回路（］１）の移
相量に応じて変化することになり、前記出力信号の位相
変化に基すいて出力端子（１５）に発生する発振出力信
号の周波数が変化する。As a result, the phase of the output signal (vector VO) of the adder circuit (12) changes according to the amount of phase shift of the phase shift circuit (]1) of the second oscillation loop, and the phase of the output signal Based on the change, the frequency of the oscillation output signal generated at the output terminal (15) changes.
尚、第１図の実施例では、移相回路（１１）内の移相前
の信号と移相後の信号とのレベル比を１としたので、前
記ベクトルＶ３０の最大変化幅が９０度となったが、前
記レベル比を１以上とすれば、最大１８０度近くまで変
化させることができ、発振周波数の変化幅を広くするこ
とができる。In the embodiment shown in FIG. 1, since the level ratio between the signal before phase shift and the signal after phase shift in the phase shift circuit (11) is set to 1, the maximum variation width of the vector V30 is 90 degrees. However, if the level ratio is set to 1 or more, it is possible to change the oscillation frequency by up to nearly 180 degrees, and the range of change in the oscillation frequency can be widened.
従って、第１図の回路によれば、発振周波数を変化させ
るのに発振ループ内のコンデンサの容量を変化させる必
要がなく、制御電圧に対する発振周波数の変化をリニア
なものにすることができる。又、発振ループの利得は差
動増幅器ループのゲインを高くすることで十分に確保す
ることが出来、安定な発振を継続させることができる。Therefore, according to the circuit shown in FIG. 1, it is not necessary to change the capacitance of the capacitor in the oscillation loop to change the oscillation frequency, and the change in the oscillation frequency with respect to the control voltage can be made linear. Further, the gain of the oscillation loop can be sufficiently ensured by increasing the gain of the differential amplifier loop, and stable oscillation can be continued.
第６図は、第１図の具体回路例を示すものであり、その
動作について簡単に説明する。第６図の差動増幅器（９
）は、エミッタが共通接続されたトランジスタ（２８）
及び（２９）のベースがバッファトランジスタ（３０）
及び（３１）を介して共振回路（１，３）に接続されて
おり、動作電流源（１０）には十分大なる電流を流す。FIG. 6 shows a specific example of the circuit shown in FIG. 1, and its operation will be briefly explained. Differential amplifier (9) in Figure 6
) is a transistor (28) whose emitters are commonly connected.
The base of (29) is a buffer transistor (30)
and (31) to the resonant circuit (1, 3), and a sufficiently large current flows through the operating current source (10).
前記差動増幅器（９）の出力信号は、バッファトランジ
スタ（３０〉及び（３１〉のエミッタに互いに逆相で得
られ、移相回路（１１）に印加される。移相回路（１１
）の動作は第３図の回路と同じであり、制御電圧源（１
４）からの制御電圧と電圧源〈３２）の電圧とが等しけ
れば移相動作を行わず、等しくなくなると移相動作を行
う。移相回路（１１）からの逆相の２つの信号は、バッ
ファ回路（３３）を介して加算回路（１２）のトランジ
スタ〈３４）及び（３５）のベースに印加される。該ト
ランジスタ（３４）及び（３５）のコレクタは、前記差
動増幅器（９）の入力端となるバッファトランジスタ（
３０）及び（３１）のベースに接続されているので、両
信号の加算が行われる。The output signals of the differential amplifier (9) are obtained in opposite phases to the emitters of the buffer transistors (30> and (31)) and are applied to the phase shift circuit (11).
) is the same as the circuit shown in Figure 3, and the control voltage source (1
If the control voltage from 4) and the voltage of the voltage source <32) are equal, no phase shifting operation is performed, and when they are not equal, a phase shifting operation is performed. Two signals of opposite phases from the phase shift circuit (11) are applied to the bases of transistors (34) and (35) of the adder circuit (12) via a buffer circuit (33). The collectors of the transistors (34) and (35) are connected to a buffer transistor (
Since it is connected to the bases of 30) and 31, both signals are added.
従って、発振ループが形成されることになり、移相回路
（１１）の移相量に応じて発振周波数を変化させること
ができる。尚、第６図の移相回路（１１）及び加算回路
（１２）に含まれる直列接続されたダイオードは、両回
路の入力端のダイナミックレンジの拡大の目的で配置さ
れている。Therefore, an oscillation loop is formed, and the oscillation frequency can be changed according to the amount of phase shift of the phase shift circuit (11). The series-connected diodes included in the phase shift circuit (11) and adder circuit (12) in FIG. 6 are arranged for the purpose of expanding the dynamic range of the input ends of both circuits.
（ト）発明の効果
以−ヒ述べた如く本発明によれば、発振周波数の変化幅
が広い電圧制御型発振器を提供することが出来る。又、
本発明によれば、発振周波数を変化させるのに発振ルー
プ内のコンデンサの容量を変化させる必要がなく、制御
電圧に対する発振周波数の変化をリニアなものにするこ
とができる。(G) Effects of the Invention As described above, according to the present invention, it is possible to provide a voltage controlled oscillator with a wide variation range of oscillation frequency. or,
According to the present invention, it is not necessary to change the capacitance of the capacitor in the oscillation loop to change the oscillation frequency, and the change in the oscillation frequency with respect to the control voltage can be made linear.
第１図は、本発明の一実施例を示す回路図、第２図は従
来の電圧制御型発振器を示す回路図、第３図は第１図の
移相回路（１１〉の具体例を示す回路図、第４図は第３
図の説明に供する為のベクトル図、第５図は第１図の説
明に供する為のベクトル図、及び１６図は第１図の具体
例を示す回路図である。
（９）・・・差動増幅器、（１１）・・・移相回路、（
１２）・・・加算回路 （１３）・・共振回路。
第
１
図
第２図
Ｖ＋ｉｄｌFIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional voltage controlled oscillator, and FIG. 3 is a specific example of the phase shift circuit (11) shown in FIG. Circuit diagram, Figure 4 is the 3rd
FIG. 5 is a vector diagram for explaining FIG. 1, and FIG. 16 is a circuit diagram showing a specific example of FIG. 1. (9)...Differential amplifier, (11)...Phase shift circuit, (
12)...Addition circuit (13)...Resonance circuit. Figure 1 Figure 2 V+idl
Claims (3)
器の出力信号を移相する移相回路と、 前記差動増幅器の出力信号と前記移相回路の出力信号と
を加算する加算回路と、 を備え前記加算回路の出力信号を前記差動増幅器の入力
端子に正帰還させることを特徴とする電圧制御型発振器
。(1) A differential amplifier to which a resonant circuit is connected, a phase shift circuit that shifts the phase of the output signal of the differential amplifier, and an addition that adds the output signal of the differential amplifier and the output signal of the phase shift circuit. A voltage controlled oscillator comprising: a circuit for positively feeding back an output signal of the adding circuit to an input terminal of the differential amplifier.
び第２差動増幅器からなる二重平衡型差動増幅器と、 前記第１及び第２差動増幅器の動作電流源を差動的に制
御する差動増幅器と、 前記二重平衡型差動増幅器の負荷として接続された移相
手段と、 から構成されることを特徴とする請求項第１項記載の電
圧制御型発振器。(2) The phase shift circuit includes a double-balanced differential amplifier consisting of a first and a second differential amplifier to which the output signal of the differential amplifier is applied to the base; 2. The amplifier according to claim 1, comprising: a differential amplifier that differentially controls an operating current source; and phase shifting means connected as a load of the double-balanced differential amplifier. Voltage controlled oscillator.
求項第１項記載の電圧制御型発振器。(3) The voltage controlled oscillator according to claim 1, wherein the phase shift amount α is 90.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1340805A JP2573074B2 (en) | 1989-12-28 | 1989-12-28 | Voltage controlled oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1340805A JP2573074B2 (en) | 1989-12-28 | 1989-12-28 | Voltage controlled oscillator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03201706A true JPH03201706A (en) | 1991-09-03 |
| JP2573074B2 JP2573074B2 (en) | 1997-01-16 |
Family
ID=18340455
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1340805A Expired - Fee Related JP2573074B2 (en) | 1989-12-28 | 1989-12-28 | Voltage controlled oscillator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2573074B2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5182554A (en) * | 1975-01-16 | 1976-07-20 | Sony Corp | KAHENSHUHASUHATSUSHINKAIRO |
| JPS5544425U (en) * | 1978-09-11 | 1980-03-22 |
-
1989
- 1989-12-28 JP JP1340805A patent/JP2573074B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5182554A (en) * | 1975-01-16 | 1976-07-20 | Sony Corp | KAHENSHUHASUHATSUSHINKAIRO |
| JPS5544425U (en) * | 1978-09-11 | 1980-03-22 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2573074B2 (en) | 1997-01-16 |
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