JPH0320090A - Manufacture of compound semiconductor element - Google Patents

Manufacture of compound semiconductor element

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Publication number
JPH0320090A
JPH0320090A JP1155326A JP15532689A JPH0320090A JP H0320090 A JPH0320090 A JP H0320090A JP 1155326 A JP1155326 A JP 1155326A JP 15532689 A JP15532689 A JP 15532689A JP H0320090 A JPH0320090 A JP H0320090A
Authority
JP
Japan
Prior art keywords
electrode
silicon
protective film
compound semiconductor
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1155326A
Other languages
Japanese (ja)
Other versions
JP2543190B2 (en
Inventor
Nagataka Ishiguro
永孝 石黒
Toshio Matsuda
俊夫 松田
Susumu Furuike
進 古池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP15532689A priority Critical patent/JP2543190B2/en
Publication of JPH0320090A publication Critical patent/JPH0320090A/en
Application granted granted Critical
Publication of JP2543190B2 publication Critical patent/JP2543190B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Semiconductor Lasers (AREA)
  • Light Receiving Elements (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Led Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To form a highly reliable protective film by realizing low resistivity by alloying silicon with electrode metal in an electrode section. CONSTITUTION:After gold germanium (Au/Ge) alloy 2 is deposited on an Si doped N-type GaAs substrate 1, a silicon thin film 3 is formed through a plasma CVD method. In an electrode formation section, an allow section 4 of Au/Ge electrode and silicon is formed for resistivity just as a thin film 3 is formed. Therefore, after a protective film of high resistance silicon is formed, shaping of an aperture for electrode formation becomes unnecessary, thereby eliminating troubles caused by etching of a protective film. Since silicon has a thermal expansion coefficient and a lattice constant which are comparatively in the neighborhood of those of a compound semiconductor such as GaAs or InP, and has a good thermal conductivity, stresses due to heat distortion, etc., can be reduced. A protective film having good reliability can be formed in this way.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は電極を形成した化合物半導体素子の保護膜形成
を極めて容易に行うための化合物半導体素子の製造方法
に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a compound semiconductor device for extremely easily forming a protective film on a compound semiconductor device on which electrodes are formed.

従来の技術 GaAs,GaAIAs,InPあるいはInGaAs
Pなどの化合物半導体は、電子移動度が高く、また、直
接遷移材料が得られることから超高速トランジスタや発
光ダイオードなどの光半導体素子など、通常のStを材
料とした半導体素子にない機能を実現でき、極めて有用
な半導体材料である。
Conventional technology GaAs, GaAIAs, InP or InGaAs
Compound semiconductors such as P have high electron mobility and can be used as direct transition materials, allowing them to realize functions that cannot be found in semiconductor devices made from ordinary St, such as optical semiconductor devices such as ultra-high-speed transistors and light-emitting diodes. It is an extremely useful semiconductor material.

一般に半導体素子では、空気中の水分や酸素から素子表
面の変質を防ぐため、あるいは、部分的な電極形成など
を行うのに、保薄膜を用いねばならない。従来、上記の
目的のための保薄膜としては、Si02もしくはSiN
などの絶録膜が用いられてきた。従来技術における保薄
膜形成について説明する。
Generally, in semiconductor devices, a thin film must be used to prevent deterioration of the device surface from moisture and oxygen in the air, or to form partial electrodes. Conventionally, Si02 or SiN has been used as a thin film for the above purpose.
Such recording films have been used. The formation of a thin film in the prior art will be explained.

第4図は、I n P / I n G a A s 
Pを材料とした発光ダイオード(LED)の一部分のみ
に電極を形成し電流狭窄を行う場合を列とした説明図で
ある。N型InP11、P型1nGaAsP活性層12
、P型! nP13およびP型InGaAsP14の4
層よりなる発光ダイオード用のエビタキシャル基板を液
相エピタキシャル成長により作製した後、電極部以外を
絶縁するために表面全面にわたってSi02膜61をシ
ランと酸素をガス原料とした化学的気相堆積(CVD)
法により形戊する。その後、光りソグラフィおよび化学
エッチング法により電極形成部のSi02膜を除去し、
その位置に合わせて電極21を部分形成する。さらに、
ボンディングを容易にするための金属5、および、電極
21の位置に合わせて光を取り出すための穴部を設けた
裏面電極71を形成して素子作製が完了する。この発光
ダイオードでは、絶縁物であるSi02膜61のために
活性層12の電極下部の領域に電流が集中して流れ、こ
れに対応して、発光も電極下部領域に制限され、極めて
狭小な発光領域が形成できる。これにより、コア径の小
さな光ファイバとの結合効率を高めることができ、光フ
ァイバ伝送用光源としての応用価値を高められる。
Figure 4 shows I n P / I n Ga As
FIG. 2 is an explanatory diagram showing a case in which current confinement is performed by forming electrodes only on a portion of a light emitting diode (LED) made of P as a column. N-type InP 11, P-type 1nGaAsP active layer 12
, P type! 4 of nP13 and P-type InGaAsP14
After an epitaxial substrate for a light emitting diode consisting of layers is fabricated by liquid phase epitaxial growth, a Si02 film 61 is deposited over the entire surface to insulate areas other than the electrodes by chemical vapor deposition (CVD) using silane and oxygen as gas sources.
Shaped by law. After that, the Si02 film in the electrode forming part was removed by photolithography and chemical etching,
The electrode 21 is partially formed in accordance with that position. moreover,
The element fabrication is completed by forming the metal 5 for facilitating bonding and the back electrode 71 having a hole for extracting light in accordance with the position of the electrode 21. In this light emitting diode, current flows in a concentrated manner in the region below the electrode of the active layer 12 due to the Si02 film 61, which is an insulator, and correspondingly, light emission is also limited to the region below the electrode, resulting in extremely narrow light emission. A region can be formed. Thereby, the coupling efficiency with an optical fiber having a small core diameter can be increased, and the application value as a light source for optical fiber transmission can be increased.

第5図はGaAIAsを材料とした発光ダイオードに表
面保護膜を形成する場合を例とした別の従来技術の説明
図である。P型のCaAs基板15上にP型GaAIA
s (混晶比X=0.7)16、P型GaArAs活性
層(X=0.35)17、及び、N型CaAIAs (
X=0.7)18の3層を液相エビタキシャル法により
戊長し、メサエッチングにより素子分離した後、表面に
SiN膜62をプラズマCVD法により形成する。
FIG. 5 is an explanatory diagram of another conventional technique in which a surface protective film is formed on a light emitting diode made of GaAIAs as an example. P-type GaAIA on P-type CaAs substrate 15
s (mixed crystal ratio X=0.7) 16, P-type GaArAs active layer (X=0.35) 17, and N-type CaAIAs (
After elongating the three layers 18 (X=0.7) by a liquid phase epitaxial method and separating the elements by mesa etching, a SiN film 62 is formed on the surface by a plasma CVD method.

その後、光リングラフィ技術、及び、SF6ガスによる
ドライエッチングを用いてSiN膜の一部を除去して電
極22を形成し、さらに、裏面電極72を形威して素子
作製を完了する。GaAIAs混晶は混晶比が高くなる
と、空気中の酸素や水分により容易に酸化して光吸収性
の酸化物を形成し、発光ダイオードの発光効率を低下さ
せるため、これを防ぐためにはSiN膜62を用いるも
のである。
Thereafter, a portion of the SiN film is removed using photophosphorography technology and dry etching using SF6 gas to form the electrode 22, and the back electrode 72 is further formed to complete the device fabrication. When the GaAIAs mixed crystal ratio becomes high, it is easily oxidized by oxygen and moisture in the air to form light-absorbing oxides, reducing the light-emitting efficiency of the light-emitting diode. To prevent this, SiN film 62 is used.

発明が解決しようとする課題 保護膜形成における上記の従来技術では、Si02やS
iNなどの絶縁物を用いるために、保護膜形成の後、エ
ッチングなどの技術を用いて電極形威のための窓あけを
必要とし製造工程を複雑化する要因となっていた。
Problems to be Solved by the Invention In the above-mentioned conventional techniques for forming a protective film, SiO2 and S
Since an insulator such as iN is used, after the protective film is formed, it is necessary to use techniques such as etching to open a window for the electrode shape, which complicates the manufacturing process.

また、第4図に示す例では、S i O z膜と化合物
半導体との熱膨脹係数が異なるために内部にストレスが
生じ、高電流の通電とともに発光効率が低下する素子劣
化が生じて信頼性を低下させる原因となっていた。さら
に、第5図の例では、メサエツジでレジストが破れるた
め、電極を形成するためのエッチングと同時にメサ部の
SiN膜も除去される場合が生じる。この場合にも、高
温高温度下の通電時には前述の酸化が発生し、信頼性を
損なう。以上の課題は、電極形戊の後に保護膜を形成し
ても、何等改善されることはない。
Furthermore, in the example shown in Fig. 4, stress is generated internally due to the difference in thermal expansion coefficient between the S i O z film and the compound semiconductor, and with the passage of high current, element deterioration occurs in which the luminous efficiency decreases and reliability is reduced. This was the cause of the decline. Furthermore, in the example shown in FIG. 5, the resist is broken at the mesa edge, so the SiN film at the mesa portion may be removed at the same time as the etching for forming the electrode. In this case as well, the aforementioned oxidation occurs during energization at high temperatures, impairing reliability. The above problems cannot be improved in any way even if a protective film is formed after forming the electrode.

本発明は上記従来技術に伴う問題点を排除し、簡単で、
かつ、信頼性の高い保護膜を形成するための製造方法を
提供することを目的とする。
The present invention eliminates the problems associated with the above-mentioned prior art, is simple,
Another object of the present invention is to provide a manufacturing method for forming a highly reliable protective film.

課題を解決するための手段 本発明は上記の課題を解決するために、金属電極を部分
的に形威してなる化合物半導体素子の表面より、抵抗率
の大なるシリコンを薄膜形成し、電極部においては、電
極金属とシリコンとを合金化させて低抵抗化をなし、か
つ、電極部以外の素子表面では前記の高抵抗シリコンを
表面保護膜とする構成を用いてその手段とした。
Means for Solving the Problems In order to solve the above-mentioned problems, the present invention forms a thin film of silicon with high resistivity on the surface of a compound semiconductor element partially formed with metal electrodes, and As a means for achieving this goal, the electrode metal and silicon are alloyed to reduce the resistance, and the high-resistance silicon is used as a surface protection film on the surface of the element other than the electrode portion.

作用 高抵抗シリコンは金やアルミニウムを主材とする金属と
容易に合金化して低抵抗となり、高抵抗シリコン保護膜
形成の後電極形成のための窓あけが不要となり、保護膜
のエッチングに附属する不都合を排除できる。また、シ
リコンは、熱膨脹係数や格子定数がGaAsやInPな
どの化合物半導体と比較的に近く、かつ、熱伝導度も良
いことから、熱歪などによるストレスを少なくでき、信
頼性に優れる保護膜を形成できるわけである。
Function: High-resistance silicon is easily alloyed with metals, mainly gold and aluminum, resulting in low resistance. After forming a high-resistance silicon protective film, there is no need to open a window for electrode formation, and this process is attached to the etching of the protective film. You can eliminate inconvenience. In addition, silicon has a thermal expansion coefficient and lattice constant that are relatively similar to those of compound semiconductors such as GaAs and InP, and also has good thermal conductivity, so silicon can reduce stress caused by thermal distortion and other factors, making it a highly reliable protective film. It can be formed.

実施例 以上説明してきた本発明を、実施例を用いてさらに詳し
く説明する。
EXAMPLES The present invention, which has been explained above, will be explained in more detail using examples.

第1図は化合物半導体として、N型のCaAsを用いて
本発明の作用を確認した例である。SiドープのN型C
aAs基板1上に、金ゲルマニウム( A u / G
 e )合金2を200nmの厚さに蒸着した後、シラ
ン(SiH4)ガスを用いたプラズマCVD法により、
厚さ約50nmになるようシリコン薄膜3を形成した。
FIG. 1 is an example in which the effect of the present invention was confirmed using N-type CaAs as a compound semiconductor. Si-doped N-type C
Gold germanium (A u / G
e) After depositing Alloy 2 to a thickness of 200 nm, by plasma CVD method using silane (SiH4) gas,
A silicon thin film 3 was formed to have a thickness of about 50 nm.

この試料に電極を当て、A u / G e電極の有無
での表面導電性を調べた。電極形成部では、薄膜形成と
同時にA u / G e電極とシリコンとの合金部4
を形成して低抵抗化したのに対し、シリコンのみの部分
では高抵抗のままであり、前述の作用が実際に利用でき
ることがわかった。
An electrode was applied to this sample to examine the surface conductivity with and without the Au/Ge electrode. In the electrode forming part, the alloy part 4 of the A u / G e electrode and silicon is formed at the same time as the thin film is formed.
However, the resistance remained high in the silicon-only part, indicating that the above-mentioned effect can actually be used.

第2図は、第4図の従来技術に対比して、InP/In
GaAsP発光ダイオードの電流狭窄に利用した場合の
構成図である。N型1nP11、P型1nGaAsP活
性層12、P型1nP13、および、P型1nGaAs
P14の順で形成したタフルヘテロジャンクション上に
金・亜鉛(Au/Zn)合金21の電極を直径35μm
1厚さ400nmに形成した上に、シリコン3を50n
mの厚さで推積させた。さらに、その上にポンディング
用の金5(2μm)をチタン(Ti)をはさんで形成し
、裏面には、Au/Zn電極21に合わせて穴部を設け
たA u / G e電極71を形成した。作製した素
子では、発光は電極21の下部で生じ、その径は約40
μmであり高抵抗シリコンのために電流は良好に狭窄さ
れていることが確認できた。
In contrast to the prior art shown in FIG. 4, FIG.
FIG. 2 is a configuration diagram when used for current confinement of a GaAsP light emitting diode. N-type 1nP11, P-type 1nGaAsP active layer 12, P-type 1nP13, and P-type 1nGaAs
An electrode of gold/zinc (Au/Zn) alloy 21 with a diameter of 35 μm was placed on the tuffle heterojunction formed in the order of P14.
1 is formed to a thickness of 400 nm, and silicon 3 is formed to a thickness of 50 nm.
The thickness was estimated at m. Furthermore, gold 5 (2 μm) for bonding is formed on it by sandwiching titanium (Ti), and on the back side, an A u /G e electrode 71 is formed with a hole corresponding to the Au / Zn electrode 21 . was formed. In the fabricated device, light emission occurs at the bottom of the electrode 21, and its diameter is approximately 40 mm.
It was confirmed that the current was well constricted due to the high resistance silicon.

同じ試料を高温雰囲気で通電試験を行った結果では、第
4図で示した従来技術のものに対し、2桁以上良い寿命
時間が推定され、熱膨脹係数などの結果として非常に信
頼性が良いことが確認でき本発明が効果的であることが
わかった。
The results of conducting an electric current test on the same sample in a high-temperature atmosphere showed that the lifespan was estimated to be two orders of magnitude better than that of the conventional technology shown in Figure 4, and the results of the coefficient of thermal expansion were extremely reliable. It was confirmed that the present invention is effective.

第3図は、同様に第5図の従来例に対し、本発明を応用
した場合の構威図である。P型GaAs基板15上にP
型GaAIAs(X=0.7)16、P型GaAIAs
(X=0.35)17、P型GaAIAs(X=0.7
)18よりなるダブルヘテロジャンクションの表面に直
径100μmのA u / G e電極22を約1μm
の厚さで形成した後、メサエッチングにより素子分離し
た。その後、裏面電極としてA u/ Z n合金72
を蒸着してから、シリコン3を50nmの厚さで全面に
形成した。この場合にも、電極22とシリコン3は容易
に合金化部4を作り、その他の表面は高抵抗シリコンで
覆われた。この例では、シリコン薄膜3を形成した後に
エッチング工程がないので、メサエッジにおいても完全
に保護され、良好な保護膜が形威できた。このため、高
温高湿化での通電試験においても発光効率の劣化はほと
んどなく、顕著な信頼性改善効果が見られた。
Similarly, FIG. 3 is a structural diagram when the present invention is applied to the conventional example shown in FIG. P on the P-type GaAs substrate 15
type GaAIAs (X=0.7)16, P-type GaAIAs
(X=0.35)17, P-type GaAIAs (X=0.7
) 18, an A u / G e electrode 22 with a diameter of 100 μm is placed on the surface of a double heterojunction of about 1 μm.
After forming the semiconductor device to a thickness of 1, the elements were separated by mesa etching. After that, Au/Zn alloy 72 was used as the back electrode.
After that, silicon 3 was formed to a thickness of 50 nm over the entire surface. In this case as well, the electrode 22 and the silicon 3 easily formed an alloyed portion 4, and the other surfaces were covered with high-resistance silicon. In this example, since there was no etching step after forming the silicon thin film 3, even the mesa edges were completely protected and a good protective film was formed. For this reason, there was almost no deterioration in luminous efficiency even in current tests at high temperatures and high humidity, and a significant reliability improvement effect was observed.

以上の実施例において、金属電極の厚さに対するシリコ
ン薄膜の厚さは、数10パーセント以下であることが望
ましく、この値を越えると、特別な工夫なしでは、ワイ
ヤボンデイングや電極金属間の密着性が悪くなる傾向が
みられた。
In the above embodiments, it is desirable that the thickness of the silicon thin film to the thickness of the metal electrode be several tens of percent or less. There was a tendency for it to get worse.

発明の効果 本発明は化合物半導体素子の保護膜を簡単な方法にて作
製し、さらに、素子の信頼性を著しく改善せしめること
が可能であり、本発明を実際に使用した場合の工業的価
値は極めて高いといえる。
Effects of the Invention The present invention makes it possible to fabricate a protective film for a compound semiconductor device using a simple method, and further improves the reliability of the device significantly.The industrial value of the present invention when actually used is It can be said that this is extremely high.

本発明の実施例では、GaAIAs係、及び、InP系
の発光ダイオードについて述べたが、化合物半導体の種
類としては、InGaAIAs,I nGaA I P
などのその他の材料でもよく、発光ダイオードの代わり
に半導体レーザ、受光素子、電界効果トランジスタ、あ
るいは、上記の複数素子等、他の素子でも同様の効果が
得られることは言うまでもない。
In the embodiments of the present invention, GaAIAs-based and InP-based light emitting diodes have been described, but as types of compound semiconductors, InGaAIAs, InGaA I P
It goes without saying that other materials may be used instead of the light emitting diode, and similar effects can be obtained by using other elements such as a semiconductor laser, a light receiving element, a field effect transistor, or a plurality of the above elements instead of the light emitting diode.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の作用を確認する実施例の構成を示す断
面図、第2図は本発明をInP系発光ダイオードに応用
した実施例の構成を示す断面図、wis図は本発明をG
aAIAs系発光ダイオードに応用した別の実施例の構
或を示す断面図、第4図はInP系発光ダイオードの従
来技術による断面図、第5図はGaAIAs系発光ダイ
オードの従来技術による断面図である。
FIG. 1 is a cross-sectional view showing the structure of an example for confirming the effect of the present invention, FIG. 2 is a cross-sectional view showing the structure of an example in which the present invention is applied to an InP-based light emitting diode, and the wi
A cross-sectional view showing the structure of another embodiment applied to an aAIAs-based light emitting diode, FIG. 4 is a cross-sectional view of an InP-based light emitting diode according to the prior art, and FIG. 5 is a cross-sectional view of a GaAIAs-based light emitting diode according to the prior art. .

Claims (4)

【特許請求の範囲】[Claims] (1)金属電極を部分的に形成してなる化合物半導体素
子の表面より、前記電極上部を含んで抵抗率の大なるシ
リコンを薄膜形成し、前記電極部においては前記シリコ
ンと前記電極金属とを合金化させることにより低抵抗化
をなし、かつ、前記電極部以外の素子表面は高抵抗の前
記シリコン薄膜で覆うことを特徴とした化合物半導体素
子の製造方法。
(1) A thin film of silicon having high resistivity is formed on the surface of a compound semiconductor element formed by partially forming a metal electrode, including the upper part of the electrode, and the silicon and the electrode metal are formed in the electrode part. A method for manufacturing a compound semiconductor device, characterized in that the resistance is reduced by alloying, and the device surface other than the electrode portion is covered with the high-resistance silicon thin film.
(2)電極金属が金またはアルミニウムを主材とする特
許請求範囲第1項の化合物半導体素子の製造方法。
(2) The method for manufacturing a compound semiconductor device according to claim 1, wherein the electrode metal is mainly made of gold or aluminum.
(3)化合物半導体素子の表面に突起部もしくは陥没部
が部分形成されていることを特徴とした特許請求範囲第
1項または第2項の化合物半導体素子の製造方法。
(3) The method for manufacturing a compound semiconductor device according to claim 1 or 2, wherein a protrusion or a depression is partially formed on the surface of the compound semiconductor device.
(4)金属電極上に形成するシリコン薄膜の厚さが前記
金属電極の厚さの数10パーセント以内であることを特
徴とした特許請求範囲第1項、第2項または第3項の化
合物半導体素子の製造方法。
(4) A compound semiconductor according to claim 1, 2 or 3, wherein the thickness of the silicon thin film formed on the metal electrode is within several tens of percent of the thickness of the metal electrode. Method of manufacturing elements.
JP15532689A 1989-06-16 1989-06-16 Method for manufacturing compound semiconductor device Expired - Fee Related JP2543190B2 (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007029538A1 (en) * 2005-09-02 2007-03-15 Kyoto University Two-dimensional photonic crystal surface emission laser light source
JP2007173530A (en) * 2005-12-22 2007-07-05 Hitachi Cable Ltd Semiconductor light-emitting device
JP2012049204A (en) * 2010-08-25 2012-03-08 New Japan Radio Co Ltd Nitride semiconductor device and method of manufacturing the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007029538A1 (en) * 2005-09-02 2007-03-15 Kyoto University Two-dimensional photonic crystal surface emission laser light source
US8379686B2 (en) 2005-09-02 2013-02-19 Kyoto University Two-dimensional photonic crystal surface-emitting laser light source
JP2007173530A (en) * 2005-12-22 2007-07-05 Hitachi Cable Ltd Semiconductor light-emitting device
JP4655920B2 (en) * 2005-12-22 2011-03-23 日立電線株式会社 Semiconductor light emitting device
JP2012049204A (en) * 2010-08-25 2012-03-08 New Japan Radio Co Ltd Nitride semiconductor device and method of manufacturing the same

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