JPH03200338A - Manufacture of thin film transistor - Google Patents

Manufacture of thin film transistor

Info

Publication number
JPH03200338A
JPH03200338A JP34149389A JP34149389A JPH03200338A JP H03200338 A JPH03200338 A JP H03200338A JP 34149389 A JP34149389 A JP 34149389A JP 34149389 A JP34149389 A JP 34149389A JP H03200338 A JPH03200338 A JP H03200338A
Authority
JP
Japan
Prior art keywords
film
gate electrode
gate
thin film
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34149389A
Other languages
Japanese (ja)
Inventor
Tsuneo Yamazaki
山崎 恒夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP34149389A priority Critical patent/JPH03200338A/en
Publication of JPH03200338A publication Critical patent/JPH03200338A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce a process wherein a gate electrode is insulated from the other electrodes and prevent a defect from being generated by selectively oxidizing the end portions of the gate electrode to make them insulating films and filling pin holes generated in a gate insulating film so as not to affect characteristics, respectively. CONSTITUTION:A region corresponding to the gate of a transistor is selectively formed by sequentially etching a gate insulating film 3 and a gate electrode film 2. Anode oxide films 7 are formed on the end portions of the gate electrode film 2 by an anodic oxidation method. In a process wherein anodic oxidation is performed, when a pin hole is present in the gate insulating film 3 on the gate electrode film 2, the anode oxide film 7 is formed on one end of the gate electrode film 2 and, at the same time, the portion of the pin hole is covered by the anode oxide film 7, enabling an insulation to be kept between the anode oxide film 7 and a film formed thereof. Thus, the detect of a thin film transistor caused by the pin hole can perfectly be prevented from being generated and a manufacture yield is improved.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、アクティブマトリクス液晶表示装置やセン
サ装置などにスイッチングデバイスとして用いられる薄
膜トランジスタの製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing thin film transistors used as switching devices in active matrix liquid crystal display devices, sensor devices, and the like.

〔発明の概要〕[Summary of the invention]

この発明は薄膜トランジスタとその製造方法において、
ゲート電極端部を陽極酸化する方法を応用してフォトマ
スク工程が少なく、製造が容品で欠陥の発生が少ない薄
膜トランジスタとその製造方法を提供するようにしたも
のである。
The present invention relates to a thin film transistor and a method for manufacturing the same.
The present invention applies a method of anodic oxidation of the end portion of a gate electrode to provide a thin film transistor that requires fewer photomask steps, can be manufactured in a compact manner, and has fewer defects, and a method for manufacturing the same.

〔従来の技術〕[Conventional technology]

第2図Ta)〜(flにアクティブマトリクス液晶表示
装置に用いられている従来の薄膜トランジスタの製造方
法を示す。従来の方法のなかでフォトマスク工程が3回
という、少ない回数で実現できる薄膜トランジスタの製
造方法としては、 (alガラスなどの絶縁基板IOの上にクロム等の金属
膜からなるゲート電極11を選択的に形成する工程 fb)その上に窒化珪素、酸化珪素などからなるゲート
絶縁膜12.非晶質シリコンあるいは多結晶シリコンな
どからなる第一の半導体膜13.N型に不純物を添加し
た第二の半導体膜14.クロムなどからなる金属電極膜
15を連続して堆積する工程(C1前記金属電極膜15
.不純物添加した第二の半導体膜14.第一の半導体膜
13をほぼ同一の平面形状に選択的にエツチングして薄
膜トランジスタのチャンネル領域を形成する工程 (dl酸化インジウムスズなどからなる透明導電膜16
を堆積する工程 (elフォトリングラフィで薄膜トランジスタのソース
およびドレイン電極の形状をフォトレジスト17で形成
する工程 (「)前記透明導電膜16.金属電極膜15.不純物添
加した第二の半導体膜14を選択的にエツチングしてト
ランジスタのソース16’ およびドレイン電極16’
を形成する工程 からなるものである。
Figures 2 (Ta) to (fl) show a conventional manufacturing method for thin film transistors used in active matrix liquid crystal display devices.Manufacture of thin film transistors can be accomplished with fewer photomask steps than the conventional method, with only three steps. The method includes (Step fb of selectively forming a gate electrode 11 made of a metal film such as chromium on an insulating substrate IO such as Al glass) A gate insulating film 12 made of silicon nitride, silicon oxide, etc. is formed thereon. Step of successively depositing a first semiconductor film 13 made of amorphous silicon or polycrystalline silicon, a second semiconductor film 14 doped with N-type impurities, and a metal electrode film 15 made of chromium or the like (C1 above). Metal electrode film 15
.. Second semiconductor film 14 doped with impurities. Step of selectively etching the first semiconductor film 13 into substantially the same planar shape to form a channel region of a thin film transistor (dl transparent conductive film 16 made of indium tin oxide, etc.)
(step of forming the shape of the source and drain electrodes of the thin film transistor with photoresist 17 using EL photolithography (")") step of depositing the transparent conductive film 16, the metal electrode film 15, and the second semiconductor film 14 doped with impurities. Selectively etching the source 16' and drain electrodes 16' of the transistor.
It consists of the process of forming.

この従来の製造方法はトランジスタの製法としては非常
に少ない3回のフォトリソグラフィ工程からなるもので
あるが、アクティブマトリクス液晶表示装置やセンサー
への応用では1素子の中に多数のトランジスタを形成す
る。即ち、液晶表示装置の場合であれば、数万個から数
百万個ものトランジスタを縦、横の大きさが数センチか
ら数十センチの中に形成する。1つのトランジスタでも
不良となればこの表示装置は不良となる。
This conventional manufacturing method consists of three photolithography steps, which is extremely small for a transistor manufacturing method, but when applied to active matrix liquid crystal display devices and sensors, a large number of transistors are formed in one element. That is, in the case of a liquid crystal display device, tens of thousands to millions of transistors are formed within a vertical and horizontal size of several centimeters to several tens of centimeters. If even one transistor becomes defective, the display device becomes defective.

この不良の原因の主なものとしては、 ■ 隣合う導電膜のパターンが、フォトリソグラフィ工
程でのゴミなどによりショートしてしまう、■ 同じく
フォトリソグラフィ工程でのゴミなどにより本来接続さ
れているべき電極配線が断線してしまう、 ■ 絶縁膜の成膜工程中などで発生するゴミなどによる
絶縁膜のピンホールで絶縁膜の上下の導電膜の間でショ
ートしてしまう、 などである。
The main causes of this defect are: ■ Adjacent conductive film patterns are short-circuited due to dust etc. during the photolithography process, ■ Electrodes that should have been connected due to dust etc. during the photolithography process Wiring may become disconnected; ■ Pinholes in the insulating film caused by dust generated during the insulating film formation process may cause short circuits between the conductive films above and below the insulating film.

この中で■のショートはレーザで接続されたパターンを
切り放すなどして修正する。■の断線はフォトリソグラ
フィの工程を二重に行うなどして防ぐなどの対策が可能
である。しかし■のピンホールは厚さ50〜1000ナ
ノメータという絶縁の厚さと同程度の大きさで防止や修
正が著しく困難である。このため、高い歩留まりでアク
ティブマトリクス表示装置を製造することは著しく困難
であり、実用化のためには歩留まりの良い製造ができな
いでいた。
Among these, the short circuit (■) is corrected by cutting off the pattern connected by the laser. It is possible to prevent the disconnection (2) by performing the photolithography process twice. However, the pinholes shown in (1) have a thickness of 50 to 1000 nanometers, which is about the same size as the thickness of the insulation, and are extremely difficult to prevent or correct. For this reason, it is extremely difficult to manufacture an active matrix display device with a high yield, and it has not been possible to manufacture an active matrix display device with a high yield for practical use.

(発明が解決しようとする課題〕 そこでこの発明は、従来のこのような欠点を解決するた
めに成されたもので、製造歩留まりが良く、生産性に優
れた薄膜トランジスタの製造方法を提供することである
(Problems to be Solved by the Invention) Therefore, the present invention has been made to solve these conventional drawbacks. be.

〔課題を解決するための手段〕[Means to solve the problem]

上記問題点を解決するために、この発明はゲート電極膜
端部を陽極酸化法で絶縁膜化する。
In order to solve the above problems, the present invention converts the end portion of the gate electrode film into an insulating film using an anodic oxidation method.

〔作用〕[Effect]

陽極酸化法でゲート電極端部を選択的に酸化し絶縁膜化
することで、ゲート電極を他の電極(ソース、ドレイン
)から絶縁する工程を減らすことができると同時に、ゲ
ート絶縁膜に生じたピンホールをトランジスタの特性に
殆んど影響を及ぼさないようにして塞いで、欠陥の発生
を防止する。
By selectively oxidizing the end of the gate electrode using anodization to form an insulating film, it is possible to reduce the process of insulating the gate electrode from other electrodes (source, drain), and at the same time reduce the process of insulating the gate electrode from other electrodes (source, drain). To prevent the occurrence of defects by blocking pinholes in a manner that hardly affects the characteristics of a transistor.

〔実施例〕〔Example〕

第1図1a)〜(吟に、本発明による薄膜トランジスタ
の製造工程順を示す一実施例の断面図で、fat  ガ
ラスなどからなる絶縁基板1の上にタンタルあるいはタ
ンタルの合金などからなるゲート電極膜2をスパッタ法
や蒸着法で、酸化珪素や窒化珪素などからなるゲート絶
縁膜3をスバ・ツタ法やCVD法プラズマCVD法など
で、成膜する第−工程 山)前記ゲート絶縁膜3.ゲート電極膜2を順番にエツ
チングして、トランジスタのゲートに相当する領域を選
択的に形成する第二工程 fc)  陽極酸化法でゲート電極2の端部に陽極酸化
膜7を形成する第三工程(ただし、ゲート絶縁膜とゲー
ト電極膜のパターニングに用いたレジストを残したまま
陽極酸化を行ってもよい)(d)  非晶質シリコンや
多結晶シリコンなどからなる第一の半導体膜4をCVD
法、スパッタ法、プラズマCVD法などで、同様の方法
でN又はP型にドープした第二の半導体膜5をクロム、
アルミニウム、タンタル、タングステン鋼など、あるい
はこれらの多層膜からなる金属電極膜6をスパッタ法や
蒸着法で、3層のfl膜を成膜する第四工程(e)トラ
ンジスタの能動領域を、前記金属電極膜6、NまたはP
型にドープした第二の半導体膜5゜第一の半導体膜4を
順番にエツチングして選択的に形成する第五工程 (di  i3明導電膜8を成膜する第四工程ffl 
 フォトリソグラフィー工程で薄膜トランジスタのソー
ス及びドレイン電極の形状をフォトレジスト9で形成す
る第六工程 (勢 透明導電膜8.金属電極膜6.ドープした第二の
半導体膜5を選択的にエツチングしf!W4)ランジス
タのソース電極8“、ドレイン電極8”を形成する第七
工程とからなる。
1a) to 1(a) are cross-sectional views of one embodiment showing the order of manufacturing steps of a thin film transistor according to the present invention, in which a gate electrode film made of tantalum or a tantalum alloy is formed on an insulating substrate 1 made of fat glass or the like. 2 by a sputtering method or vapor deposition method, and a gate insulating film 3 made of silicon oxide, silicon nitride, etc. by a sputtering method, a CVD method, a plasma CVD method, or the like. A second step (fc) in which the gate electrode film 2 is sequentially etched to selectively form a region corresponding to the gate of the transistor; and a third step (fc) in which the anodic oxide film 7 is formed at the end of the gate electrode 2 by an anodic oxidation method. (However, anodizing may be performed while leaving the resist used for patterning the gate insulating film and gate electrode film.) (d) CVD the first semiconductor film 4 made of amorphous silicon, polycrystalline silicon, etc.
The second semiconductor film 5 doped with N or P type using a similar method is chromium, sputtering, plasma CVD, etc.
The fourth step (e) is to form a three-layer fl film using a metal electrode film 6 made of aluminum, tantalum, tungsten steel, etc. or a multilayer film of these materials by sputtering or vapor deposition. Electrode film 6, N or P
Second semiconductor film 5 doped in the mold; Fifth step of selectively etching the first semiconductor film 4 (di i3 Fourth step of forming a bright conductive film 8ffl)
The sixth step (step 6) of forming the shape of the source and drain electrodes of the thin film transistor using photoresist 9 in the photolithography step (step 1) selectively etching the transparent conductive film 8, metal electrode film 6, and doped second semiconductor film 5. W4) A seventh step of forming a source electrode 8" and a drain electrode 8" of the transistor.

この実施例ではフォトマスク工程が3回で薄膜トランジ
スタを形成できている。
In this example, a thin film transistor can be formed by performing the photomask process three times.

従来の実施例で記したように、薄膜トランジスタの製造
工程中で発生する欠陥のなかでゲート絶縁膜のピンホー
ルに起因するものはもっとも欠陥の中でも発生頻度が高
く、かつレーザ修正等の手段をとることも困難なもので
あった0本発明の薄膜トランジスタの製造方法は、陽極
酸化を行う第三工程で、もしゲート電極2の上のゲート
絶縁膜3にピンホールがあると、ゲート電極の一端に陽
極酸化膜が形成されると同時に、ピンホールの部分も陽
極酸化膜で覆われ、その上に形成される膜との間の絶縁
を保つことができる。これによりピンホールが原因で発
生するflilll)ランジスタの欠陥を完全に防止す
ることができ製造歩留まりが大幅に向上する。
As described in the conventional example, among the defects that occur during the manufacturing process of thin film transistors, those caused by pinholes in the gate insulating film occur most frequently, and measures such as laser repair are required. In the manufacturing method of the thin film transistor of the present invention, in the third step of anodic oxidation, if there is a pinhole in the gate insulating film 3 on the gate electrode 2, one end of the gate electrode may be damaged. At the same time as the anodic oxide film is formed, the pinhole portion is also covered with the anodic oxide film, and insulation between the pinhole and the film formed thereon can be maintained. As a result, defects in transistors caused by pinholes can be completely prevented, and manufacturing yields can be greatly improved.

本発明の実施例で、ソース・ドレインの電極となる金属
電極は半導体膜と透明導電膜の良好な電気的接触を得る
ためのもので必須ではない。また透明導電膜はアクティ
ブマトリクス液晶表示装置の画素のスイッチとして本発
明の薄膜トランジスタが用いられた場合を本実施例では
説明したが、センサ等信の応用では必ずしも透明な膜で
ある必要はない。また本発明によれば実施例の図、第1
図+al〜(蜀で示したごとくゲート電極2とドレイン
電極8”の間に容量(キャパシタンス)を形成して、ア
クティブマトリクス液晶表示装置の場合などに用いられ
る信号保持用の容量として用いることができる。
In the embodiments of the present invention, the metal electrodes serving as the source/drain electrodes are for obtaining good electrical contact between the semiconductor film and the transparent conductive film, and are not essential. Furthermore, although the transparent conductive film is described in this embodiment in the case where the thin film transistor of the present invention is used as a switch of a pixel of an active matrix liquid crystal display device, it is not necessarily necessary to be a transparent film in applications such as sensors. Further, according to the present invention, FIG.
Figure +al ~ (As shown by the shu, a capacitance can be formed between the gate electrode 2 and the drain electrode 8'', and it can be used as a signal holding capacitor used in active matrix liquid crystal display devices, etc.) .

〔発明の効果〕〔Effect of the invention〕

以上述べてきたように、本発明によると薄膜トランジス
タを3マスク工程という少ない工程で歩留まり良く生産
できる。また陽極酸化したゲート電極端部は段差部での
ゲート−ドレイン、ソース間のシッートの確率を大幅に
減らすことができ、さらにゲート絶縁膜にピンホールな
どがあった場合も陽極酸化により自動的にピンホールを
消滅させることができる。
As described above, according to the present invention, thin film transistors can be produced with a high yield through as few steps as three mask steps. In addition, the anodized end of the gate electrode can greatly reduce the probability of a sit between the gate and drain or source at the stepped portion, and even if there is a pinhole in the gate insulating film, the anodized Can eliminate pinholes.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(al〜(g)は本発明による薄膜トランジスタ
の製造方法の一実施例を示す断面図、第2図ta+〜(
flは従来の薄膜トランジスタの製造方法を示す断面図
である。 1、11・ 4.13・ 6.15・ 8.16・ 8’、16’ ・ 8”、16”・ 9 ・ ・ ・ ・・ゲート電極 ・・a−3i膜 ・・電極膜 ・・透明導電膜 ・・ソース電極 ・・ドレイン電極 ・・フォトレジスト 以上
FIGS. 1(al) to (g) are cross-sectional views showing an embodiment of the method for manufacturing a thin film transistor according to the present invention, and FIGS.
fl is a cross-sectional view showing a conventional method for manufacturing a thin film transistor. 1, 11, 4.13, 6.15, 8.16, 8', 16', 8'', 16'', 9...Gate electrode...A-3i film...Electrode film...Transparent conductive Film: Source electrode, Drain electrode: More than photoresist

Claims (1)

【特許請求の範囲】 薄膜トランジスタの製造工程において、少なくとも (a)絶縁基板上にゲート電極膜、ゲート絶縁膜を成膜
する第一工程 (b)前記ゲート絶縁膜、ゲート電極膜を順番にエッチ
ングして選択的に形成する第二工程 (c)陽極酸化法でゲート電極端部に絶縁膜を形成する
第三工程 (d)第一の半導体膜、NまたはP型にドープした第二
半導体膜、金属電極膜を成膜する第四工程(e)金属電
極膜、ドープした第二の半導体膜を選択的にエッチング
する第五工程 (f)透明導電膜を成膜する第六工程 (g)該透明導電膜、該金属電極膜、該第二の半導体を
選択的にエッチングする第七工程 とからなる薄膜トランジスタの製造方法。
[Claims] In the manufacturing process of a thin film transistor, at least (a) a first step of forming a gate electrode film and a gate insulating film on an insulating substrate; (b) etching the gate insulating film and the gate electrode film in order; (c) a third step of forming an insulating film at the end of the gate electrode by an anodic oxidation method; (d) a first semiconductor film; a second semiconductor film doped with N or P type; Fourth step of forming a metal electrode film (e) Fifth step of selectively etching the metal electrode film and the doped second semiconductor film (f) Sixth step of forming a transparent conductive film (g) Applicable A method for manufacturing a thin film transistor, comprising a seventh step of selectively etching a transparent conductive film, the metal electrode film, and the second semiconductor.
JP34149389A 1989-12-27 1989-12-27 Manufacture of thin film transistor Pending JPH03200338A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34149389A JPH03200338A (en) 1989-12-27 1989-12-27 Manufacture of thin film transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34149389A JPH03200338A (en) 1989-12-27 1989-12-27 Manufacture of thin film transistor

Publications (1)

Publication Number Publication Date
JPH03200338A true JPH03200338A (en) 1991-09-02

Family

ID=18346485

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34149389A Pending JPH03200338A (en) 1989-12-27 1989-12-27 Manufacture of thin film transistor

Country Status (1)

Country Link
JP (1) JPH03200338A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5166085A (en) * 1987-09-09 1992-11-24 Casio Computer Co., Ltd. Method of manufacturing a thin film transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5166085A (en) * 1987-09-09 1992-11-24 Casio Computer Co., Ltd. Method of manufacturing a thin film transistor

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