JPH0319562B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a process control device that controls a process by sampling control, and more particularly, to a complex process control device equipped with a communication function suitable for processing a plurality of mutually related control variables. Regarding equipment.

There are many industrial processes that have multiple control variables that are interrelated to achieve a goal. In order to control such a process, multiple control loops are configured, and when each control loop performs process control processing for its own control loop, it also refers to control information of other control loops, that is, takes in the control information as input information for control. must be processed. Therefore, it is necessary to transmit control information between each control loop.

Conventionally, such control information has been transmitted between control loops by using individual wiring such as PV lines and SP lines between each control loop, or by transmitting multiple control loops into one as in a multi-loop controller. In those that share memory, this is done through shared memory. In addition, in a system in which multiple controllers are connected via a communication line, control information is transmitted over this communication line. Communication methods such as the following are used. However, with such a communication method, the number of communications increases significantly, it takes time to collect necessary control information from other control loops, and it is difficult to obtain synchronization of the acquired control information between control loops. . Another disadvantage is that it is difficult to maintain the periodicity of control calculations required during sampling control to account for the time required for retransmission when a transmission error occurs. In order to eliminate these drawbacks, communication in a short time compared to the period of sampling control, in other words, very high-speed communication is required, but it will be expensive.

The present invention has been made in view of this background, and uses a communication bus in a time-division manner using a fixed-cycle time slot method, and each control loop side transmits information to other control loop sides by simultaneous transmission in its assigned time slot. Sends own control information. Each control loop stores its own control information and the information sent from each of the other control loops, and performs control processing using the stored control information. The stored information is updated in each loop while maintaining simultaneity, and the periodicity of the sampling control calculation is not disturbed by the intake of input information.

Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the composite process control device of the present invention. In the figure, 1 is a time slot marker generation module, and 2 is a control loop processing unit, which is a basic unit of process control. 3 is a communication module for communicating between this device and other external devices, and 4 is an internal communication bus for generating the above-mentioned time slot marker. Modules, process control function modules and communication modules are connected to this communication bus. Also,
Each process control function module is connected to the process 5 via a process signal processing device (not shown).

In this control device, a time slot marker generation module 1 generates a time slot marker having a format as shown in FIG. These series of time slot markers constitute a time slot as shown in FIG. Each process control function module 2 receives and decodes the time slot marker, performs sampling control operations in synchronization with this marker signal, and transmits control information (transmission format is b in Figure 2) according to the assigned slot number. It also communicates with the outside, for example, a man-machine interface or a host computer (the transmission format is c in FIG. 2).

FIG. 4 is a functional block diagram showing the functions of the process control function module 2. As shown in FIG. In the figure, PCR is a bus communication processing unit, and the communication bus (first
It receives and processes time slot marker signals sent through block 4) of the figure as well as control information from other process control function modules.
dB is an other module control information holding buffer that stores control information from other process control function modules, and the storage area is divided and prepared for each other process control function module. US is a status register that indicates the update status of the received data at the dB, that is, whether or not it is updated as specified, and also indicates the operating status of other process control function modules related to its own control processing. . DB is a self-module control information holding buffer that stores control information of its own process control function module, and PS is a timing signal for sampling control based on a synchronization signal based on a time slot marker signal from the bus communication processing unit PCR. This is a timing control section that generates

AN and AA are storage units storing a control algorithm during normal operation and a control algorithm that replaces the control algorithm during abnormal operation when an abnormality occurs. PP is the above dB, US, DB, PS and
A process control processing unit that controls and manages processes connected to itself based on information and control from AN, etc. The PCT is a bus communication processing unit that transmits own module control information to each other process control function module at a predetermined timing assigned to the own module based on a synchronization signal based on the time slot marker signal from the PCR. This is for sending all at once. Furthermore,
PT is a local sampling timer, and the sampling time control unit PS is a bus communication processing unit PCR.
When an abnormal state occurs in which a synchronization signal cannot be obtained from the controller, a timing signal for sampling control is provided instead, and predetermined abnormality processing is started.

Next, the relationship between communication of control information between the process control function modules of the apparatus shown in FIG. 1 and control processing will be explained using FIGS. 5 and 6.

FIG. 5 shows only the own module and other module control information holding buffers of each process control function module extracted for the purpose of explaining the operation of simultaneous updating of the buffer contents, and shows the control information between each module 2. The communication is performed by the simultaneous transmission method as shown below.

The time slots within one cycle in Fig. 3 are control information transmission frames (number of slots N≧number of control function modules in the device X) and external communication transmission frames (number of slots M is determined by the amount of communication with external equipment) For example, time slot # is assigned to module #, time slot #n is assigned to module #n, and communication is permitted. Therefore, during the period of time slot #, only the module 2 of # is allowed to simultaneously transmit the control information held in its own module control information holding buffer DB to other modules 2, and the other modules 2 do not receive this control information. , and the storage area dB# for storing information from the transmitting module #, which is divided and provided within the other module control information holding buffer dB, is updated all at once.
Next, during the time slot #n, only module #n of module 2 is allowed to transmit, and all other modules are in the receiving state. As a result, the buffer dB of all modules except #n of module 2
The storage areas dB#n provided in are updated all at once. In this way, by using time-division multiplex communication with a fixed period using the time slot format, the contents of the control information holding buffer for other modules are updated at the same time with control information from the same point in time through two simultaneous transmissions for periodic updates. and prepared. Figure 6 illustrates these situations in terms of the relationship between processing operations and information flow in a complex process control device.In synchronization with the time slot marker, each module simultaneously transmits process information in time slot #a. A buffer DB that holds control information for the own module performs processing according to the process by sampling
Perform processing such as holding the In the figure, module # performs arithmetic processing for process control using only its own process information, and other modules #m,
This is an example where module #n uses the control information that has been pre-processed by module # as part of its own control information. , send all at once to other modules. In addition, module #
As mentioned above, does not require control information from other modules. That is, this is an example in which it is not necessary to receive control information from other modules. Module #m
is an example in which information from other modules # and #n is used as part of its own control information. In this way, each process control function module 2 refers to data such as its own module and/or other module's control information holding buffer (DB, dB), etc., and executes the process according to the control program stored in its own control algorithm storage part AN. Control process 5. In addition, if an abnormality occurs, for example, if the status register US outputs a defective update status, the control algorithm (at the time of abnormality) will be switched to.
Predetermined control processing is performed. In addition, if a failure occurs such as the sampling time control unit PS not being able to obtain a synchronization signal from the bus communication processing unit PCR,
The timing signal from the local sampling timer PT defines the timing of the process control processing section, and necessary processing is performed.

FIG. 7 shows an embodiment of the process control function module 2 according to the present invention, and shows a block configuration consisting of a dual processor using a 2-port RAM. In the figure, 11 is a processor for process control processing (PP in Figure 4), and 12 is a control algorithm (AA,
PROM that stores AN) and RAM for work area for temporary storage of calculation results, etc.
(PP), 13 is a timer (PS/PT) for performing sampling control, 14 is a process signal input/output section, 15 is a multi-port RAM that holds own module control information retention buffer (DB), and other module control information retention buffer (dB), used for update status (US). 16 is a bus communication processing processor (PCR, PCT); 17 is a PROM in which a bus communication processing program used by the processor 16 is stored and a work area RAM (PCR, PCT);
18 is a timer (PCR, PCT) that generates the time signal necessary for bus communication processing, 19 is an internal bus 21 to which the process control function module is connected.
(4 in FIG. 1) and the processor bus 20.
Broadly speaking, 14 constitutes an algorithm section, and 16 to 19 constitute a bus communication section. The operation is the same as described above, and other module information and update status are prepared by the bus communication department.
It is written to the RAM 15 and the algorithm section can be used at any timing independent of the bus communication section. Self-module control information is also prepared in the RAM 5, referenced by the algorithm section, read out by the bus communication section, and transmitted all at once to other control function modules in the assigned time slot. The bus communication processing processor 16, PROM, and RAM 17 perform periodic transmission, periodic reception processing, and supply of synchronization signals to the algorithm section.

As is clear from the above description, according to the present invention, the process control function module is composed of basic units required for process control, and the mutual control information transmission means is a common unit for all modules. Since it consists of two communication systems, it is possible to connect process signals to each module and change the readout for transmitting control information between modules, in other words, it is possible to meet the needs of the process without changing the actual wiring. By increasing or decreasing the number of process control function modules or changing their control combinations, complex control functions ranging from extremely small to large scale can be effectively realized. This feature is particularly advantageous for off-site and batch processes where the configuration of the control loop to be controlled is dynamically changed depending on the operating mode even within the same plant.

In addition, since each control function module is configured to maintain independence, necessary abnormality handling can be easily performed, maintenance is easy, and the influence on the entire process can be reduced.

Furthermore, the present invention efficiently guarantees the simultaneity of control information, which is very important when performing sampling process control in a plurality of interrelated control loops, through simultaneous transmission within a limited transmission capacity. The periodicity of the calculation is completely satisfied. The time slot method allows for the definition of a time series of processing and for synchronized processing between independent control function modules. In addition to the synchronization method (forced synchronization method) explained so far, each time slot marker is generated uniformly within each control function module in synchronization with the master time slot marker, which occurs once per cycle in Figure 3. A so-called dependent synchronization method may also be used.

[Brief explanation of drawings]

FIG. 1 is an overall configuration diagram showing an embodiment of the composite process control device of the present invention, FIG. 2 is an example of a transmission format, FIG. 3 is a configuration diagram of time slots in one cycle, and FIG. Fig. 1 is a functional block diagram showing the functions of the process control function modules, Fig. 5 is a diagram for explaining simultaneous updating of control information between control function modules, and Fig. 6 is an example of processing and information flow. This is what is shown. FIG. 7 shows an embodiment in which the process control function module in the composite process control apparatus of the present invention is configured by a processor or the like. 1...Time slot marker generation module,
2... Process control function module, 4, 21... Internal bus, 11, 16... Processor, 12, 17...
PROM and RAM, 13, 18...Timer, 15
…RAM.

Claims (1)

[Scope of Claims] 1. A time slot marker generation module that generates a time slot marker signal used to synchronize time division multiplex communication and control processing sequences in a process control algorithm section, and a basic unit of process control ( For example, a group of process control function modules each having a processing capacity of 1 control loop and performing sampling control, the time slot marker generation module and a group of process control function modules are connected, and the time slot marker generation module and process control function module group are connected to each other, and the time slot marker generation module and the process control function module group are connected to each other, and the time slot marker generation module and the process control function module group are connected to It consists of an internal communication bus for communication between a group of functional modules, and furthermore, the individual process control functional modules are configured to receive predetermined information from other process control functional modules for use during their own process control processing. An other module control information holding buffer for storing predetermined control information transmitted at regular intervals at the timing of ○B Update status of the other module control information holding buffer and other control function modules a status register indicating the operating status of the buffer; ○c. information on the area corresponding to the buffer using control information from other control function modules sent at regular intervals at the predetermined timing;
Updates the status register indicating the update status,
Furthermore, a bus communication processing unit that generates a synchronization signal generated from the time slot marker signal; (d) a buffer that holds control information of its own control function module; and (e) a buffer that holds control information of its own control function module; A bus communication processing unit for periodic transmission that sends its own control information all at once, and a sampling time signal for performing sampling control based on the synchronization signal from the bus communication processing unit for periodic update. ○G A storage unit storing the control algorithm; ○C Connected to itself based on information from each of the above-mentioned ○I, ○B, ○D, ○H and G parts. Composite process control consists of a process control processing unit that controls and manages the operating end, and is characterized by logically separating control information transmission between each process control function module and each process control process. Device.