JPH03195071A - Method of forming compound semiconductor structure - Google Patents

Abstract

PURPOSE:To avoid the contamination of a compound semiconductor surface by a method wherein a series of substrate treatment processes and crystal growth processes are successively performed under controlled atmospheres without exposing the compound semiconductor to the air. CONSTITUTION:A film forming chamber 31 is evacuated by a vacuum pump and its pressure is kept at 1X10<-8>Torr or less. First gas, or high purity H2S gas, is introduced into the chamber 31 and, at the same time, a halogen lamp light 52 is applied to a wafer surface to form a sulfide film 15 on a GaAs guide layer 13. After the pressure of the film forming chamber 31 is lowered to 1X10<-7>Torr or less by the vacuum pump, the wafer whose surface is coated with the sulfide film 15 is transferred into an etching chamber 33. Second gas, or chlorine gas 53, is introduced into the chamber 33 and, at the same time, an electron beam is applied to the wafer surface to form a line-and-space pattern on the sulfide film 15. Then an AlxGa1-xAs upper cladding layer 16 and a GaAs oxidation-proof layer 17 are built up. With this constitution, the contamination of the semiconductor surface by the air can be avoided.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for forming a patterned structure inside a compound semiconductor. The present invention relates to a method for forming a buried structure in which a pattern is formed in a wafer, and then a thin layer of crystal growth is performed.

[Prior Art] Conventionally, elements using compound semiconductors have been manufactured through steps such as repeating crystal growth and etching several times and, in some cases, diffusing impurities.

For example, to create an embedded semiconductor laser chip,
The following steps are taken.

First, a GaAs buffer layer, an AlGaAs cladding layer, a GaAs active layer, a GaAs cladding layer, and a G
An aAs electrode layer is grown while simultaneously adding necessary impurities.

Second, a protective film such as a SiO□ film is formed on the semiconductor surface on which each layer has been grown, and a resist is applied to the surface. Next, a pattern corresponding to a laser stripe is exposed and developed to form a pattern on the resist.

Third, the semiconductor is brought into contact with hydrofluoric acid (HF) to remove the protective film such as the SiO□ film in areas where there is no resist pattern. After that, the resist pattern is removed using an organic solvent or the like.

Fourth, the semiconductor is brought into contact with an etching solution containing sulfuric acid (does not etch the protective film), and the G of the epitaxial layer is etched.
Etch to a depth that reaches the aAs buffer layer.

Fifth, using liquid layer epitaxial method etc., AI
A GaAs layer is grown and the etched portion is filled in.

Sixth, remove the protective film remaining on the surface.

[Problems to be Solved by the Invention] However, the conventional method for forming a semiconductor structure requires many steps, and as a result, there is a problem in that it takes a long time to create.

Furthermore, when a striped pattern is formed by etching using a solution, the semiconductor surface must be exposed to the atmosphere, which poses a problem in that the surface is contaminated by the atmosphere.

An object of the present invention is to provide a method for forming a semiconductor structure in which pattern formation and subsequent crystal growth are performed continuously in a vacuum container.

[Means for Solving the Problems] The present invention includes a first step of forming a mask layer by irradiating the surface of a -v group compound semiconductor substrate with a first gas;
- irradiating the surface of the V group compound semiconductor substrate with a second gas different from the first gas and an electron beam to form a pattern on a mask, and irradiating the second gas with the a second step of etching the substrate to form a predetermined pattern; and heating the compound semiconductor in an atmosphere where the pressure of group V elements constituting the compound semiconductor substrate is 10-' Torr or higher to form the mask layer. A third step of removing the compound semiconductor, and a fourth step of growing a crystal growth layer on the surface of the compound semiconductor by an epitaxial method, and each of the first to fourth steps can reduce the temperature to 1×10 −' Torr or less. This is a method for forming a structure of a (1)-v group compound semiconductor, which is characterized in that it is carried out continuously in a plurality of vacuum containers.

[Example] The present invention will be described in detail below with reference to the drawings.

First, the apparatus used in the pattern creation method of the present invention will be briefly explained.

The apparatus shown in FIG. 3 has a film forming chamber 31 for loading and unloading wafers into the apparatus and for forming an etching mask.
, an MBE chamber 32 for epitaxial growth, and an etching chamber 33 for selectively etching a semiconductor to form a pattern.

These film forming chamber 31, MBE chamber 32, and etching chamber 33 are each connected to a sample exchange chamber 34 via a passage. Gate valves 35a and 3 are provided in each passage.
5b and 35c are provided. Also, each room 31.3
2. 33 and 34 are each provided with a vacuum pump (not shown) such as a turbo molecular pump or an ion pump. This allows the magnet feedthrough 36a to be placed in any chamber without exposing the wafer introduced into the apparatus to the atmosphere.
, 36b and 36c. Further, a sample heating chamber 30 is attached to the sample exchange chamber 34 via a passage.

The film forming chamber 31 includes a first gas introduction part (not shown) for introducing a first gas to form an adsorbed molecule layer or a layer reacted with gas, and a first gas introduction part (not shown) for introducing light as necessary. A window 311 is provided.

Further, an exposure unit 37 consisting of a light source, a lens, etc. is installed outside the window 311.

Furthermore, the etching chamber 33 is equipped with an electron beam generator 331 that generates an electron beam, a second gas introduction section 38 that introduces a second gas used for etching, and a manipulator 39 that adjusts the sample position. It is being

Referring to FIG. 4, an electron beam generator 331 is installed in the upper part of the etching chamber 33, and is configured to irradiate the surface of the sample 42 with an electron beam 41. Further, a nozzle 43 of the second gas introducing section 38 is also provided so as to be able to irradiate the surface of the sample 42 with gas. Furthermore, sample 4
A heater 44 is provided at the bottom of the sample 2, and the sample 42 can be heated by applying electricity from the current introduction terminal 45.

A first embodiment of the pattern forming method of the present invention will be described below with reference to FIGS. 1, 3, and 4.

First, the GaAs substrate 10 introduced into the film forming chamber 31 was transferred to the sample heating chamber 30 using the magnetic feedthroughs 36a and 36b. The sample heating chamber 30 is 1X10-'T
GaA was reduced in pressure to below orr and transported to the sample heating chamber 30.
The s-substrate 10 was heated to about 200° C. by a heating device installed inside, and the state was maintained for 10 minutes. Through this treatment, water molecules adsorbed on the surface of the substrate 10 could be removed.

Next, the substrate 10 was transported to the MBE chamber 32 by the magnet feedthrough 36b. As shown in FIG. 1(a), Ga
The As buffer layer 11 has a thickness of 082 μm, Ap x Ga,
-, AS cladding layer 12 (0<x<1) by 1.2μ■
, and GaAs guide layer 13 were continuously grown to a thickness of 0.2 μm. This wafer 14 was transferred to the sample exchange chamber 34 connected to the MBE chamber 32 by an ultra-high vacuum passage, and to the film forming chamber 31 using a magnetic feedthrough 36b or the like.

The film forming chamber 31 is evacuated by a vacuum pump (not shown) such as a turbo-molecular pump or an ion pump, and the residual gas pressure is maintained at I x 10-'Torr or less.

Next, high-purity H2S, which is a first gas, is added to this film-forming chamber 31.
A gas 51 was introduced at a partial pressure of I.times.10-'Torr or more, and halogen lamp light 52 was irradiated onto the surface of the wafer 14, as shown in FIG. 1(b). At this time, the light irradiation energy density on the wafer 14 was set to 50 J/c-. This halogen lamp light 52 was focused onto the surface of the wafer 14 by the exposure unit 37 shown in FIG. Through this operation, a sulfide film 15 was formed on the GaAs guide layer 13. The density and thickness of the sulfide film 15 on the surface could be controlled by the light irradiation energy density and the H2S pressure.

Subsequently, the pressure in the film forming chamber 31 is increased to IX using a vacuum pump.
After evacuation to below 10-' Torr, the wafer 14 with the sulfide layer 15 on its surface was transferred to the etching chamber 33.

The wafer 14 transferred to the etching chamber 33 is attached to a wafer holder (not shown), the temperature is set to 70° C. by the heater 44, and the nozzle 4 is placed inside the etching chamber 33.
From No. 3, chlorine gas 53, which is a second gas, was introduced. The chlorine gas 53 is introduced in such a way that the wafer surface is irradiated broadly over a range of several mm in diameter. At this time, the pressure inside the etching chamber rose to 1 x 10-'Torr.

Simultaneously with the introduction of chlorine gas 53, the surface of wafer 14 was irradiated with electron beam 41. This electron beam 41 has a diameter of 50nm and a current of 10pA of 150nm.
It was scanned to draw a m-wide line and space pattern. The sulfide film 15 formed on the surface of the wafer 14 was separated from the surface of the wafer 14 only in the portions irradiated with both the chlorine gas 53 and the electron beam 41. That is, a line and space pattern was formed on the sulfide film 15 according to the scanning of the electron beam.

Subsequently, when the electron beam irradiation is stopped, the wafer 14
As shown in FIG. 1(c), only the removed portion of the sulfide film 15 was etched with chlorine gas. This etching with chlorine gas not only affects the uppermost GaAs guide layer 13 but also the lower AjlGaAs cladding layer 1.
2, and the etching rate was almost the same for both the GaAs layer 13 and the AjJGaAs layer 12.

In this example, a mask layer is formed by irradiating the surface of a compound semiconductor substrate with a first gas, and then pattern formation and etching are performed using a second gas and an electron beam, so crystal defects are generated near the surface of the compound semiconductor. Fine patterns can be formed without causing

Next, in this way, the GaAs guide layer 13 and the A
The wafer 14 having the pattern on the jJGaAs cladding layer 12 was transported to the MBE chamber 32 again. MBE room 32
The surface of the wafer 14 transported was heated to 550° C. or higher while irradiating the surface with an arsenic molecular beam, and the surface was cleaned for about 1 hour.

This surface cleaning removes the patterned surface oxide film 15 and the GaAs layer 13 and AlGa layer during etching.
Chlorine compounds and the like adhering to the surface of the As layer 12 were removed, making it possible to obtain a pure crystal surface. (Reflection electron diffraction (RHEED) is used to monitor the degree of cleaning.
) method was used. ) In this example, since a clean surface is obtained in this way, an epitaxial growth layer can be formed on the surface.

Subsequently, ADI Ga1-i As upper cladding layer 1
6 to 1.5 urs GaAs anti-oxidation layer 17 to 0
．． It was grown to 1 μm. In this way, a desired buried structure as shown in FIG. 1(d) was obtained without removing the wafer from the ultra-high vacuum apparatus into the atmosphere.

As described above, in this example, all steps were performed in a vacuum vessel, so that the uniformity, controllability, and reproducibility of etching could be improved.

In this example, a case was described in which H2S was used as the gas (first gas) for forming a mask on the surface of a compound semiconductor substrate, but instead of H2S, arsenic, phosphorus, sulfur, selenium, A similar effect could be obtained by using a gas containing at least one of oxygen, a gaseous compound containing oxygen, and gaseous ammonia.

Further, in this example, chlorine gas was used as the second gas, but the same result can be obtained by using a gas containing at least one gas among halogen, halogen compound, V group hydride, hydrogen, and these radicals. It worked.

Next, a second embodiment will be described with reference to FIG.

FIG. 2 shows a schematic diagram of the process. The equipment used here is the same as in the first example.

First, the InP substrate 21 is carried into the MBE chamber 32, and the surface of the InP substrate 21 is coated with InGaAsPGaA using gas source MBE.
Thirteen s-layers were grown. This wafer 23 is placed in a film forming chamber 31.
As shown in FIG. 2(a), H2S gas 51 was introduced at an introduction pressure of 5 mTorr as in the first embodiment, and a light beam 52 was irradiated, as shown in FIG. 2(b). A surface sulfide film 24 was formed.

The 1nP wafer 23 with the sulfide film 24 formed on the surface of the wafer 23 in this manner was transferred to the etching chamber 33. The actual etching conditions in this example were as follows. That is, the substrate temperature was 300°C and the etching gas was 5°C.
Bromine:hydrogen-1:10 (temperature increased to 350<0>C) was used as 4. The electron beam was scanned to form a grating (line and space pattern) with a width of 20 Onm.

By this etching, the sulfide film 24 in the area irradiated with the electron beam is removed as shown in FIG.
I was able to perform etching.

In this embodiment, as in the first embodiment, fine processing can be performed without causing crystal defects.

Subsequently, similarly to the first embodiment, the wafer 23 is subjected to MBE.
The sample was transferred to a chamber 32, and the sulfide film 24 was removed.

Thereafter, an InGaAsP active layer 25, an InP confinement layer 26, and an InGaAsP:y contact layer 27 were crystal-grown.

As a result, a mesa was formed in the electron beam irradiation area as shown in FIG. 2(d). In this etching, the etching depth of the portion irradiated with the electron beam was about 0.3 μm, and the etched surface was a mirror surface.

Note that the present invention is not limited to the above embodiments,
InAs and InSb as semiconductor materials.

GaP, InGaAIP, Aj! A compound semiconductor such as GaSb may also be used.

[Effects of the Invention] According to the present invention, a first step of forming a mask layer by irradiating the surface of a compound semiconductor with a first gas, and patterning the mask layer by irradiating the surface of a compound semiconductor with a second gas and an electron beam. a second step in which the compound semiconductor is etched with a second gas; and a third step in which the compound semiconductor is heated in a reduced pressure atmosphere containing group V elements.
By performing the step and the fourth step of crystal growth in a vacuum container, the compound semiconductor can be grown in a controlled atmosphere without exposing it to the atmosphere during a series of substrate processing and crystal growth processes. It is possible to suppress the surface contamination of the compound semiconductor or the incorporation of impurities at the interface.

Further, since the compound semiconductor substrate can be processed and grown within one apparatus without being exposed to the atmosphere, time for cleaning the semiconductor surface, etc. can be omitted.

Furthermore, compared to wet etching, there are fewer steps and processing time can be shortened.

[Brief explanation of drawings]

FIG. 1 is a process diagram of a first embodiment of the pattern forming method of the present invention, FIG. 2 is a process diagram of the second embodiment of the pattern forming method of the present invention, and FIG. A schematic diagram of the vacuum system used in the process of the second example,
FIG. 4 is a perspective view of the etching chamber of FIG. 3. 10...GaAs substrate, 1l-GaAs buffer layer, 12''・AINGal-mA
S cladding layer, 13...GaAs guide layer, 14.
...Wafer 15...Sulfide film, 16...A J
m Ga H4As upper cladding layer, 17...G
aAs oxidation prevention layer, 21...InP substrate, 22.=I
nGaAsP layer, 23-... Wafer 24... Sulfide film, 25... InGaAsP active layer. 26- I n P confinement layer, 27 = -1nGaAs
P contact layer, 30... Sample heating chamber, 31... Film forming chamber. 311... Window, 32... MBE room, 33... Etching room, 34... Sample exchange room, 35a, 35b, 3
5c...Gate valve, 36a, 36b, 36c...
・Magnetic feedthrough, 37...Exposure unit. 38... Second gas introduction section, 39... Manipulator. 41... Electron beam, 42... GaAs substrate, 43
... Gas nozzle, 44 ... Heater, 45 ... Current introduction terminal, 51 ... H2S gas, 52 ... Halogen lamp light. 53...Chlorine gas, 54...Etching gas. Figure 1 Figure 3 Figure 2 Figure 4

Claims (1)

[Claims] 1. A first step of forming a mask layer by irradiating the surface of the III-V compound semiconductor substrate with a first gas;
The surface of the group V compound semiconductor substrate is irradiated with a second gas different from the first gas and an electron beam to form a pattern on the mask layer, and the second gas is irradiated to form the group III-V compound semiconductor. a second step of etching the substrate to form a predetermined pattern; and a second step of etching the substrate to form a predetermined pattern;
A third step of removing the mask layer by heating the compound semiconductor in an atmosphere where the pressure of the group element is 10^-^7 Torr or more.
and a fourth step of growing a crystal growth layer on the surface of the compound semiconductor by an epitaxial method.
A method for forming a structure of a III-V compound semiconductor, characterized in that the method is carried out continuously in a plurality of vacuum vessels as follows. 2. As the first gas, arsenic, phosphorus, sulfur, selenium,
2. The method for forming a III-V compound semiconductor structure according to claim 1, wherein a gas containing at least one of oxygen, a gaseous compound containing oxygen, and gaseous ammonia is used. 3. The second gas is a halogen, a halogen compound, V
3. The method for forming a III-V compound semiconductor structure according to claim 1, wherein the gas is a gas containing at least one of a group hydride, hydrogen, and a radical thereof. 4. Claims 1 and 2, wherein the second step is performed while heating the III-V group compound semiconductor substrate.
and the method for forming a structure of a III-V compound semiconductor according to 3. 5. An MBE chamber for crystal growth, a film formation chamber for forming a thin film on the surface of a semiconductor sample, and an etching chamber for etching the semiconductor sample, each of which is connected via a passageway equipped with a gate valve. A sample exchange chamber, a magnet feedthrough for moving the semiconductor sample from the sample exchange chamber to each chamber, and the MBE chamber, the film forming chamber, the etching chamber, and the sample exchange chamber are each independently evacuated. 1. A connected multi-vacuum container device characterized by comprising a vacuum device capable of activating the state.