JPH03194401A - Semiconductor strain detecting circuit - Google Patents

Semiconductor strain detecting circuit

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Publication number
JPH03194401A
JPH03194401A JP33423189A JP33423189A JPH03194401A JP H03194401 A JPH03194401 A JP H03194401A JP 33423189 A JP33423189 A JP 33423189A JP 33423189 A JP33423189 A JP 33423189A JP H03194401 A JPH03194401 A JP H03194401A
Authority
JP
Japan
Prior art keywords
temperature
circuit
strain
bridge circuit
strain detecting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33423189A
Other languages
Japanese (ja)
Inventor
Junichi Takahashi
淳一 高橋
Hiroyuki Horiguchi
堀口 浩幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP33423189A priority Critical patent/JPH03194401A/en
Publication of JPH03194401A publication Critical patent/JPH03194401A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To attain accurate temperature compensation with simple constitution by offsetting temperature variation in voltage developed across a temperature insensitive element against the temperature characteristics of a strain detecting element. CONSTITUTION:The semiconductor strain detecting circuit 7 is constituted by composing a bridge circuit 9 of strain detecting elements R1-R2 and connecting the temperature insensitive element Rx which does not vary in resistance value with temperature to the circuit 9 in parallel. Then a constant current source 10 is connected to the circuit 9, which is driven to output a voltage V0. Consequently, the temperature variation of the temperature insensitive element Rx is offset against the temperature characteristics of the strain gauges R1-R4 to perform the temperature compensation of output sensitivity DELTAV0.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、半導体歪検出素子を備えた半導体歪検出回路
に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor strain detection circuit equipped with a semiconductor strain detection element.

従来の技術 従来、歪検出素子を備えた半導体歪検出回路は、その技
術が種々の分野で応用されている。その第一の例として
、歪検出素子(以下、歪ゲージと呼ぶ)をSi(シリコ
ン)基板のダイヤフラム上に形成し、これらの各歪ゲー
ジによりホイーストンブリッジ回路を構成して圧力セン
サを作り、これを各種圧力の測定に応用するものである
。第10図は、それら歪ゲージR1〜R1を用いてブリ
ッジ回路1を構成したものを示すものであり、定電流源
2により駆動するようになっている。この時、出力へV
は、 ΔV=GRε 工   ・・・ (1)となる。
2. Description of the Related Art Conventionally, the technology of semiconductor strain detection circuits equipped with strain detection elements has been applied in various fields. As a first example, strain sensing elements (hereinafter referred to as strain gauges) are formed on a diaphragm of a Si (silicon) substrate, and each of these strain gauges constitutes a Wheatstone bridge circuit to create a pressure sensor. This is applied to the measurement of various pressures. FIG. 10 shows a bridge circuit 1 constructed using these strain gauges R1 to R1, and is driven by a constant current source 2. At this time, V to the output
is ΔV=GRε engineering (1).

ただし、G:ゲージ率 R:無歪時の歪ゲージの抵抗 工:電流値 これより、一定の歪εに対するΔV(すなわち、感度)
の温度特性はGとRとの温度特性により決まる(■は定
電流源で一定)。第11図は、定電流源2で駆動させた
場合における感度温度係数と表面不純物濃度との関係を
示すものである。この場合、Gは負のゲージ率温度係数
をもち、Rは正の抵抗温度係数をもつので、表面不純物
濃度を、2 X 10”atoms/cm’又は2 X
 10 ”ato[Ils/ Cmと設定することによ
り両者を相殺させ、Δ■の温度変動を小さくすることが
できる。
However, G: Gauge factor R: Resistance factor of strain gauge at no strain: Current value From this, ΔV for a constant strain ε (i.e., sensitivity)
The temperature characteristics of are determined by the temperature characteristics of G and R (■ is constant due to constant current source). FIG. 11 shows the relationship between the temperature coefficient of sensitivity and the surface impurity concentration when driven by the constant current source 2. In this case, G has a negative gauge factor temperature coefficient and R has a positive resistance temperature coefficient, so the surface impurity concentration is 2 X 10"atoms/cm' or 2 X
By setting 10''ato[Ils/Cm, the two can be canceled out and the temperature fluctuation of Δ■ can be reduced.

発明が解決しようとする課題 第12図は、第10図のようにブリッジ回路1を定電流
源2で駆動させた場合における35℃の感度を基準にし
た感度変化率と周囲温度との関係を示すものである。こ
れより、0〜45℃の温度範囲ならば±0.3%程の感
度変動で納まるが。
Problem to be Solved by the Invention Figure 12 shows the relationship between the rate of change in sensitivity and the ambient temperature based on the sensitivity at 35°C when the bridge circuit 1 is driven by the constant current source 2 as shown in Figure 10. It shows. From this, if the temperature range is 0 to 45°C, the sensitivity fluctuation will be within ±0.3%.

−20〜80℃の広い温度範囲においては±1%以上の
変動をしてしまう。このような変動特性をもつ圧力セン
サを一20℃〜80℃の温度範囲において高い測定精度
を要求される装置、特に、その測定精度上、変動範囲を
±0.3 %以下に抑えなければいけないような装置に
応用したような場合、上述したような互いに相殺させて
温度補償を行う方法ではその要求に応えることができな
い。
In a wide temperature range of -20 to 80°C, it fluctuates by more than ±1%. Pressure sensors with such fluctuation characteristics are used in equipment that requires high measurement accuracy in the temperature range of -20°C to 80°C, and in particular, the fluctuation range must be suppressed to ±0.3% or less due to the measurement accuracy. When applied to such a device, the above-mentioned method of performing temperature compensation by canceling each other out cannot meet the requirements.

そこで、従来においては、このような問題に対処するた
めの一手段として、特公昭59−41134号公報に開
示されているような方法がある。
Conventionally, there is a method disclosed in Japanese Patent Publication No. 59-41134 as a means for dealing with such problems.

すなわち、第13図に示すように、歪ゲージR0〜R4
を用いてブリッジ回路2を構成する圧力変換回路3を定
電圧で駆動させるものである。この場合、歪ゲージR1
〜R1と同じ工程により形成した感温抵抗Rpを増幅回
路の帰還部に温度不感抵抗Roと並列になるように接続
することにより温度補償を行い、これにより出力感度の
温度による変動の割合を抑えている。なお、この時の歪
ゲージR1〜Rい感温抵抗Rpの表面不純物濃度は、2
 X I O1t〜8 X 1017atoms/cm
’のものを用いている。しかし、この場合、第13図に
示したように複雑な回路が必要となり、また、第14図
に示すように、その感温抵抗Rpはシリコン基板4に形
成されたダイヤフラム5の周囲の歪不感部6に設ける必
要があり、従って、これによりその基板の作製工程が非
常に面倒なものとなるという問題がある。
That is, as shown in FIG. 13, strain gauges R0 to R4
is used to drive the pressure conversion circuit 3 constituting the bridge circuit 2 with a constant voltage. In this case, strain gauge R1
Temperature compensation is performed by connecting the temperature-sensitive resistor Rp formed by the same process as ~R1 to the feedback section of the amplifier circuit in parallel with the temperature-insensitive resistor Ro, thereby suppressing the rate of change in output sensitivity due to temperature. ing. Note that the surface impurity concentration of the strain gauges R1 to Rp at this time is 2
X I O1t ~ 8 X 1017 atoms/cm
' is used. However, in this case, a complicated circuit is required as shown in FIG. 13, and as shown in FIG. Therefore, there is a problem in that the manufacturing process of the substrate becomes extremely troublesome.

課題を解決するための手段 本発明は、基板の表面に歪検出素子が形成され、これら
歪検出素子をブリッジ回路に結線することによりその基
板に発生する歪の検出を行う半導体歪検出回路において
、前記歪検出素子と温度に対して抵抗値の変化しない温
度不感素子をそのブリッジ回路に並列に接続し、その温
度不感素子を備えた前記ブリッジ回路に定電流源を接続
して駆動するようにした。
Means for Solving the Problems The present invention provides a semiconductor strain detection circuit in which strain detection elements are formed on the surface of a substrate, and the strain generated on the substrate is detected by connecting these strain detection elements to a bridge circuit. The strain sensing element and a temperature-insensitive element whose resistance value does not change with temperature are connected to the bridge circuit in parallel, and a constant current source is connected to the bridge circuit provided with the temperature-insensitive element to drive it. .

作用 このように温度不感素子をブリッジ回路に並列に接続し
定電流源で駆動させ、温度不感素子の両端に現われる電
圧の温度変化(正特性)と歪検出素子の感度温度特性(
負特性)とを相殺させることにより、広い温度範囲(−
20〜80’C)に渡って出力感度の変動を抑えること
が可能となり、これより単純な構成で精度の良い温度補
償を行うことができる。
Operation In this way, the temperature-insensitive element is connected in parallel to the bridge circuit and driven by a constant current source, and the temperature change (positive characteristic) of the voltage appearing across the temperature-insensitive element and the sensitivity temperature characteristic of the strain detection element (
By offsetting the negative characteristics), a wide temperature range (-
It becomes possible to suppress fluctuations in output sensitivity over a temperature range of 20 to 80'C), and more accurate temperature compensation can be performed with a simpler configuration.

実施例 本発明の第一の実施例を第1図ないし第7図に基づいて
説明する。第1図は、無歪時における本回路の構成を示
したものである。すなわち、この半導体歪検出回路7は
、歪検出素子R1〜R4(以下、歪ゲージ8と呼ぶ)を
用いてブリッジ回路9を構成している。このブリッジ回
路9にはこれと並列に、温度に対して抵抗値の変化しな
い温度不感素子Rxが接続されている。このように温度
不感素子Rxが並列に接続されたブリッジ回路9は定電
流源10と接続され、これにより駆動されて出力電圧を
V、とじて出力する。
Embodiment A first embodiment of the present invention will be described with reference to FIGS. 1 to 7. FIG. 1 shows the configuration of this circuit without distortion. That is, this semiconductor strain detection circuit 7 constitutes a bridge circuit 9 using strain detection elements R1 to R4 (hereinafter referred to as strain gauges 8). A temperature-insensitive element Rx whose resistance value does not change with temperature is connected in parallel to this bridge circuit 9. The bridge circuit 9 in which the temperature-insensitive elements Rx are connected in parallel is connected to a constant current source 10, and is driven by the constant current source 10 to output an output voltage of V.

第3図は、基板としてのn型のSi基板11の断面形状
を示すものである。その基板表面には、歪ゲージ8がイ
オン注入法等によりボロン等を拡散して形成されている
。その表面不純物濃度Csは2 X 10”〜l 、 
5 X 10”atoms/cm’ であり、これは、
拡散工程の条件により制御して形成することができる。
FIG. 3 shows a cross-sectional shape of an n-type Si substrate 11 as a substrate. A strain gauge 8 is formed on the surface of the substrate by diffusing boron or the like by ion implantation or the like. Its surface impurity concentration Cs is 2×10”~l,
5 x 10"atoms/cm', which is
The formation can be controlled by the conditions of the diffusion process.

ただし、第1図において、抵抗R1〜R4はすべて等し
く抵抗値Rをもつものとし、この時、ブリッジ全体の抵
抗値もRとなる。
However, in FIG. 1, it is assumed that all the resistors R1 to R4 have the same resistance value R, and at this time, the resistance value of the entire bridge also becomes R.

このような構成において、今、第2図に示すように、抵
抗R1〜R4がΔR4〜ΔR4だけ変化したものと仮定
する。この場合、ΔR8〜ΔR1はほぼ等しくΔRで代
表される。従って、第2図中のΔR5と一ΔR4、−Δ
R1とΔR2は相殺され、これにより歪が加わった時の
ブリッジ全体の抵抗値もRとなる。
In such a configuration, it is now assumed that the resistances R1 to R4 have changed by ΔR4 to ΔR4, as shown in FIG. In this case, ΔR8 to ΔR1 are approximately equally represented by ΔR. Therefore, ΔR5 and -ΔR4, -Δ
R1 and ΔR2 cancel each other out, so that the resistance value of the entire bridge when strain is applied also becomes R.

そして、このような状態において、出力■。に現われる
ΔV。(出力感度)は、 G・ε・Ra・■ ・・(2) として表わすことができる。
In such a state, the output ■. ΔV appearing in (Output sensitivity) can be expressed as G・ε・Ra・■ (2).

今、C5=9X10” a toms / cm’の時
のG(ゲージ率)、Rの温度特性を第4図、第5図に示
す。
Now, the temperature characteristics of G (gauge factor) and R when C5=9X10"a toms/cm' are shown in FIGS. 4 and 5.

なお、基準温度T=30℃を基準とした比率で示してい
る。
Note that the ratio is shown based on the reference temperature T=30°C.

この(2)式より一定のεに対する八■。はGとRaで
定まる(ε、■は一定である)ことがわかり、これによ
り、その温度特性もGとRaの積で定まる。そこで、−
20℃〜80”Cの範囲のGRaが等しくなるようにR
xを定めた。すなわち、G(−20) Ra (−20
) G(80) Ra (80) ・・(4) であるから、 これより、 Rxは、 この(6)式で定めたRxをブリッジ回路(抵抗値R)
と並列に接続した時のRaの温度特性の測定結果を第6
図に示す。そして、そのRxを第1図に示したようにブ
リッジ回路に接続し、定電流工で駆動した時の八■。の
温度特性を一7図に示す。従って、これにより、−20
℃〜80℃の広い温度範囲で、±0.3  %以下の変
動になっていることがわかる。なお、第7図の特性結果
は、(2)式から予想されるG (T) Ra (T)
の温度特性とほぼ一致した。
From this equation (2), 8■ for a constant ε. It can be seen that is determined by G and Ra (ε and ■ are constant), and therefore, its temperature characteristics are also determined by the product of G and Ra. Therefore, −
R so that the GRa in the range of 20°C to 80”C is equal.
We determined x. That is, G (-20) Ra (-20
) G (80) Ra (80) ... (4) Therefore, from this, Rx is Rx determined by this formula (6) in a bridge circuit (resistance value R
The measurement results of the temperature characteristics of Ra when connected in parallel with
As shown in the figure. Then, as shown in Figure 1, the Rx is connected to a bridge circuit and driven by a constant current generator. Figure 17 shows the temperature characteristics of . Therefore, this gives -20
It can be seen that the fluctuation is less than ±0.3% over a wide temperature range from ℃ to 80℃. Note that the characteristic results in FIG. 7 are G (T) Ra (T) expected from equation (2).
The temperature characteristics were almost the same as those of .

上述したように、抵抗Rのブリッジ回路に温度不感素子
Rxを並列に接続し、定電流■を流し、Viの温度変化
(正特性)と歪ゲージR1〜R4の感度温度特性(負特
性)とを相殺させることにより、出力感度Δ■。の温度
補償を行うことができる。また、この他に、表面不純物
濃度Csの値が2X10′7〜1.5X10”の間で同
様の手順によりRxを定め、第1図のような構成とする
ことにより、ΔV0の温度変動を±0.3%以下に抑え
ることができた。
As mentioned above, the temperature-insensitive element Rx is connected in parallel to the bridge circuit of the resistor R, and a constant current ■ is caused to flow, and the temperature change of Vi (positive characteristic) and the sensitivity temperature characteristic of strain gauges R1 to R4 (negative characteristic) are calculated. By canceling out the output sensitivity Δ■. Temperature compensation can be performed. In addition, by determining Rx using the same procedure when the value of the surface impurity concentration Cs is between 2X10'7 and 1.5X10'', and configuring the configuration as shown in Fig. 1, the temperature fluctuation of ΔV0 can be suppressed by ± We were able to suppress it to 0.3% or less.

次に、本発明の第二の実施例を第8図及び第9図に基づ
いて説明する。今、第一の実施例と同様に、第8図の無
歪時においてR,=R,=Rとし、第9図に示すような
歪が加わることによりR1、R2の値が変化する。この
時ΔR,=八R,=ΔRaとすると、2つの歪ゲージの
直列抵抗の抵抗値は歪との有無にかかわらず2Rとなる
。この場合、歪εによりvo に現われる出力ΔV。は
、と表わすことができる。
Next, a second embodiment of the present invention will be described based on FIGS. 8 and 9. Now, as in the first embodiment, when there is no distortion in FIG. 8, R,=R,=R, and when distortion is applied as shown in FIG. 9, the values of R1 and R2 change. At this time, if ΔR, = 8R, = ΔRa, then the resistance value of the series resistor of the two strain gauges will be 2R regardless of the presence or absence of strain. In this case, the output ΔV appearing at vo due to the strain ε. can be expressed as.

また、Viは、 ■1 I(2R/2Rx) となる。Also, Vi is ■1 I (2R/2Rx) becomes.

ここで、(3)式の関係から(9)式は、=G・ε・R
a・■        ・・・(10)と変形すること
ができる。
Here, from the relationship of equation (3), equation (9) becomes =G・ε・R
It can be transformed as a・■...(10).

これにより、この(10)式は(2)式と等しくなるこ
とがわかる。従って、本実施例の場合にも、第一の実施
例と同様に、歪ゲージ8の表面不純物濃度、Rxを定め
ることによって一20〜80℃の範囲で±0.3%以下
に出力感度の温度変動を抑えることができる。
This shows that the equation (10) is equal to the equation (2). Therefore, in the case of this embodiment as well, similarly to the first embodiment, by determining the surface impurity concentration, Rx, of the strain gauge 8, the output sensitivity can be kept below ±0.3% in the range of -20 to 80°C. Temperature fluctuations can be suppressed.

なお、これまで述べた実施例は、いずれもn型Si基板
11上にP型の歪ゲージ8を拡散させた構造について述
べたがこれに限るものではなく、この他にP型Si基板
上にn型の歪ゲージ8を拡散させた場合においても適当
な表面不純物濃度において同様の温度補償法を適用する
ことができる。
In the embodiments described so far, the structure in which the P-type strain gauge 8 is diffused on the n-type Si substrate 11 has been described, but the structure is not limited to this. Even when the n-type strain gauge 8 is diffused, the same temperature compensation method can be applied at an appropriate surface impurity concentration.

また、拡散型の歪ゲージ8のみならず、バルクの単結晶
Si歪ゲージ、多結晶シリコン、無定形シリコン等の薄
膜半導体歪ゲージにも適用することができる。さらに、
化合物半導体を用いた歪ゲージにも適用することができ
る。
Further, the present invention can be applied not only to the diffusion type strain gauge 8 but also to thin film semiconductor strain gauges such as bulk single crystal Si strain gauges, polycrystalline silicon, amorphous silicon, and the like. moreover,
It can also be applied to strain gauges using compound semiconductors.

発明の効果 本発明は、基板の表面に歪検出素子が形成され、これら
歪検出素子をブリッジ回路に結線することによりその基
板に発生する歪の検出を行う半導体歪検出回路において
、前記歪検出素子と温度に対して抵抗値の変化しない温
度不感素子をそのブリッジ回路に並列に接続し、その温
度不感素子を備えた前記ブリッジ回路に定電流源を接続
して駆動するようにしたので、このように温度不感素子
をブリッジ回路に並列に接続し定電流源で駆動させ、温
度不感素子の両端に現われる電圧の温度変化(正特性)
と歪検出素子の感度温度特性(負特性)とを相殺させる
ことにより、広い温度範囲(−20〜80℃)に渡って
出力感度の変動を抑えることが可能となり、これにより
単純な構成で精度の良い温度補償を行うことができるも
のである。
Effects of the Invention The present invention provides a semiconductor strain detection circuit in which strain detection elements are formed on the surface of a substrate, and which detects strain generated on the substrate by connecting these strain detection elements to a bridge circuit. A temperature-insensitive element whose resistance value does not change with respect to temperature is connected in parallel to the bridge circuit, and a constant current source is connected to the bridge circuit equipped with the temperature-insensitive element to drive it. A temperature-insensitive element is connected in parallel to a bridge circuit and driven by a constant current source, and the voltage that appears across the temperature-insensitive element changes with temperature (positive characteristic).
By offsetting the sensitivity temperature characteristic (negative characteristic) of the strain detection element, it is possible to suppress fluctuations in output sensitivity over a wide temperature range (-20 to 80 degrees Celsius), and this makes it possible to improve accuracy with a simple configuration. It is possible to perform good temperature compensation.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の第一の実施例を示す回路図、第2図は
その回路に歪が発生した時の様子を示す回路図、第3図
はシリコン基板の縦断側面図、第4図はゲージ率Gの温
度特性を示す特性図、第5図は抵抗値Rの温度特性を示
す特性図、第6図は抵抗値Raの温度特性を示す特性図
、第7図は出力V。の温度特性を示す特性図、第8図は
本発明の第二の実施例を示す回路図、第9図はその回路
に歪が発生した時の様子を示す回路図、第10図は従来
におけるブリッジ構成を示す回路図、第11図は感度温
度係数と表面不純物濃度との関係を示す特性図、第12
図は感度と温度との関係を示す特性図、第13図は従来
における他のブリッジ構成例を示す回路図、第14図は
その回路が形成される基板状態を示す構成図である。 8・・・歪検出素子、9・・ブリッジ回路、]O・・定
電流源、11・・シリコン基板、Rx・・・温度不感素
子 出 願 人    株式会社 リ コ 3 / 図 T(”C) − T(’C) − T(”の 」」」 図 JD、IZ図 Jai1口! T (@C) J JIi俤 珪
Fig. 1 is a circuit diagram showing the first embodiment of the present invention, Fig. 2 is a circuit diagram showing the situation when distortion occurs in the circuit, Fig. 3 is a longitudinal cross-sectional side view of the silicon substrate, and Fig. 4 5 is a characteristic diagram showing the temperature characteristic of the gauge factor G, FIG. 5 is a characteristic diagram showing the temperature characteristic of the resistance value R, FIG. 6 is a characteristic diagram showing the temperature characteristic of the resistance value Ra, and FIG. 7 is a characteristic diagram showing the temperature characteristic of the resistance value R. FIG. 8 is a circuit diagram showing the second embodiment of the present invention, FIG. 9 is a circuit diagram showing the state when distortion occurs in the circuit, and FIG. 10 is a conventional circuit diagram. Figure 11 is a circuit diagram showing the bridge configuration, Figure 11 is a characteristic diagram showing the relationship between sensitivity temperature coefficient and surface impurity concentration, Figure 12 is
FIG. 13 is a characteristic diagram showing the relationship between sensitivity and temperature, FIG. 13 is a circuit diagram showing another conventional bridge configuration example, and FIG. 14 is a configuration diagram showing the state of the substrate on which the circuit is formed. 8... Strain detection element, 9... Bridge circuit, ]O... Constant current source, 11... Silicon substrate, Rx... Temperature insensitive element Applicant Rico Co., Ltd. 3 / Figure T ("C) - T ('C) - T ("の"") Figure JD, IZ Figure Jai1口! T (@C) J JIi俤珪

Claims (1)

【特許請求の範囲】[Claims] 基板の表面に歪検出素子が形成され、これら歪検出素子
をブリッジ回路に結線することによりその基板に発生す
る歪の検出を行う半導体歪検出回路において、前記歪検
出素子と温度に対して抵抗値の変化しない温度不感素子
を前記ブリッジ回路に並列に接続し、その温度不感素子
を備えた前記ブリッジ回路に定電流源を接続し駆動する
ようにしたことを特徴とする半導体歪検出回路。
In a semiconductor strain detection circuit in which strain detection elements are formed on the surface of a substrate, and the strain generated in the substrate is detected by connecting these strain detection elements to a bridge circuit, the resistance value of the strain detection element and the temperature are determined. A semiconductor strain detection circuit characterized in that a temperature-insensitive element that does not change is connected in parallel to the bridge circuit, and a constant current source is connected and driven to the bridge circuit including the temperature-insensitive element.
JP33423189A 1989-12-22 1989-12-22 Semiconductor strain detecting circuit Pending JPH03194401A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33423189A JPH03194401A (en) 1989-12-22 1989-12-22 Semiconductor strain detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33423189A JPH03194401A (en) 1989-12-22 1989-12-22 Semiconductor strain detecting circuit

Publications (1)

Publication Number Publication Date
JPH03194401A true JPH03194401A (en) 1991-08-26

Family

ID=18275014

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33423189A Pending JPH03194401A (en) 1989-12-22 1989-12-22 Semiconductor strain detecting circuit

Country Status (1)

Country Link
JP (1) JPH03194401A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020085490A (en) * 2018-11-16 2020-06-04 Tdk株式会社 Strain detection element and dynamic quantity sensor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020085490A (en) * 2018-11-16 2020-06-04 Tdk株式会社 Strain detection element and dynamic quantity sensor

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