JPH0319387A - Hybrid integrated circuit - Google Patents

Hybrid integrated circuit

Info

Publication number
JPH0319387A
JPH0319387A JP15485589A JP15485589A JPH0319387A JP H0319387 A JPH0319387 A JP H0319387A JP 15485589 A JP15485589 A JP 15485589A JP 15485589 A JP15485589 A JP 15485589A JP H0319387 A JPH0319387 A JP H0319387A
Authority
JP
Japan
Prior art keywords
conductor
resistor
protective glass
glass film
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15485589A
Other languages
Japanese (ja)
Inventor
Nobuo Mayumi
真弓 伸夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP15485589A priority Critical patent/JPH0319387A/en
Publication of JPH0319387A publication Critical patent/JPH0319387A/en
Pending legal-status Critical Current

Links

Landscapes

  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To protect an integrated circuit of this design from malfunction even if a conductor is disconnected near the end face of a protective glass film by a method wherein a part of a conductor continuously formed on a substrate covered with a protective glass film and an exposed part of the conductor which serves as a component mounting section are connected to each other with a resistor formed on the substrated concerned. CONSTITUTION:A conductor pattern 2 is formed on a ceramic substrate 1 to constitute a thick film circuit, and a protective glass film 3 is formed covering the conductor 2. The conductor 2 and the protective glass film 3 are formed respectively in such a manner that Ag conductive paste and glass paste are printed and burned. The protective glass film 3 is not formed on a component mounting section 2A of the conductor 2 so as to make it exposed. A resistor 6 or Ru resistor paste is previously printed and burned under the conductors 2A and 2B near the end face 3A of the glass film 3. By this constitution, even if corrosion 7 advances from the end face 3A of the glass protective film 3 to make the conductor 2 disconnected, electrical conduction can be secured by the lower resistor 6 at a resistance value of a few to hundreds of OMEGA.

Description

【発明の詳細な説明】 「産業上の利用分野」 本発明は混成s81回路に関する. 「従来の技術』 混成集積回路では基板上に形成された厚膜又は薄膜回路
を保護するため、ガラスコーティングが施される.しか
し、第3図に示す様に、基板1上に形成された導休2の
うち、モノシリックIC,トランジスタ等の部品5のリ
ードがはんだ付される部分、すなわち部品搭載部2人は
露出しておかなければならない.この保護ガラス膜3か
ら露出した導体2の部品搭載部2人は、最終的には部晶
5の搭載によりはんだ4で覆われるようにされる.「発
明が解決しようとする課題」 しかしながら、保護ガラス膜3はガラスペーストを印刷
焼成して形成されるため、保護ガラス脛3の端面3Aで
はガラスがだれやすい.このため、保護ガラス肢3の端
面3A付近においてはんだ4が導体2に十分になじまず
、導体2が露出することがある.導体2ははんだ特性の
良好さからAg(銀)系導体が多く用いられるが、Ag
系導体2は特定環境下では腐食されやすい性質を有する
.それ故、高温高湿の璋境下にさらされたり、腐食性ガ
スにさらされるなどすると、保護ガラス膜3の端面3A
の微細な露出箇所から導体2の腐食7が進み、導体2の
断核に至ることがあるという問題点があった. 本発明は上記の問題点に鑑みなされたものであり、その
目的とするところは、かかる保護ガラス農端面3A付近
における導休2の断線が生じても、機能不良とならない
混成集積回路を提供することにある. 「課題を解決するための手段」 上記の目的を達成するため、本発明では、実施例図面第
1図に例示するように、基板1上に形成された連続した
導体2の保護ガラス膜3により覆われた部分2Bと、部
品搭載部として露出された部分2Aとが、該基板1上に
形成された抵抗体6により接続されていることを特徴と
する混成集積回路が提供される. 「作用」 上記のように構成された混成集積回路では、仮に保護ガ
ラス膜3の端面3A付近で導体2が断線するに至っても
、抵抗体6により電気的導通が確保される.このため、
混戒集積回路の機能不良に至らない. 「実施例」 本発明の実施例について図面を参照し説明する.第l図
は混成集積回路の部品搭載部付近を示す断面図である. セラミック基板1上に厚膜回路を楕成する導体2のパタ
ーンが形成され、その導体2を覆うように保護ガラス膜
3が形成されている.導体2はAg系導体ペーストを印
刷焼成して形成され、保護ガラス膜3はガラスペースト
を印刷焼成して形成される.保護ガラス膜3は導体2の
部品搭載部2人の上には形成されず部品搭載部2Aが露
出するようにされる. 露出された部品搭載部2A及び保護ガラス113の端面
3A付近の導体2Bの下には、予め抵抗体6が印刷焼成
され、二層構造とされている.抵抗体6はRu系(ルテ
ニウム系)の抵抗体ペーストを印刷焼成して形成される
.従って、製造工程は、セラミック基板1上にまず、R
u系抵抗体6を印刷焼成し、次いで、Ru系抵抗体6に
一部を重ねてAg系導体2を印刷焼成し、Ik後に、部
品搭載部2人を残して保護ガラスR3を印刷焼戊ずるこ
とになる. そして、導体2の部品搭載部2Aにはんだ4が印刷又は
ディップにより乗せられ、搭載部品5のリードがリフロ
ー等によりはんだ付される.導体2の露出した部品搭載
部2Aははんだ4により覆われることになる. 本実施例は上記のように構成され、導体2のうち保護ガ
ラスWA3により覆われた部分2Bから部品搭載部2人
として保護ガラス膜3の外に露出した部分2Aに至る導
体パターンが、導体2と抵抗体6との二層楕造に形成さ
れている.このため、仮に、保護ガラス膜3の端而3A
においてはんだ4のなじみが悪く、Ag系導体2に微細
な露出箇所が生じ、そこから腐食7が進行して導体2の
断線に至っても、下層を形成するRu系抵抗体6により
数Ωから数100Ωの抵抗値で電気的導通が確保される
,Ru系抵抗体6は腐食に強いため、Ag系導体2の腐
食7がRu系抵抗体6まで進行することは考えられない
.従って、搭載部品5と厚膜回路との導通が確保される
ため、混成集積回路の機能が停止するには至らない. 前記実施例では、保護ガラス膜2に覆われた部分2Bか
ら部品搭載部2Aに至るパターンを導体2と抵抗体6と
の二層楕遣としたが、必ずしも二層構造とする必要はな
い.たとえば、第2図に示す様に、導体2と平行に基板
1上に形成された抵抗体8により、導体2の保護ガラス
膜3に覆われた部分2Bと、露出した部品WI載部2人
とを接続するようにしてもよい. 「発明の効果』 本発明は、上記のように構成され保護ガラス膜の端面の
前後において導体に接続する抵抗体を有するものである
から、保護ガラス膜端面付近において導体断線を生じて
も抵抗体により導通が確保され、混成集積回路の機能が
停止しないという効果がある.このため、信頼性の高い
混成集積回路を提供することができる.
DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to hybrid S81 circuits. "Prior Art" In hybrid integrated circuits, a glass coating is applied to protect the thick film or thin film circuits formed on the substrate.However, as shown in FIG. Of the parts 2, the part where the leads of components 5 such as monolithic ICs and transistors are soldered, that is, the component mounting area, must be exposed. The part 2 is finally covered with the solder 4 by mounting the part crystal 5. ``Problem to be Solved by the Invention'' However, the protective glass film 3 is formed by printing and firing a glass paste. Therefore, the glass tends to sag on the end surface 3A of the protective glass shank 3. For this reason, the solder 4 may not fully blend into the conductor 2 near the end surface 3A of the protective glass limb 3, and the conductor 2 may be exposed. Conductor 2 is often made of Ag (silver) based conductor due to its good solder properties.
System conductor 2 has the property of being easily corroded under certain environments. Therefore, if exposed to high temperature and high humidity conditions or corrosive gas, the end surface 3A of the protective glass film 3 may
There was a problem in that the corrosion 7 of the conductor 2 progressed from minute exposed areas, which could lead to core breakage of the conductor 2. The present invention has been made in view of the above-mentioned problems, and its purpose is to provide a hybrid integrated circuit that does not malfunction even if the conductor 2 is disconnected near the protective glass edge 3A. There is a particular thing. "Means for Solving the Problems" In order to achieve the above object, in the present invention, as illustrated in FIG. A hybrid integrated circuit is provided in which a covered portion 2B and an exposed portion 2A as a component mounting portion are connected by a resistor 6 formed on the substrate 1. "Function" In the hybrid integrated circuit configured as described above, even if the conductor 2 were to break near the end surface 3A of the protective glass film 3, the resistor 6 would ensure electrical continuity. For this reason,
Confusion does not lead to malfunction of the integrated circuit. "Example" An example of the present invention will be described with reference to the drawings. Figure 1 is a cross-sectional view showing the vicinity of the component mounting area of a hybrid integrated circuit. A pattern of conductors 2 forming an oval thick film circuit is formed on a ceramic substrate 1, and a protective glass film 3 is formed to cover the conductors 2. The conductor 2 is formed by printing and baking an Ag-based conductor paste, and the protective glass film 3 is formed by printing and baking a glass paste. The protective glass film 3 is not formed on the two component mounting portions of the conductor 2, so that the component mounting portion 2A is exposed. A resistor 6 is printed and fired in advance under the exposed component mounting portion 2A and the conductor 2B near the end surface 3A of the protective glass 113, resulting in a two-layer structure. The resistor 6 is formed by printing and firing a Ru-based (ruthenium-based) resistor paste. Therefore, in the manufacturing process, R is first placed on the ceramic substrate 1.
Print and fire the U-based resistor 6, then print and fire the Ag-based conductor 2 with a portion overlapping the Ru-based resistor 6, and after Ik, print and fire the protective glass R3, leaving two people in the component mounting section. You'll end up cheating. Then, the solder 4 is placed on the component mounting portion 2A of the conductor 2 by printing or dipping, and the leads of the mounted component 5 are soldered by reflow or the like. The exposed component mounting portion 2A of the conductor 2 is covered with solder 4. The present embodiment is constructed as described above, and the conductor pattern from the portion 2B of the conductor 2 covered by the protective glass WA3 to the portion 2A exposed outside the protective glass film 3 as the component mounting portion 2 is connected to the conductor 2. It is formed in a two-layer oval structure with a resistor element 6 and a resistor element 6. For this reason, if the end of the protective glass film 3 3A
Even if the solder 4 does not fit well and a minute exposed point is created on the Ag-based conductor 2, and corrosion 7 progresses from there and the conductor 2 is disconnected, the Ru-based resistor 6 forming the lower layer will resist resistance from several Ω to several Ω. Since the Ru-based resistor 6, which ensures electrical continuity with a resistance value of 100Ω, is resistant to corrosion, it is unlikely that the corrosion 7 of the Ag-based conductor 2 would progress to the Ru-based resistor 6. Therefore, conduction between the mounted component 5 and the thick film circuit is ensured, so that the function of the hybrid integrated circuit does not stop. In the embodiment described above, the pattern extending from the portion 2B covered with the protective glass film 2 to the component mounting portion 2A is a two-layer structure consisting of the conductor 2 and the resistor 6, but it is not necessarily necessary to have a two-layer structure. For example, as shown in FIG. 2, a resistor 8 formed on the substrate 1 in parallel with the conductor 2 separates the portion 2B of the conductor 2 covered with the protective glass film 3 and the exposed parts WI mounting part 2. You may also connect them. "Effects of the Invention" Since the present invention is configured as described above and has a resistor connected to the conductor before and after the end surface of the protective glass film, even if the conductor is disconnected near the end surface of the protective glass film, the resistor This has the effect that continuity is ensured and the function of the hybrid integrated circuit does not stop.Therefore, it is possible to provide a highly reliable hybrid integrated circuit.

【図面の簡単な説明】[Brief explanation of drawings]

第15!Uは本発明の第1の実施例を示す混成集積回路
の断面図、第2図は第2の実施例を示す平面図であり、
第3図は従来の混成集積回路を示す断面図である. 1...セラミック基板、 2,,.導体、 2A..
.部品搭載部、 3...保護ガラス膜、 3A...
端而、 4...はんだ、 5...部品、 6,8.
..抵抗体.
15th! U is a cross-sectional view of a hybrid integrated circuit showing a first embodiment of the present invention, and FIG. 2 is a plan view showing a second embodiment.
Figure 3 is a cross-sectional view of a conventional hybrid integrated circuit. 1. .. .. Ceramic substrate, 2,. Conductor, 2A. ..
.. Component mounting section, 3. .. .. Protective glass film, 3A. .. ..
In short, 4. .. .. Solder, 5. .. .. Parts, 6,8.
.. .. Resistor.

Claims (1)

【特許請求の範囲】[Claims]  基板上に形成された連続した導体の保護ガラス膜によ
り覆われた部分と、部品搭載部として露出された部分と
が、該基板上に形成された抵抗体により接続されている
ことを特徴とする混成集積回路。
A portion of a continuous conductor formed on a substrate covered by a protective glass film and a portion exposed as a component mounting portion are connected by a resistor formed on the substrate. Hybrid integrated circuit.
JP15485589A 1989-06-16 1989-06-16 Hybrid integrated circuit Pending JPH0319387A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15485589A JPH0319387A (en) 1989-06-16 1989-06-16 Hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15485589A JPH0319387A (en) 1989-06-16 1989-06-16 Hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPH0319387A true JPH0319387A (en) 1991-01-28

Family

ID=15593382

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15485589A Pending JPH0319387A (en) 1989-06-16 1989-06-16 Hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPH0319387A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5146317A (en) * 1989-08-04 1992-09-08 Matsushita Electric Industrial Co., Ltd. Signal separating apparatus
US5231479A (en) * 1989-10-25 1993-07-27 Hitachi, Ltd. Luminance/chrominance signal separation circuit having filter circuit using pulse patterns suppressing circuit
US7215021B2 (en) 2002-08-01 2007-05-08 Hitachi, Ltd. Electronic device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5146317A (en) * 1989-08-04 1992-09-08 Matsushita Electric Industrial Co., Ltd. Signal separating apparatus
US5231479A (en) * 1989-10-25 1993-07-27 Hitachi, Ltd. Luminance/chrominance signal separation circuit having filter circuit using pulse patterns suppressing circuit
US7215021B2 (en) 2002-08-01 2007-05-08 Hitachi, Ltd. Electronic device

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