JPH0319230Y2 - - Google Patents
Info
- Publication number
- JPH0319230Y2 JPH0319230Y2 JP1983099161U JP9916183U JPH0319230Y2 JP H0319230 Y2 JPH0319230 Y2 JP H0319230Y2 JP 1983099161 U JP1983099161 U JP 1983099161U JP 9916183 U JP9916183 U JP 9916183U JP H0319230 Y2 JPH0319230 Y2 JP H0319230Y2
- Authority
- JP
- Japan
- Prior art keywords
- metal plate
- lead wire
- metal plates
- opposing sides
- chips
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000002184 metal Substances 0.000 claims description 26
- 239000004065 semiconductor Substances 0.000 claims description 21
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 15
- 239000011347 resin Substances 0.000 claims description 8
- 229920005989 resin Polymers 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000020169 heat generation Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/37099—Material
- H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
【考案の詳細な説明】
本考案は樹脂封止されてなるブリツジ型半導体
装置の構造に関するものであり、特に樹脂間の半
導体チツプの発生熱をリード線にほぼ均等に分担
せしめることの可能な新規な半導体装置を提供す
るものである。[Detailed description of the invention] The present invention relates to the structure of a bridge type semiconductor device sealed with resin, and in particular, it is a novel method that allows the heat generated by the semiconductor chip between the resin to be distributed almost equally to the lead wires. The present invention provides a semiconductor device that is of high quality.
第１図ａ，ｂ，ｃは従来装置の平面図、側面図
及び電気的等価回路図で図において１ａ乃至１ｄ
は金属板から打抜加工等により形成されたリード
フレーム、２ａ，２ｂは接続子、ｄ１〜ｄ４は半
導体（ダイオード）チツプで前記リードフレーム
１ｂ，１ｃ及び接続子２ａ，２ｂ間で半田付され
ｃ図に示す単相ブリツジ回路を形成し、これを樹
脂成形法等により樹脂封止３されている。この構
造の半導体装置はリード線が同一方向に一列に揃
つて導出される所謂シングルインラインパツケー
ジ構造として実装上優れた構造であるが樹脂内で
ダイオードチツプｄ１〜ｄ４の発生熱のバランス
が悪く一部のリードフレームに集中するために電
流容量を大きくできない欠点がある。即ちリード
フレーム１ｂ，１ｃには近接して２個のダイオー
ドチツプｄ１，ｄ２（又はｄ３，ｄ４）が接着さ
れているためリードフレーム１ａ又は１ｄに比し
熱の集中が多くその分担が多くなる。本考案は同
一フレーム状に接着される半導体チツプの配置間
隙を長くし、他方のフレームに配置される半導体
チツプを隣接せしめて叙上の欠点を解消するよう
にしたものである。本考案は、２辺部が対向する
略コ字状金属板の一対を互いに対向部間に一方の
金属板の１辺部と他方の金属板の１辺部が並置す
る如く配置すると共に前記各辺部に夫々ほぼ列状
をなす如く半導体チツプを接着し、又前記隣接す
る辺部上の半導体チツプに跨つて接着される一対
の略Ｔ字状接続金属板と前記夫々金属板に連接さ
れたリード線部とによりブリツジ回路を形成して
夫々半導体チツプからの発生熱を前記夫々リード
線部にほぼ均等に分担せしめるようにしたことを
特徴とするものである。 Figures 1a, b, and c are a plan view, a side view, and an electrical equivalent circuit diagram of a conventional device, and 1a to 1d in the figure.
is a lead frame formed by punching or the like from a metal plate, 2a and 2b are connectors, and d1 to d4 are semiconductor (diode) chips soldered between the lead frames 1b and 1c and the connectors 2a and 2b. A single-phase bridge circuit shown in the figure is formed, and this is resin-sealed 3 by a resin molding method or the like. The semiconductor device with this structure has a so-called single in-line package structure in which the lead wires are led out in a line in the same direction, and has an excellent structure in terms of mounting. The drawback is that the current capacity cannot be increased because the current is concentrated in the lead frame. That is, since the two diode chips d1, d2 (or d3, d4) are bonded close to the lead frames 1b, 1c, the heat is concentrated more than the lead frames 1a or 1d, and their share is increased. The present invention solves the above-mentioned drawbacks by increasing the gap between the semiconductor chips that are bonded together in the same frame so that the semiconductor chips placed in the other frame are adjacent to each other. In the present invention, a pair of substantially U-shaped metal plates having two opposing sides are arranged such that one side of one metal plate and one side of the other metal plate are juxtaposed between the opposing sides, and each of the metal plates is Semiconductor chips are bonded to each side in a substantially row-like manner, and a pair of approximately T-shaped connecting metal plates are bonded to span the semiconductor chips on the adjacent sides, and each of the semiconductor chips is connected to the respective metal plates. The present invention is characterized in that a bridge circuit is formed by the lead wire portions so that the heat generated from the respective semiconductor chips is almost equally distributed to the respective lead wire portions.
以下図面を参照して説明する。第２図ａ，ｂ，
ｃは本考案の一実施例を示す平面図、側面図及び
部品図（平面図）で従来例と同一符号は同等部分
を示す。図において、１１，１２はほぼ対称形状
の略コ字状金属板で該金属板１１はｃ図に示す如
く長辺部１１ａと短辺部１１ｂが対向辺１１ｄを
通して対向し、又該長辺部１１ａに連接するリー
ド線部１１ｃが設けられ、又金属板１２において
１２ａ，１２ｂ，１２ｃはそれぞれ長辺部、短辺
部及びリード線部であり、夫々対向部に相互に一
方の長辺部１２ａ（又は１１ａ）と他方の短辺部
１１ｂ（又は１２ｂ）が対向する如く間隙をもつ
て並置されている。又前記各辺部に接着されるダ
イオードチツプ（ｄ１〜ｄ４）は短辺部１１ｂ，
１２ｂにおいてほぼ先端に接着され、又長辺部１
１ａ，１２ａにおいてはほぼ中間部に接着されて
各辺部間でほぼ一直線の列状を形成する。１３，
１４は略Ｔ字状接続金属板で該接続金属板１３は
隣接する長辺部１１ａ及び短辺部１２ｂ上のダイ
オードチツプｄ１，ｄ２を跨き、夫々チツプ（ｄ
１，ｄ２）に接着され、又一端部にはリード線部
１３ｃが設けられ、又接続金属板１４も上記同様
にダイオードチツプ（ｄ３，ｄ４）に接続され、
一端部にはリード線部１４ｃが設けられている。 This will be explained below with reference to the drawings. Figure 2 a, b,
c is a plan view, a side view, and a parts diagram (plan view) showing an embodiment of the present invention, and the same reference numerals as in the conventional example indicate equivalent parts. In the figure, reference numerals 11 and 12 denote approximately symmetrical U-shaped metal plates, and the metal plate 11 has a long side 11a and a short side 11b facing each other through an opposing side 11d, as shown in figure c, and the long side A lead wire portion 11c is provided which is connected to the metal plate 11a, and in the metal plate 12, 12a, 12b, and 12c are a long side portion, a short side portion, and a lead wire portion, respectively. (or 11a) and the other short side portion 11b (or 12b) are arranged side by side with a gap so as to face each other. Further, the diode chips (d1 to d4) bonded to each side are the short side 11b,
12b, it is glued almost to the tip, and the long side 1
1a and 12a, they are bonded approximately in the middle to form a substantially straight line between each side. 13,
Reference numeral 14 denotes a substantially T-shaped connecting metal plate, and the connecting metal plate 13 straddles the diode chips d1 and d2 on the adjacent long side portion 11a and short side portion 12b, and connects the chip (d
1, d2), and a lead wire portion 13c is provided at one end, and the connecting metal plate 14 is also connected to the diode chips (d3, d4) in the same manner as above.
A lead wire portion 14c is provided at one end.
なお、上記実施例では金属板１１，１２におい
ては対向辺部を長辺部、短辺部として説明した
が、各辺部の長さは等しくともよい。要は金属板
１１，１２を組合せた時、各金属板１１，１２の
対向辺部の距離Ｓを長くしてブリツジが構成でき
ればよい。このような構造をもつ本案装置は樹脂
３内でダイオードチツプ（ｄ１〜ｄ４）の発生熱
がバランスして夫々略対応するリード線部を介し
て放熱される。即ちダイオードチツプｄ１はリー
ド線部１１ｃから、ｄ２は１３ｃから、ｄ３は１
４ｃから、又ｄ４は１２ｃから夫々主に放熱され
る。 In the above embodiment, the opposite sides of the metal plates 11 and 12 are described as a long side and a short side, but the lengths of each side may be equal. The point is that when the metal plates 11 and 12 are combined, a bridge can be constructed by increasing the distance S between the opposing sides of each metal plate 11 and 12. In the present device having such a structure, the heat generated by the diode chips (d1 to d4) is balanced within the resin 3 and radiated through substantially corresponding lead wire portions. That is, the diode chip d1 is connected to the lead wire portion 11c, d2 is connected to the lead wire portion 13c, and d3 is connected to the lead wire portion 13c.
Heat is mainly radiated from 4c and d4 from 12c, respectively.
そして本案装置は左右対称のためダイオードチ
ツプｄ４とｄ１、又ｄ３とｄ２の放熱は略等しく
なり、更にダイオードチツプｄ３とｄ２は矢印で
示すように夫々金属板１１（又は１２）の対向辺
部１１ｄ（又は１２ｄ）を通して放熱されるため
ダイオードチツプｄ４（又はｄ１）と熱的にバラ
ンスされる。このため各リード線部間の熱バラン
スが良く一リード線部への集中発熱を防止できる
利点がある。因みに本考案によれば従来例と同一
外形（樹脂部外形）でほぼ10％電流容量が向上で
きた。 Since the present device is bilaterally symmetrical, the heat dissipation of the diode chips d4 and d1 and d3 and d2 is approximately equal, and furthermore, the diode chips d3 and d2 are located on the opposing sides 11d of the metal plate 11 (or 12), respectively, as shown by the arrows. (or 12d), so it is thermally balanced with diode chip d4 (or d1). Therefore, there is an advantage in that the heat balance between the lead wire parts is good and heat generation concentrated in one lead wire part can be prevented. Incidentally, according to the present invention, the current capacity was improved by approximately 10% with the same external shape (resin part external shape) as the conventional example.
以上の説明から明らかなように本考案によれば
樹脂外形に対し半導体チツプをバランス良く一列
に配列させる事により、半導体チツプの発熱の集
中を避ける事ができる。この結果電流容量を高め
る効果が得られる。又半導体チツプから距離を多
くとれる構造でありリードフレームからの放熱効
果を利用し、さらに電流容量を高める事ができる
等実用上の効果は大きい。 As is clear from the above description, according to the present invention, by arranging the semiconductor chips in a line in a well-balanced manner with respect to the resin outer shape, concentration of heat generated by the semiconductor chips can be avoided. As a result, the effect of increasing current capacity can be obtained. Furthermore, it has a structure that allows a large distance from the semiconductor chip, makes use of the heat dissipation effect from the lead frame, and has great practical effects such as being able to further increase current capacity.
第１図ａ，ｂ，ｃは従来装置の平面図、側面図
及び電気的等価回路図、第２図ａ，ｂ，ｃは本考
案の一実施例を示す平面図、側面図及び部品図で
ある。図において１ａ〜１ｄはリードフレーム、
２ａ，２ｂは接続子、３は封止樹脂、ｄ１〜ｄ４
は半導体チツプ、１１，１２はコ字状金属板、１
１ａ，１２ａは長辺部、１１ｂ，１２ｂは短辺
部、１３，１４は接続金属板、１１ｃ〜１４ｃは
リード線部、１１ｄ，１２ｄは対向辺部である。
Figures 1a, b, and c are a plan view, side view, and electrical equivalent circuit diagram of a conventional device, and Figures 2a, b, and c are a plan view, side view, and parts diagram showing an embodiment of the present invention. be. In the figure, 1a to 1d are lead frames,
2a, 2b are connectors, 3 is sealing resin, d1 to d4
is a semiconductor chip, 11 and 12 are U-shaped metal plates, 1
1a and 12a are long sides, 11b and 12b are short sides, 13 and 14 are connection metal plates, 11c to 14c are lead wire portions, and 11d and 12d are opposing sides.
Claims (1)
路を形成し、これを樹脂封止するようにしたブリ
ツジ型半導体装置において、２辺部が対向する略
コ字状金属板の一対を互いに対向部間に一方の金
属板の１辺部と他方の金属板の１辺部が並置する
如く配置すると共に、前記各辺部に夫々ほぼ列状
をなす如く半導体チツプを接着し、又前記隣接す
る辺部上の半導体チツプに跨つて接着される略Ｔ
字状接続金属板と、前記夫々金属板に連接された
リード線部とによりブリツジ回路を形成して夫々
半導体チツプからの発生熱を前記夫々リード線部
にほぼ均等に分担せしめるようにしたことを特徴
とするブリツジ型半導体装置。 In a bridge type semiconductor device in which a semiconductor chip is bonded between metal plates to form a bridge circuit, and this is sealed with resin, a pair of substantially U-shaped metal plates with two opposing sides are connected between the opposing sides. are arranged so that one side of one metal plate and one side of the other metal plate are juxtaposed, and semiconductor chips are adhered to each side in a substantially row-like manner, and the adjacent sides are T is glued across the upper semiconductor chip.
A bridge circuit is formed by the letter-shaped connecting metal plate and the lead wire portions connected to the respective metal plates, so that the heat generated from the respective semiconductor chips is almost equally distributed to the respective lead wire portions. Characteristic bridge type semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983099161U JPS606253U (en) | 1983-06-27 | 1983-06-27 | Bridge type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983099161U JPS606253U (en) | 1983-06-27 | 1983-06-27 | Bridge type semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS606253U JPS606253U (en) | 1985-01-17 |
| JPH0319230Y2 true JPH0319230Y2 (en) | 1991-04-23 |
Family
ID=30235116
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1983099161U Granted JPS606253U (en) | 1983-06-27 | 1983-06-27 | Bridge type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS606253U (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5620773B2 (en) * | 2010-09-28 | 2014-11-05 | 新電元工業株式会社 | Resin-sealed semiconductor device |
| JP5820696B2 (en) * | 2011-11-07 | 2015-11-24 | 新電元工業株式会社 | Semiconductor device manufacturing method and semiconductor device manufacturing jig |
| US20220148943A1 (en) * | 2019-03-25 | 2022-05-12 | Shindengen Electric Manufacturing Co., Ltd. | Semiconductor apparatus, lead frame, and power source apparatus |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5446473A (en) * | 1977-08-24 | 1979-04-12 | Siemens Ag | Method of producing semiconductor |
-
1983
- 1983-06-27 JP JP1983099161U patent/JPS606253U/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5446473A (en) * | 1977-08-24 | 1979-04-12 | Siemens Ag | Method of producing semiconductor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS606253U (en) | 1985-01-17 |
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