JPH03189801A - Programmable controller - Google Patents

Abstract

PURPOSE:To shorten the time required for obtaining a result of operation after reading out an applied instruction to a basic arithmetic circuit, and to execute the operation at a high speed by executing the applied instruction to the middle part by a general purpose arithmetic circuit in the course of executing a basic instruction of the basic arithmetic circuit. CONSTITUTION:While a basic arithmetic circuit 1B is executing a basic instruction, a general purpose arithmetic circuit 2B reads out an applied instruction from an auxiliary memory 12B and executes, it, and when it advances immediately before an access of an input/output memory 4, an access request is issued to the basic arithmetic circuit 1B. In this case, until the applied instruction is read out to the basic arithmetic circuit 1B, the general purpose arithmetic circuit 2B discontinues its execution by a holding command of the basic arithmetic circuit 1B. Subsequently, when the applied instruction is read out to the basic arithmetic circuit 1B, the issue of the holding command is stopped and the general purpose arithmetic circuit 2B restarts its execution. Accordingly, since the applied instruction is executed to the middle part, the operation of the general purpose arithmetic circuit 2B is ended quickly and a result of operation is written in the input/output memory 4. In such a way, the execution of this instruction is ended in a short time after the applied instruction is read out to the basic arithmetic circuit 1B, and the operation can be executed at a high speed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a programmable controller that executes 1-bit operations and multi-bit operations using basic arithmetic circuits and general-purpose arithmetic circuits, respectively.

[Conventional technology]

Conventionally, programmable controllers (hereinafter referred to as PCs) have been equipped with basic instructions for 1-bit operations (hereinafter referred to as bit operations) for sequence control, as well as multi-bit operations such as 8-bit operations (hereinafter referred to as applied operations), as shown in Figure 5. It is formed by providing a basic arithmetic circuit (LA) and a general-purpose arithmetic circuit (2A) that execute each application instruction.

The basic arithmetic circuit (which consists of shift registers, etc.)
IA) is a user memory (3) as a control instruction memory
and input/output memory (41 access control rights, both memories (3), (41 multiplexers + 51,
Send control signal HE to memory (3), (4
1 access is controlled.

Based on this control, all instructions of unit control, for example, during sequence control held in the user memory (3) are sent to the basic arithmetic circuit CIA) via multiplexer 15) and PANU C7) in the processing order of sequence control every time execution is completed. Read out.

When the basic instruction is read, the basic arithmetic circuit (
IA) executes a bit operation, and the result of the operation is transferred to the bus (8
), input/output memory (4) via multiplexer (6)
written to.

Also, when an application instruction is read, the basic arithmetic circuit (I
An interrupt (
lNTa) is issued, and the control signal SE causes the multiplexer r51, (61 is the bus (9)
, nO[switching, memo IJ (3), the access right of C41 is passed to the general-purpose arithmetic circuit (2A).

At this time, the general-purpose arithmetic circuit (2A) composed of, for example, an 8-bit CPU operates according to the operation program in the program memory (IIA), and first, the Nisa memory (
3) The same code as the instruction read out to the basic arithmetic circuit (IA) via the Karama/rechiderax 15) and the bus (9)
Read the instructions for use.

In addition, you can take a work memo of the applied operations of the read application instructions! '
(12A), and the result of the operation is applied to the bus QO
, to the input/output memory (4) via the multiplexer (6).

Note that when the calculation results held in the input/output memory (4) are required for applied calculations, they are transferred from the input/output memory (41) to the general-purpose calculation circuit (2A) via the multiplexer (6) and bus 00 during the calculation. The calculation result is read out.

Then, when the operation of the general-purpose instruction is completed, the general-purpose operation circuit (
2A) issues a start (START) as an end notification to the basic arithmetic circuit (IA).

At this time, the basic arithmetic circuit (IA) returns from the standby state and connects multiplexers r5) and C6) to buses (7) and
C8) to return access privileges to the user memory (
Read the next instruction from 3).

2. When the calculations of all instructions in the user memory (3) are completed and all calculation results are stored in the input/output memory (4) in the order of processing, the calculation results in this memory are transferred to the input/output interface circuit, etc. actual control is performed.

By the way, when the application instruction is read and the basic arithmetic circuit (IA)
When switching the operation from the basic arithmetic circuit (IA) to the general-purpose arithmetic circuit (2A), if the address of the applied instruction is generated by the software processing of the basic arithmetic circuit (IA) and given to the general-purpose arithmetic circuit (2A), it will take time to switch. Overhead increases.

Therefore, Japanese Patent Application Laid-Open No. 63-95503 (GQ 5B
19102), when the basic arithmetic circuit (IA) reads an application instruction and issues an interrupt, the register and the hardware circuit of the decoder circuit give the general purpose arithmetic circuit (2A) the start address of the application instruction, etc. It is described that switching can be performed quickly.

[Problem to be solved by the invention]

In the case of the conventional PC, even if the method described in the publication is used, after the basic arithmetic circuit (IA) reads an applied instruction, the general-purpose arithmetic circuit (2A) reads the same instruction and starts execution. There is a problem in that it takes time to obtain the calculation result of the applied instruction, the calculation cannot be sufficiently accelerated, and overhead occurs.

SUMMARY OF THE INVENTION An object of the present invention is to provide a PC that shortens the time from when an application instruction is read to a basic arithmetic circuit to when the result of the arithmetic operation is obtained, thereby increasing the speed of arithmetic operations.

[Failure to solve the problem]

In order to achieve the above objectives, the PC of the present invention includes the following:
Separately from the control instruction memory, there is an auxiliary memory for parallel operations that holds only each application instruction and is sequentially read out by the general-purpose arithmetic circuit.
+iT means for issuing an access request by executing a command at t; means for interrupting the execution of the said command by inputting a standby command;
The basic arithmetic circuit is provided with means for executing all commands, accessing the input/output memory and inputting the result of the operation, and means for issuing an end notification each time a line ends with 'No' of each of the applied instructions, and in the basic arithmetic circuit, means for issuing a MiJ standby command until each of the application commands is read from the control command memory while waiting for the access request to be input; Means is provided for transferring the access right of the input/output memory to the general-purpose arithmetic circuit until a self-termination notification is input.

1 Effect] 1) In the case of the PC of the present invention configured as F:ii as described in item 11, while the basic arithmetic circuit executes the basic instruction, the general-purpose arithmetic circuit reads the applied instruction from the auxiliary memory, executes it, and inputs it. An access request is issued to the basic arithmetic circuit when the process advances to the point just before accessing the output memory.

At this time, the general-purpose arithmetic circuit suspends execution by the standby command of the basic arithmetic circuit until the application instruction is read out to the basic arithmetic circuit.

Then, when the application instruction is read to the basic arithmetic circuit, the issuance of the standby command is stopped and the general-purpose arithmetic circuit resumes execution.
At this time, since the application instruction has been executed halfway, the operation of the general-purpose arithmetic circuit is quickly completed and the operation result is written to the input/output memory.

Further, when the operation of the applied instruction is completed, a completion notification is issued to the basic arithmetic circuit, and the next instruction is read to the basic arithmetic circuit.

Therefore, the execution of the applied instruction is completed in a very short time after it is read into the basic arithmetic circuit, thereby speeding up the arithmetic operation.

〔Example〕

(2) Examples will be explained with reference to FIGS. 1 to 4.

In Figure 1, (IB) is a basic arithmetic circuit consisting of registers, etc., (2B) is a general-purpose arithmetic circuit with a CPU configuration, (+,
, ], B) are program memos! J, (12B) is a work memory forming an auxiliary memory.

Then, as shown in FIG.
,...), applied instructions m (rn=l, 2...), the work memo IJ (12B) is shown in Fig. One well is stored in the auxiliary memory area (A).

Writing to this area (A) is carried out by external control or command transfer control of the general-purpose arithmetic circuit (2B), such as -F writing of the user memory (3), from the user memory (3) to the basic arithmetic circuit (
iB) is performed for the song that is started.

Note that the area (B) of the work memo IJ (1215) is used for calculations of child and application instructions similar to the memo 1) (1, 2A,) in FIG.

- Also, the basic arithmetic circuit (IB) is the arithmetic circuit (IB) shown in FIG.
Instead of the means for issuing interrupts (], N'l'a) in A), the following (1), fiil, which is constructed of hard circuits such as gate circuits and flip-flops, is used.
(It has each means of ii-.

(1) Means for issuing a standby command (WAIT) until a general-purpose instruction is read from the user memory (3) when an access request (ACC:) to be described later is input.

When the 1'+i+application command is read, the standby command (W
AIT) issuance is stopped and the multiplexer (6
) Switch to Wobanu 00 and record input/output notes! J (Means for passing the access right of 41 to the general purpose arithmetic circuit (2B).

(iii) When the operation result of the read application instruction is not needed, an interrupt (INT h ) is issued and the general-purpose operation circuit (
2B) means for instructing to execute the next instruction and, if the next instruction is an applied instruction, for instructing to cancel standby.

Furthermore, the general-purpose arithmetic circuit (2B) has a program memory (1
Based on the operation program of 1B), the arithmetic circuit of Fig. 5 (2
In place of the instruction reading means 20, etc. in A), use the following (a).

It has the following means: (c), fdl, fel, (f).

fa) Work memo! Means for sequentially reading out instructions for each office from area (A) of J (12B).

(bl Means for issuing an access request (ACC:) when the instruction for A is executed until just before accessing the input/output memory (4).

(c) Means for interrupting execution by inputting a standby command (WAIT).

fd) Means for restarting execution upon stopping the input of a wait instruction (WAIT) and writing the operation result to the input/output memory (4).

Ie) Means for transitioning to reading and executing the next application instruction upon input of an interrupt (IN'rh).

g) Means for issuing a termination notification (START) each time execution of an application instruction is completed.

Then, from the user memory (3) to the basic arithmetic circuit (IB)
When the sequential reading of all instructions to the work memo! starts at time ts, the work memo! Reading from the area (A) of J (12B) to the general purpose arithmetic circuit (2B) also begins.

Therefore, while the basic arithmetic circuit (IB) executes the operation of the read basic instruction n, the general-purpose arithmetic circuit (2B) executes the read application instruction m, and the two wave arithmetic circuits (ljj).

(2B) performs parallel operations.

Then, as shown in Fig. 4 fa), the basic arithmetic circuit (IB
) executes the operations of basic instructions 1.2 in order, and the bus C8].

The calculation result is written to the input/output memory (4) via the multiplexer (6).

Further, as shown in Fig. 4, the general-purpose arithmetic circuit (2B) executes the operation of the application instruction 1, and when the operation progresses to just before accessing the input/output memory (4) at time ta due to the middle of this operation or the end of the operation, Issue an access request (ACC).

At this time, since basic instruction 2 is being executed, the basic arithmetic circuit (IB) issues a standby command (WAIT), and while this command (WAIT) is being input, the general-purpose arithmetic circuit (2B) interrupt execution.

Then, the operation result of basic instruction 2 is written to the input/output memory (41), the execution of basic instruction 2 is completed, and the user memory (
When application instruction 1 is read from 3), the basic arithmetic circuit (I
B) is a standby command (WAIT) at tb immediately after being read.
stop publishing.

Furthermore, the multiplexer (6) is connected to the path via the control signal SE, and the access right to the input/output memory (4) is passed to the general purpose arithmetic circuit (2B).

Then, the general-purpose arithmetic circuit (2B) resumes execution of the application instruction 1, and transfers the result of the operation to the bus Qd and the multiplexer (6).
) to the input/output memory (4), and when the execution of application instruction 1 ends at time tc, a completion notification (S
TART).

Upon input of this end notification (START), the basic arithmetic circuit (IB) returns from the standby state, and the control signal SE connects the multiplexer (6) to the bus 18 and grants access rights to the input/output memory (4). return.

Then, the next basic instruction 3 is read out from the user memory (3), and the basic arithmetic circuit (IB) executes the basic instruction 3.

On the other hand, after issuing the end notification (START) at time tc, the general-purpose arithmetic circuit (2B) issues the work memo! When the next application instruction 2 is read from J (12B) and executed, and this instruction 2 is executed until just before accessing the input/output memory r41 at fd,
An access request (ACC:) is issued again.

At this time, since the basic instruction 3 is being executed, the basic arithmetic circuit (IB) issues a standby command (WAIT), and the execution of the general purpose arithmetic circuit (2B) is interrupted.

Then, upon completion of execution of basic instruction 3, the user memory (3
), and if the calculation result of the applied instruction 2 is required, the issuance of the wait command (WAIT) is stopped and the same operation as for the applied instruction 1 is repeated.

However, if the application instruction 2 consists of a conditional processing instruction based on the operation result of the immediately preceding basic instruction 3, and the operation result is not needed, the basic operation circuit (IB ) is the standby command (
WAIT) is stopped and an interrupt (INTh) is issued.

When this interrupt (INTh) is input, the general purpose arithmetic circuit (2B
) is based on the operating program (work memo by interrupt processing!
The next application instruction 3 is read from J (12B), and at the time tr when this reading ends, an end notification (START) is issued and execution of the application instruction 3 is started. An access request (ACC) is issued at time f.

However, upon input of the end notification (START), the basic arithmetic circuit (IB) shifts to execution of the next instruction.

At this time, when the application instruction is read from the user memory (3), the basic arithmetic circuit (IB) issues an access request (ACC).
Based on the input, a standby release indicating permission is issued instead of a standby command (WAIT), and the access right is passed to the general purpose arithmetic circuit (2B).

Then, when all the instructions in the user memory (3) are read out and the results of each operation are written in the input/output memory (4), the operations in the own operation circuits (IF3) and (2B) are completed.

At this time, since each application instruction n) is executed halfway without waiting for it to be read from the user memory (3), each application instruction rl' Since the execution of the application instruction l is quickly completed and the execution of the unnecessary application instruction is aborted midway and the execution of the next application instruction is carried out, the calculation of the application instruction m is performed extremely quickly.

In addition, in the above embodiment, - of work memo') (12B)
Although the area (A) is used as an auxiliary memory, the auxiliary memory r and the work memory may be provided separately.

〔Effect of the invention〕

Since the present invention is configured as described above, it produces the effects described below.

Each applied instruction is sequentially read from the control instruction memory and separate auxiliary memory to the general-purpose arithmetic circuit, and the applied instruction is partially executed by the general-purpose arithmetic circuit while the basic instruction of the basic arithmetic circuit is being executed, so that the own arithmetic circuit operates in parallel. When each application instruction is read from the control instruction memory to the basic arithmetic circuit, the operation result of each application instruction is written to the input/output memory in a short time, speeding up the operation of the application instruction and speeding up the operation of the own operation circuit. Overhead based on switching operations can be significantly reduced.

[Brief explanation of drawings]

1 to 4 show one embodiment of the programmable controller of the present invention, in which FIG. 1 is a block diagram, FIGS. 2 and 3 are memory maps of user memory and work memory, and FIG. 4 is a memory map of the user memory and work memory, and FIG. ) is a timing chart for explaining the operation, and FIG. 5 is a block diagram of a conventional example. (1] 3)... Basic arithmetic circuit, (2B)... General purpose arithmetic circuit, (3)... User memory, (41... Input/output memo IJ, (LLB)... Program memory, (1
2B)...Work memory.

Claims (1)

[Scope of Claims] 1. The control instruction memory comprises a basic arithmetic circuit and a general-purpose arithmetic circuit that execute each basic instruction of 1-bit operation of sequence control and each applied instruction of multi-bit operation held in the control instruction memory, respectively. The programmable controller sequentially reads out all instructions in the processing order to the basic arithmetic circuit, and writes the calculation results of both the arithmetic circuits to the input/output memory in the processing order by access control of the basic arithmetic circuit. Separately from the instruction memory, there is provided an auxiliary memory for parallel calculations that holds only the application instructions and is sequentially read out by the general-purpose arithmetic circuit, and the general-purpose arithmetic circuit is accessed by executing the instruction immediately before accessing the input/output memory. a means for issuing a request;
means for interrupting the execution of the command by inputting a standby command;
means for restarting the instruction execution upon stopping the input of the standby command, accessing the input/output memory and writing the calculation result; and means for issuing a completion notification each time execution of each of the application instructions is completed; means for issuing the standby command until each applied command is read from the control command memory when the access request is input to the arithmetic circuit; A programmable controller comprising means for transferring access rights of the input/output memory to the general-purpose arithmetic circuit until a termination notification is input.