JPH03188568A - Verification system for circuit on cad/cam - Google Patents

Abstract

PURPOSE:To improve the circuit verifying accuracy by inputting the numerical data and an electric parameter of the attribute details to a circuit diagram and inputting a secondary electric parameter produced with input of the connection and attribute details as a simulation drawing for production and display of an editor drawing. CONSTITUTION:The necessary unit graphic data is extracted together with the numerical data on the electric parameter corresponding to the graphic data. These graphic data are combined and connected with each other for production of a drawing. Then the numerical data and the electric parameter of the attribute details are inputted to the drawing for production of a simulation drawing. Furthermore the secondary electric parameter produced with input of the connection and attribute details is inputted for production of an editor drawing which is displayed at a display part. Thus it is possible to verify and evaluate a produced circuit as the one approximate as much as an actual one.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a verification system for circuits such as LSIs created using CAD/CAM, and particularly to verification of each component and the electrical parameters between them.

[Conventional technology]

FIG. 4 shows a system for verifying an LSI (Large Scale Integrated Circuit) created on a conventional CAD/CAM (using a computer screen). First, there is layout data necessary for drawing, and the layout data consists of graphic data indicating circuit elements and numerical data of electrical parameter data. The graphic data consists of unit figures of basic elements such as resistors, capacitors, coils, transistors, diodes, etc., and the numerical data consists of resistance values, capacitances, current values, cut voltages, etc. Further, the numerical data includes detailed data in which, for example, numerical data of transistors are divided into FET, CMO3°TNT, etc.

In FIG. 4, step 1 is a stage in which unit elements and unit wirings are extracted from the graphic data group of the layout data and their necessity is examined. Step 2 is to extract electrical parameter data from the numerical data of the layout data and add it to the corresponding graphic data.
This is the stage of drawing. Step 4 blocks the completed drawings, characteristic curves, characteristic data, etc. for each simulation.

This is the stage of displaying on a graphic display. That is, in conventional LSI design simulation, the overall drawing is created by combining graphic data, and the characteristics and functions are evaluated by simply combining the corresponding unit graphic data with electrical parameters added.

[Problem to be solved by the invention]

In conventional LSI design simulation, the created LS
In the I drawing, initial errors and parasitic resistances that occur later due to the combination of unit figures are input, but since only one-dimensional errors are input, the practicality of simulation drawing is reduced, rather than theoretically. There was a drawback. That is, nodes (intersections) caused by the combination of unit figures, interactions due to multilayering, heat generation due to the materials used, variations in resistance values, etc. were not accurately input.

This invention was made to solve the above problems, and is a circuit on CAD/CAM in which the theoretical LSI drawing and the actually appearing simulation drawing match the electrical parameters, various attributes, characteristic curves, and characteristic data. The purpose is to provide a verification system for

[Means to solve the problem]

In this invention, there are a step of extracting necessary unit figure data and numerical data of electrical parameters corresponding to the unit figure data, and a step of combining and connecting the figure data to create a drawing such as an LSI drawing. Step P4): Input numerical data and electrical parameters of attribute details into this drawing to create a simulation drawing.Step P4), Input secondary electrical parameters generated as a result of inputting connection and attribute details to create an editor drawing. In step P,), the completed editor drawing is displayed on the display section (step P6).

[Effect]

By displaying and comparing an editor drawing obtained by inputting secondary electrical parameters with a mere logical simulation drawing, a circuit created on CAD/CAM can be made as close as possible to the real circuit on a computer.ヰ★Be able to prove and evaluate.

〔Example〕

This invention will be explained below with reference to FIGS. 1 to 3.

In the present invention, the following attribute details are added to the graphic database and numerical database that are the basis of LSI drawing. First of all, in the figure database, for example, a transistor is PNP,
Determine NPN, FET, 0MO3゜-layer, double-layer, n-layer. Next, in terms of numerical data, for example, the material of the wiring (aluminum 2 gold, copper).

Includes thickness, line width, resistivity, temperature characteristic resistivity, etc.

Step P1 is a stage in which unit elements and unit wirings are extracted from the graphic data group of the layout data and their necessity is examined. Step P2 is a step in which electrical parameters are extracted from the numerical data of the layout data and added to the corresponding graphic data. Step P3 is a stage in which various types of LSI functional blocks are simulated (drawn) by trial and error using the extracted unit figures and numerical data. In step P4, the above detailed attributes are edited for each unit element in the theoretical LSI drawing. Next, in step P5, after unit elements are mutually coupled on the edited LSI drawing, electrical parameters such as stray capacitance that are secondarily generated as a result are input. Step P6 is a stage of displaying the completed drawing, characteristic curve, and characteristic data on the display.

Comparing the editor drawing that takes into account all possible secondary attributes with the logical simulation drawing, the LS
Evaluate the I circuit.

FIG. 3 shows a method for calculating secondary electrical parameters in step P5. This example shows a case where the resistance value of the transistor circuit shown in FIG. 2 is set. Second
In the figure, 1 is a resistor, 2°3 is a transistor, 4 is a terminal of each unit element, 5 is an intersection node, and 6 is a wiring.

In FIG. 3, in step P9, the terminal 4 of the resistor and the terminals 4, 4 of the transistor 2.3 are specified. Next, the resistor 1 and the transistor 2.3 are connected by wirings 6, 6.

In step PIO, the intersections (nodes) of the wiring 6°6.6 are extracted and numbered. At step pH, each node 6
and the terminal 4 and between each node 5, and if the nodes 5 are continuous, find the sum of them. Regarding wiring resistance, it depends on the material, gold, aluminum, W4, etc.
Also, the actual resistance value can be determined from the line width and thickness. At this time, thermal fluctuation values due to heat generation during circuit operation are also taken into consideration. In step P12, an editor is used to input resistance values on the simulated LSI drawing.

〔Effect of the invention〕

As described above, according to the present invention, necessary unit figure data and numerical values of electrical parameters corresponding to the unit figure data are extracted, the figure data are combined and connected to create a circuit drawing, and the circuit drawing is created by combining and connecting the figure data. Enter numerical data and electrical parameters of attribute details into the circuit drawing to create a simulation drawing, input secondary electrical parameters generated as a result of inputting connection and attribute details to create an editor drawing, and display the completed editor drawing on the display section. Since the circuit is displayed on the screen, it is possible to simulate a drawing as close as possible to the actual circuit on CAD/CAM, and various tests and verifications can be performed with high precision at the stage of circuit production.

[Brief explanation of drawings]

FIG. 1 is a flowchart showing the verification system of the present invention;
FIG. 2 is a circuit diagram showing an example of drawing, FIG. 3 is a flowchart when editing FIG. 2, and FIG. 4 is a flowchart of a conventional verification system. 1...Resistor, 2.3...Transistor, 4...Terminal, 5...Node, 6...Wiring.

Claims (1)

[Claims] Extract the necessary unit figure data and numerical data of electrical parameters corresponding to the unit figure data, combine and connect the figure data to create a circuit drawing, and add the numerical data and attribute details to this circuit drawing. A CAD/CAD system that inputs parameters to create a simulation drawing, inputs secondary electrical parameters generated as a result of inputting the connection and attribute details to create an editor drawing, and displays the completed editor drawing on a display unit. Verification system for circuits on CAM.