JPH03185751A - Carrier plate for microwave semiconductor element - Google Patents
Carrier plate for microwave semiconductor elementInfo
- Publication number
- JPH03185751A JPH03185751A JP1324484A JP32448489A JPH03185751A JP H03185751 A JPH03185751 A JP H03185751A JP 1324484 A JP1324484 A JP 1324484A JP 32448489 A JP32448489 A JP 32448489A JP H03185751 A JPH03185751 A JP H03185751A
- Authority
- JP
- Japan
- Prior art keywords
- microwave semiconductor
- semiconductor element
- carrier plate
- pedestal
- microwave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 55
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims abstract description 32
- 238000006073 displacement reaction Methods 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract description 2
- 239000012050 conventional carrier Substances 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910001080 W alloy Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- SBYXRAKIOMOBFF-UHFFFAOYSA-N copper tungsten Chemical compound [Cu].[W] SBYXRAKIOMOBFF-UHFFFAOYSA-N 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- ORQBXQOJMQIAOY-UHFFFAOYSA-N nobelium Chemical compound [No] ORQBXQOJMQIAOY-UHFFFAOYSA-N 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
Abstract
Description
【発明の詳細な説明】
〔発明の目的〕
（産業上の利用分野）
本発明は、マイクロ波半導体素子用キャリアプレートに
係り、特に寄生インダクタンスによりその素子特性が著
しく影響を受けるマイクロ波半導体素子をマウントする
為のマイクロ波半導体素子用キャリアプレートの改良に
関する。[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a carrier plate for a microwave semiconductor device, and particularly to a carrier plate for a microwave semiconductor device whose device characteristics are significantly affected by parasitic inductance. This invention relates to improvements in carrier plates for microwave semiconductor devices for mounting.
（従来の技術）
社会の情報化が急速に進展しつつある現在、大量の情報
を伝達する手段として数ＧＨｚ以上のマイクロ波を用い
た通信方式が実用化されている。(Prior Art) At present, as the informationization of society is progressing rapidly, communication systems using microwaves of several GHz or more are being put into practical use as a means of transmitting large amounts of information.
さらに、マイクロ波通信システムの小型化、高信頼化を
目的として、同システムの固体化が進められている。こ
のシステムの固体化に用いられるマイクロ波半導体装置
は、例えば第２図並びに第３図に示したように、マイク
ロ波半導体素子１０１と、該マイクロ波半導体素子１０
１の特性インピーダンスを回路側特性インピーダンスに
整合させる為に用いられる整合回路１０２と、前記マイ
クロ波半導体素子１０１と整合回路１０２をマウントす
るキャリアプレート１０３あるいはパッケージ１０４と
、さらに前記マイクロ波半導体素子１０１と整合回路１
０２を電気的に接続する為のボンディングワイヤ１０５
から構成されている。Furthermore, in order to make microwave communication systems smaller and more reliable, efforts are being made to solidify microwave communication systems. The microwave semiconductor device used for solidifying this system includes a microwave semiconductor element 101 and a microwave semiconductor element 10, as shown in FIGS. 2 and 3, for example.
A matching circuit 102 used to match the characteristic impedance of 1 to the characteristic impedance of the circuit, a carrier plate 103 or package 104 for mounting the microwave semiconductor element 101 and the matching circuit 102, and a carrier plate 103 or package 104 for mounting the microwave semiconductor element 101 and the matching circuit 102; Matching circuit 1
Bonding wire 105 for electrically connecting 02
It consists of
マイクロ波回路においては、その動作周波数が高くなる
と、マイクロ波半導体素子と整合回路を電気的トこ接続
する為のボンディングワイヤ１０５のインダクタンス成
分は無視できない値となる。In a microwave circuit, as the operating frequency increases, the inductance component of the bonding wire 105 for electrically connecting the microwave semiconductor element and the matching circuit becomes a non-negligible value.
般に用いられている直径２５ＩＩＩｎの金製のボンディ
ングワイヤを例にとると、そのインダクタンスは、長さ
１ｍあたり１ｎＨ程度とされているが、これは周波数３
０６１（ｚにおいては３０Ωのインピーダンスに相当す
る。このように高周波動作においては、無視できない値
をとるボンディングワイヤのインダクタンス成分を低減
するために、ボンディングワイヤをできるだけ短くし、
さらにボンディングワイヤ本数をできる限り多くする手
法が一般的にとられている。Taking a commonly used gold bonding wire with a diameter of 25IIIn as an example, its inductance is approximately 1 nH per meter of length, but this is at a frequency of 3.
061 (corresponds to an impedance of 30Ω in z). In this way, in high frequency operation, in order to reduce the inductance component of the bonding wire, which takes a non-negligible value, the bonding wire should be made as short as possible.
Furthermore, a method is generally used to increase the number of bonding wires as much as possible.
第４図に第２図に示した従来のキャリアプレート１０３
上にマイクロ波半導体素子１０１を設置したマイクロ波
半導体装置の線分Ａ−Ａ間での矢印方向断面図を示す。FIG. 4 shows the conventional carrier plate 103 shown in FIG.
A cross-sectional view in the direction of the arrow along line segment A-A of a microwave semiconductor device on which a microwave semiconductor element 101 is installed is shown.
第４図において、ボンディングワイヤ１０５を短くし、
インダクタンス成分の低減を図る為には、前記整合回路
１０２の上面と、前記マイクロ波半導体素子１０１の電
極面を同一平面上にすることが有効である。通常、整合
回路１０２に用いられるアルミナ基板は、２５０±１０
／ａの厚さである。また、マイクロ波半導体素子１０１
の厚さは、熱抵抗の低減とハンドリングの容易性を考慮
して５０〜１００−程度が用いられる。そこで両者の電
極面を同一平面上にする為に前記マイクロ波半導体素子
１０１をマウントする部分に凸部台座１０６を設けた形
状のキャリアプレートが従来より用いられている。しか
し、前記凸部台座１０６の加工に際しては、型入れ、切
削工程を注意深く行なったとしても台座側面には半径Ｒ
６＝５０．程度の丸み（以下加工残りと略称）１０７．
１０８．１０９．１１０が残ることは避けられない。In FIG. 4, the bonding wire 105 is shortened,
In order to reduce the inductance component, it is effective to make the upper surface of the matching circuit 102 and the electrode surface of the microwave semiconductor element 101 on the same plane. Usually, the alumina substrate used for the matching circuit 102 has a diameter of 250±10
The thickness is /a. Moreover, the microwave semiconductor element 101
The thickness is approximately 50 to 100 mm in consideration of reducing thermal resistance and ease of handling. Therefore, in order to make both electrode surfaces on the same plane, a carrier plate having a shape in which a convex pedestal 106 is provided at the portion where the microwave semiconductor element 101 is mounted has been conventionally used. However, when processing the convex portion pedestal 106, even if the molding and cutting steps are carefully performed, the side surface of the pedestal has a radius R.
6=50. Degree of roundness (hereinafter abbreviated as unprocessed part) 107.
It is inevitable that 108.109.110 will remain.
従って、例えばマイクロ波半導体素子の寸法をマイクロ
波伝搬方向（以下長手方向と呼ぶ；第４図の矢印方向）
Ｌ＝５００±１０蝉、横方向５００±１０−とした場合
、前記凸部台座１０６の上面の長手方向の寸法Ｕは、前
記加工に伴って生じる加工残りＲ８を考慮すると、Ｕ≧
Ｌ＋２Ｒ，となり、前記マイクロ波半導体素子ｌｏｔの
長手方向寸法りよりも２Ｒ０＝１００ｐ以上長くなって
しまう。また、前記マイクロ波半導体素子１０１端と、
前記整合回路１０２端との間隔ａも１００−以下（Ｑ≧
２Ｒ０）になってしまう。Therefore, for example, the dimensions of a microwave semiconductor element are determined in the microwave propagation direction (hereinafter referred to as the longitudinal direction; the direction of the arrow in Fig. 4).
When L = 500 ± 10 cm and lateral direction 500 ± 10 -, the longitudinal dimension U of the upper surface of the convex portion pedestal 106 is U≧, considering the remaining machining R8 caused by the machining.
L+2R, which is longer than the longitudinal dimension of the microwave semiconductor element lot by 2R0=100p or more. Further, the end of the microwave semiconductor element 101,
The distance a from the end of the matching circuit 102 is also 100- or less (Q≧
2R0).
すなわち従来のキャリアプレートを用いる場合には、両
者を電気的に接続する為の前記ボンディングワイヤ１０
５の長さは２Ｒ，以下に短く出来なかった。That is, when using a conventional carrier plate, the bonding wire 10 for electrically connecting the two is used.
The length of 5 could not be shortened below 2R.
このため整合回路の設計にあたっては、前記ボンディン
グワイヤ１０５によるインダクタンス成分を考慮した設
計を行う必要があり、回路設計の自由度を著しく低下さ
せていた。また、前記凸部台座１０６上面の長手方向の
寸法Ｕは、前記マイクロ波半導体素子１０１の長手方向
の寸法りに対し、２Ｒａ＝１００−以上長いこと、前記
凸部台座１０６端と前記整合回路１０２端を加工残りＲ
，の２倍以上あけなければならないことから第５図に例
示する如くマウント代置ずれが生じ、このため前記マイ
クロ波半導体素子１０１の下部や、前記整合回路１０２
の下部に空隙１０７が生じたり、第６図に例示する如く
、前記ボンディングワイヤ１０５の長さが不均一になっ
たりすることが往々に発生し、このことがマイクロ波半
導体装置の特性を悪化させ、ひいては歩留り低下の一因
となっていた。Therefore, when designing a matching circuit, it is necessary to take into consideration the inductance component due to the bonding wire 105, which significantly reduces the degree of freedom in circuit design. Further, the longitudinal dimension U of the upper surface of the convex part pedestal 106 is longer than the longitudinal dimension of the microwave semiconductor element 101 by 2Ra=100- or more, and the end of the convex part pedestal 106 and the matching circuit 102 Unprocessed edge R
, the mounting displacement occurs as shown in FIG.
It often happens that a void 107 is formed in the lower part of the bonding wire 107 or that the length of the bonding wire 105 becomes non-uniform as illustrated in FIG. 6, which deteriorates the characteristics of the microwave semiconductor device. This, in turn, was a cause of a decrease in yield.
（発明が解決しようとする課題）
以上述べたように、従来のマイクロ波半導体装置で用い
られるキャリアプレートでは、加工残りをなくすことが
できないためマイクロ波半導体素子端−整合回路端間の
間隔短縮に限界が生じ、これがためボンディングワイヤ
長の短縮を制限し。(Problems to be Solved by the Invention) As described above, in the carrier plate used in conventional microwave semiconductor devices, it is impossible to eliminate unprocessed parts, so it is difficult to shorten the distance between the microwave semiconductor element end and the matching circuit end. Limits arise and this limits the shortening of the bonding wire length.
整合回路設計の自由度を低下させていた。This reduced the degree of freedom in matching circuit design.
また、加工残りの存在は、マイクロ波半導体素子並びに
整合回路基板のマウント位置の規定を困難にするため、
マウント不良や、マウント位置ずれによるボンディング
ワイヤ長の不均一を招きマイクロ波半導体装置の特性や
歩留りを低下させていた。In addition, the presence of unprocessed parts makes it difficult to specify the mounting positions of microwave semiconductor elements and matching circuit boards.
This leads to mounting defects and non-uniform bonding wire lengths due to mounting misalignment, which reduces the characteristics and yield of microwave semiconductor devices.
本発明は、上記欠点を除去すべくなされたものであって
、加工残りによる影響を極力抑えたマイクロ波半導体素
子用キャリアプレートを提供することを目的とする。The present invention was made in order to eliminate the above-mentioned drawbacks, and an object of the present invention is to provide a carrier plate for a microwave semiconductor element in which the influence of unprocessed parts is suppressed as much as possible.
（課題を解決するための手段）
本発明のマイクロ波半導体素子用キャリアプレートは、
凸状のマウント台座部に半導体素子がマウントされてな
るマイクロ波半導体素子用キャリアプレートにおいて、
前記台座上面の面積を前記台座下面の面積よりも大とな
し、かつ前記凸部台座の少なくとも一方向からみた断面
形状が逆台形型に形成されてなることを特徴とする。(Means for Solving the Problems) The carrier plate for microwave semiconductor elements of the present invention includes:
In a microwave semiconductor device carrier plate in which a semiconductor device is mounted on a convex mount base,
The area of the upper surface of the pedestal is larger than the area of the lower surface of the pedestal, and the cross-sectional shape of the convex pedestal viewed from at least one direction is formed into an inverted trapezoidal shape.
（作 用）
本発明に係るキャリアプレートでは、マイクロ波半導体
素子をマウントする凸部台座の断面形状を逆台形型とす
ることで整合回路端を前記凸部台座の上面にマウントさ
れたマイクロ波半導体素子端に近接して位置せしめるこ
とができる。このためボンディングワイヤ長は、キャリ
アプレートの加工残りに関係なく短縮することができ、
整合回路設計の制約が大幅に緩和される。(Function) In the carrier plate according to the present invention, the convex pedestal on which the microwave semiconductor element is mounted has an inverted trapezoidal cross-sectional shape, so that the end of the matching circuit can be connected to the microwave semiconductor mounted on the upper surface of the convex pedestal. It can be located close to the element end. Therefore, the bonding wire length can be shortened regardless of the unprocessed portion of the carrier plate.
Constraints on matching circuit design are significantly relaxed.
また、キャリアプレートの前記凸部台座上面の長手方向
寸法をマイクロ波半導体素子の長手方向寸法に一致させ
ておくことが可能となり、前記マイクロ波半導体素子と
整合回路の位置は固定されるので、マウントの位置ずれ
や、ボンディングワイヤ長の不均一を防ぐことができ、
マイクロ波半導体装置の特性と歩留りの向上がはかれる
。Furthermore, the longitudinal dimension of the upper surface of the convex pedestal of the carrier plate can be made to match the longitudinal dimension of the microwave semiconductor element, and the positions of the microwave semiconductor element and the matching circuit are fixed, so that the mount This prevents misalignment of the bonding wire and uneven bonding wire length.
The characteristics and yield of microwave semiconductor devices can be improved.
（実施例）
以下、本発明の一つの実施例を第１図（ａ）、（ｂ）、
（Ｃ）を参照して説明する。(Example) Hereinafter, one example of the present invention will be shown in FIGS. 1(a), (b),
This will be explained with reference to (C).
なお、説明において、従来例においた述べた各部と変わ
らない部分には従来の各部と同じ符号をつけて示し、説
明を省略する。In the description, parts that are the same as those described in the conventional example are given the same reference numerals as those in the conventional example, and the description thereof will be omitted.
第１図（ａ）、（ｂ）は各々本発明に係るキャリアプレ
ートを用いたマイクロ波半導体装置の平面図ならびに断
面図であり、第１図（Ｃ）は、第１図（ｂ）の凸部台座
近傍を拡大して示した図である。第１図に示したキャリ
アプレート１３は、導電性材料例えば銅−タングステン
合金に金めつきを施したものである。前記キャリアプレ
ート１３の中央部にはマイクロ波半導体素子１０１（幅
５００±１０μ、長手方向Ｌ＝５００±１０．、厚さ１
００±１０１０ｌ１をマウントするために凸部台座１６
が形成されている。前記凸部台座１６の上面の長手方向
の寸法はマウントを容易にするため半導体素子１０１の
長手方向寸法りよりもわずかに長い長手方向寸法Ｕ＝５
３０±２０４．ＩＩＩＷ＝５３０±２０陣に設定しであ
る。前記マイクロ波半導体素子１０１の厚さ（１００±
ｔＯ，ａ ）と、整合回路１０２の厚さ（２５０±ｔＯ
戸）の差を考慮し、両者の表面電極面の高さが一致する
ようにこの凸部台座１６の高さＨは、本実施例ではＨ＝
１５０±２０ｐｎとした。FIGS. 1(a) and 1(b) are a plan view and a sectional view of a microwave semiconductor device using a carrier plate according to the present invention, respectively, and FIG. 1(C) is a convex view of FIG. It is an enlarged view showing the vicinity of the part pedestal. The carrier plate 13 shown in FIG. 1 is made of a conductive material such as a copper-tungsten alloy plated with gold. A microwave semiconductor element 101 (width 500±10 μm, longitudinal direction L=500±10 mm, thickness 1
Convex pedestal 16 to mount 00±1010l1
is formed. The longitudinal dimension of the upper surface of the convex portion pedestal 16 is slightly longer than the longitudinal dimension of the semiconductor element 101 in order to facilitate mounting.
30±204. It is set to IIIW=530±20 groups. The thickness of the microwave semiconductor element 101 (100±
tO,a ) and the thickness of the matching circuit 102 (250±tO
In this embodiment, the height H of the convex portion pedestal 16 is set to H=
It was set to 150±20 pn.
凸部台座１６の下部の長手方向の寸法りは、この凸部台
座１６の加工残りＲ，（＝５０／ａ）と、その上部の長
手方向寸法Ｕから、Ｄ≦Ｕ−２Ｒｏとなるように設計す
る。本実施例では、Ｄ＝４３０±２０−とした。The longitudinal dimension of the lower part of the convex part pedestal 16 is determined from the remaining machining R, (=50/a) of this convex part pedestal 16 and the longitudinal dimension of the upper part U, so that D≦U-2Ro. design. In this example, D=430±20−.
また、その幅は、４３０±２０μに設計した。Moreover, the width was designed to be 430±20μ.
前記凸部台座の加工には、例えば、凸部を上部からプレ
ス加工することで実現できる。The convex portion pedestal can be worked, for example, by pressing the convex portion from above.
本発明には次に挙げる利点がある。The present invention has the following advantages.
（１）前記凸部台座１６上にマイクロ波半導体素子１０
１ をマウントすることでこのマイクロ波半導体素子１
０１と整合回路１０２の電極面を同一平面上にできる。(1) The microwave semiconductor element 10 is placed on the convex portion pedestal 16.
1 by mounting this microwave semiconductor element 1
01 and the matching circuit 102 can be made on the same plane.
（ｉｉ）マイクロ波半導体素子１０１端と整合回整１０
２端との間隔ａを２０．（加・工の誤差）程度にまで短
縮することができる。(ii) Microwave semiconductor element 101 end and matching timing 10
The distance a between the two ends is 20. (processing error).
（ｉｉｉ）前記凸部台座１６の長手方向寸法をマイクロ
波半導体素子１０１の長手方向寸法りに近付けることで
前記マイクロ波半導体素子１０１の設置位置が容易に、
かつ、はぼ一義的に決まり、マウントの位置ずれから起
こるボンディングワイヤ長の不均一を防ぐことができる
。(iii) By bringing the longitudinal dimension of the convex portion pedestal 16 closer to the longitudinal dimension of the microwave semiconductor element 101, the installation position of the microwave semiconductor element 101 can be easily set;
In addition, the bonding wire length is determined almost uniquely, and it is possible to prevent non-uniform bonding wire lengths caused by misalignment of the mount.
（ｉｖ ）前記凸部台座１６の形状を逆台形型としたこ
とで、マイクロ波半導体素子１０１と整合回路１０２を
キャリアプレートの加工残り上にマウントをすることに
よって生じるマウント不良を防ぐことができる。(iv) By making the shape of the convex portion pedestal 16 into an inverted trapezoidal shape, it is possible to prevent mounting defects caused by mounting the microwave semiconductor element 101 and the matching circuit 102 on the unprocessed portion of the carrier plate.
以上述べたように、本発明によれば、マイクロ波半導体
素子と整合回路の電極面を同一平面上にでき、かつその
間隔を大幅に狭めることができるために両者を接続する
ボンディングワイヤ長を短縮できる。このため、ボンデ
ィングワイヤのインダクタンス成分を低減でき回路設計
の際の制約を大きく緩和できる。As described above, according to the present invention, the electrode surfaces of the microwave semiconductor element and the matching circuit can be made on the same plane, and the distance between them can be significantly narrowed, so that the length of the bonding wire that connects the two can be shortened. can. Therefore, the inductance component of the bonding wire can be reduced, and restrictions on circuit design can be greatly relaxed.
また、マイクロ波半導体素子と整合回路両者のマウント
位置をほぼ一義的に決められ、マウント位置ずれを防止
できる。これにより、ボンディングワイヤ長の不均一に
よるマイクロ波半導体装置の特性と歩留りの低下を抑え
ることができる。Furthermore, the mounting positions of both the microwave semiconductor element and the matching circuit can be determined almost uniquely, and displacement of the mounting positions can be prevented. This makes it possible to suppress deterioration in the characteristics and yield of the microwave semiconductor device due to non-uniform bonding wire lengths.
さらに、凸部台座の形状を逆台形型としたことで、マイ
クロ波半導体素子と整合回路両者をキャリアプレートの
加工残り上にマウントをすることによって生じるマウン
ト不良を防ぐことができ、マイクロ波半導体装置の特性
と歩留りの低下を抑えることができる。Furthermore, by making the shape of the convex pedestal into an inverted trapezoid, it is possible to prevent mounting defects caused by mounting both the microwave semiconductor element and the matching circuit on the unprocessed portion of the carrier plate. properties and yield can be suppressed.
第１図（ａ）〜（ｃ）は、本発明のキャリアプレートの
一実施例に係り、（ａ）は平面図、（ｂ）は断面図、（
ｃ）は一部を拡大して示す断面図、第２図は従来のキャ
リアプレートを示す平面図、第３図は従来のパッケージ
を示す平面図、第４図は第２図、第３図で示した従来の
キャリアプレートならびにパッケージのＡ−Ａ間の断面
図、第５図は従来のキャリアプレートを用いることによ
り生じたマウント不良例を示す断面図、第６図はマウン
ト位置不良例を示す平面図である。
１０１・・・マイクロ波半導体素子
１０２・・・整合回路
１０３．１３・・・キャリアプレート
１０４・・・パッケージ
１０５・・・ボンディングワイヤ
１０６．１６・・・凸部台座1(a) to (c) relate to one embodiment of the carrier plate of the present invention, in which (a) is a plan view, (b) is a sectional view, and (
c) is a partially enlarged cross-sectional view, Fig. 2 is a plan view showing a conventional carrier plate, Fig. 3 is a plan view showing a conventional package, and Fig. 4 is a cross-sectional view showing a conventional package. FIG. 5 is a cross-sectional view showing an example of a mounting failure caused by using the conventional carrier plate, and FIG. 6 is a plane view showing an example of a mounting position failure. It is a diagram. 101...Microwave semiconductor element 102...Matching circuit 103.13...Carrier plate 104...Package 105...Bonding wire 106.16...Convex pedestal
Claims (1)
るマイクロ波半導体素子用キャリアプレートにおいて、
前記台座上面の面積を前記台座下面の面積よりも大とな
し、かつ前記凸部台座の少なくとも一方向からみた断面
形状が逆台形型であることを特徴とするマイクロ波半導
体素子用キャリアプレート。In a microwave semiconductor device carrier plate in which a semiconductor device is mounted on a convex mounting base,
A carrier plate for a microwave semiconductor device, wherein the area of the upper surface of the pedestal is larger than the area of the lower surface of the pedestal, and the cross-sectional shape of the convex pedestal when viewed from at least one direction is an inverted trapezoid.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1324484A JP2685941B2 (en) | 1989-12-14 | 1989-12-14 | Carrier plate for microwave semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1324484A JP2685941B2 (en) | 1989-12-14 | 1989-12-14 | Carrier plate for microwave semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03185751A true JPH03185751A (en) | 1991-08-13 |
| JP2685941B2 JP2685941B2 (en) | 1997-12-08 |
Family
ID=18166320
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1324484A Expired - Lifetime JP2685941B2 (en) | 1989-12-14 | 1989-12-14 | Carrier plate for microwave semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2685941B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016167529A (en) * | 2015-03-10 | 2016-09-15 | 日本電信電話株式会社 | High frequency package |
| US9668338B2 (en) | 2013-03-27 | 2017-05-30 | Panasonic Intellectual Property Management Co., Ltd. | Semiconductor device |
-
1989
- 1989-12-14 JP JP1324484A patent/JP2685941B2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9668338B2 (en) | 2013-03-27 | 2017-05-30 | Panasonic Intellectual Property Management Co., Ltd. | Semiconductor device |
| JP2016167529A (en) * | 2015-03-10 | 2016-09-15 | 日本電信電話株式会社 | High frequency package |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2685941B2 (en) | 1997-12-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5391439A (en) | Leadframe adapted to support semiconductor elements | |
| US5574314A (en) | Packaged semiconductor device including shielded inner walls | |
| KR100475265B1 (en) | Lead frame, semiconductor device using it and manufacturing method thereof | |
| JP2848682B2 (en) | Semiconductor device for high-speed operation and film carrier used for this semiconductor device | |
| US5299091A (en) | Packaged semiconductor device having heat dissipation/electrical connection bumps and method of manufacturing same | |
| US6781223B2 (en) | Semiconductor device having a signal lead exposed on the undersurface of a sealing resin with an air gap between the signal lead and a mounting substrate | |
| US5901042A (en) | Package and semiconductor device | |
| US6046501A (en) | RF-driven semiconductor device | |
| EP0912997B1 (en) | Rf power package with a dual ground | |
| US6087721A (en) | Semiconductor device with a high-frequency bipolar transistor on an insulating substrate | |
| KR950014677B1 (en) | Integrated circuit mounting apparatus | |
| KR980012352A (en) | Manufacturing method of lead frame used for small semiconductor package and semiconductor package | |
| US5910681A (en) | Resin sealed semiconductor device | |
| JPH03185751A (en) | Carrier plate for microwave semiconductor element | |
| EP0408904A2 (en) | Surface mounting semiconductor device and method | |
| US4340901A (en) | Lead connecting structure for a semiconductor device | |
| US5161000A (en) | High-frequency thick-film semiconductor circuit | |
| KR940008342B1 (en) | Semiconductor device using film carrier | |
| JP3127895B2 (en) | Carrier for microwave semiconductor element, matching circuit board mounted on carrier, and microwave semiconductor device | |
| JP2901941B2 (en) | High frequency power semiconductor device | |
| JPH07122808A (en) | Semiconductor laser modulation circuit device | |
| US6399894B1 (en) | Wire bond compensation | |
| JPH0496503A (en) | Microwave semiconductor | |
| JP2634300B2 (en) | Semiconductor device | |
| JPH066512Y2 (en) | Integrated circuit package |