JP2685941B2 - Carrier plate for microwave semiconductor devices - Google Patents
Carrier plate for microwave semiconductor devicesInfo
- Publication number
- JP2685941B2 JP2685941B2 JP1324484A JP32448489A JP2685941B2 JP 2685941 B2 JP2685941 B2 JP 2685941B2 JP 1324484 A JP1324484 A JP 1324484A JP 32448489 A JP32448489 A JP 32448489A JP 2685941 B2 JP2685941 B2 JP 2685941B2
- Authority
- JP
- Japan
- Prior art keywords
- microwave semiconductor
- carrier plate
- semiconductor element
- matching circuit
- microwave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
Landscapes
- Junction Field-Effect Transistors (AREA)
Description
【発明の詳細な説明】 〔発明の目的〕 （産業上の利用分野） 本発明は、マイクロ波半導体素子用キャリアプレート
に係り、特に寄生インダクタンスによりその素子特性が
著しく影響を受けるマイクロ波半導体素子をマウントす
る為のマイクロ波半導体素子用キャリアプレートの改良
に関する。The present invention relates to a carrier plate for a microwave semiconductor element, and more particularly to a microwave semiconductor element whose element characteristics are significantly affected by parasitic inductance. The present invention relates to improvement of a carrier plate for mounting a microwave semiconductor device.
（従来の技術） 社会の情報化が急速に進展しつつある現在、大量の情
報を伝達する手段として数GHz以上のマイクロ波を用い
た通信方式が実用化されている。さらに、マイクロ波通
信システムの小型化、高信頼化を目的として、同システ
ムの固体化が進められている。このシステムの固体化に
用いられるマイクロ波半導体装置は、例えば第２図並び
に第３図に示したように、マイクロ波半導体素子101
と、該マイクロ波半導体素子101の特性インピーダンス
を回路側特性インピーダンスに整合させる為に用いられ
る整合回路102と、前記マイクロ波半導体素子101と整合
回路102をマウントするキャリアプレート103あるいはパ
ッケージ104と、さらに前記マイクロ波半導体素子101と
整合回路102を電気的に接続する為のボンディングワイ
ヤ105から構成されている。(Prior Art) At present, as the informationization of society is rapidly progressing, a communication system using microwaves of several GHz or more is put into practical use as a means for transmitting a large amount of information. Furthermore, for the purpose of downsizing and high reliability of the microwave communication system, solidification of the system is being promoted. A microwave semiconductor device used for solidification of this system is, for example, as shown in FIG. 2 and FIG.
A matching circuit 102 used to match the characteristic impedance of the microwave semiconductor element 101 to the circuit side characteristic impedance, a carrier plate 103 or a package 104 for mounting the microwave semiconductor element 101 and the matching circuit 102, and A bonding wire 105 for electrically connecting the microwave semiconductor element 101 and the matching circuit 102 is configured.
マイクロ波回路においては、その動作周波数が高くな
ると、マイクロ波半導体素子と整合回路を電気的に接続
する為のボンディングワイヤ105のインダクタンス成分
は無視できない値となる。一般に用いられている直径25
μｍの金製のボンディングワイヤを例にとると、そのイ
ンダクタンスは、長さ1mmあたり1nH程度とされている
が、これは周波数30GHzにおいては30Ωのインピーダン
スに相当する。このように高周波動作においては、無視
できない値をとるボンディングワイヤのインダクタンス
成分を低減するために、ボンディングワイヤをできるだ
け短くし、さらにボンディングワイヤ本数をできる限り
多くする手法が一般的にとられている。In the microwave circuit, when the operating frequency becomes higher, the inductance component of the bonding wire 105 for electrically connecting the microwave semiconductor element and the matching circuit becomes a non-negligible value. 25 commonly used diameters
Taking a bonding wire made of gold of μm as an example, its inductance is about 1 nH per 1 mm in length, which corresponds to an impedance of 30Ω at a frequency of 30 GHz. As described above, in the high-frequency operation, in order to reduce the inductance component of the bonding wire, which has a non-negligible value, it is general to shorten the bonding wire as much as possible and further increase the number of bonding wires as much as possible.
第４図に第２図に示した従来のキャリアプレート103
上にマイクロ波半導体素子101を設置したマイクロ波半
導体装置の線分Ａ−Ａ間での矢印方向断面図を示す。FIG. 4 shows the conventional carrier plate 103 shown in FIG.
FIG. 3 is a cross-sectional view in the arrow direction between line segments AA of the microwave semiconductor device having the microwave semiconductor element 101 installed thereon.
第４図において、ボンディングワイヤ105を短くし、
インダクタンス成分の低減を図る為には、前記整合回路
102の上面と、前記マイクロ波半導体素子101の電極面を
同一平面上にすることが有効である。通常、整合回路10
2に用いられるアルミナ基板は、250±10μｍの厚さであ
る。また、マイクロ波半導体素子101の厚さは、熱抵抗
の低減とハンドリングの容易性を考慮して50〜100μｍ
程度が用いられる。そこで両者の電極面を同一平面上に
する為に前記マイクロ波半導体素子101をマウントする
部分に凸部台座106を設けた形状のキャリアプレートが
従来より用いられている。しかし、前記凸部台座106の
加工に際しては、型入れ、切削工程を注意深く行なった
としても台座側面には半径R0＝50μｍ程度の丸み（以下
加工残りと略称）107、108、109、110が残ることは避け
られない。従って、例えばマイクロ波半導体素子の寸法
をマイクロ波伝搬方向（以下長手方向と呼ぶ；第４図の
矢印方向）Ｌ＝500±10μｍ、横方向500±10μｍとした
場合、前記凸部台座106の上面の長手方向の寸法Ｕは、
前記加工に伴って生じる加工残りR0を考慮すると、Ｕ≧
Ｌ＋２R0となり、前記マイクロ波半導体素子101の長手
方向寸法Ｌよりも２R0＝100μｍ以上長くなってしま
う。また、前記マイクロ波半導体素子101端と、前記整
合回路102端との間隔ｌも100μｍ以下（ｌ≧２R0）にな
ってしまう。すなわち従来のキャリアプレートを用いる
場合には、両者を電気的に接続する為の前記ボンディン
グワイヤ105の長さは２R0以下に短く出来なかった。こ
のため整合回路の設計にあたっては、前記ボンディング
ワイヤ105によるインダクタンス成分を考慮した設計を
行う必要があり、回路設計の自由度を著しく低下させて
いた。また、前記凸部台座106上面の長手方向の寸法Ｕ
は、前記マイクロ波半導体素子101の長手方向の寸法Ｌ
に対し、２R0＝100μｍ以上長いこと、前記凸部台座106
端と前記整合回路102端を加工残りR0の２倍以上あけな
ければならないことから第５図に例示する如くマウント
化置ずれが生じ、このため前記マイクロ波半導体素子10
1の下部や、前記整合回路102の下部に空隙107が生じた
り、第６図に例示する如く、前記ボンディングワイヤ10
5の長さが不均一になったりすることが往々に発生し、
このことがマイクロ波半導体装置の特性を悪化させ、ひ
いては歩留り低下の一因となっていた。In FIG. 4, shortening the bonding wire 105,
In order to reduce the inductance component, the matching circuit
It is effective to make the upper surface of 102 and the electrode surface of the microwave semiconductor element 101 on the same plane. Usually matching circuit 10
The alumina substrate used in 2 has a thickness of 250 ± 10 μm. The thickness of the microwave semiconductor element 101 is 50 to 100 μm in consideration of reduction of thermal resistance and ease of handling.
Degree is used. Therefore, a carrier plate having a shape in which a convex pedestal 106 is provided in a portion where the microwave semiconductor element 101 is mounted is conventionally used in order to make the electrode surfaces of both electrodes on the same plane. However, when the convex pedestal 106 is machined, even if the mold inserting and cutting steps are carefully performed, the side surface of the pedestal is rounded with a radius R 0 = 50 μm (hereinafter abbreviated as unprocessed) 107, 108, 109, 110. It is inevitable to remain. Therefore, for example, when the dimensions of the microwave semiconductor element are L = 500 ± 10 μm in the microwave propagation direction (hereinafter referred to as the longitudinal direction; arrow direction in FIG. 4) and 500 ± 10 μm in the lateral direction, the upper surface of the convex portion pedestal 106. The longitudinal dimension U of
Considering the machining residual R 0 generated by the machining, U ≧
L + 2R 0 , which is longer than the longitudinal dimension L of the microwave semiconductor element 101 by 2R 0 = 100 μm or more. Further, the distance l between the end of the microwave semiconductor element 101 and the end of the matching circuit 102 is also 100 μm or less (l ≧ 2R 0 ). That is, when the conventional carrier plate is used, the length of the bonding wire 105 for electrically connecting the two cannot be shortened to 2R 0 or less. Therefore, when designing the matching circuit, it is necessary to consider the inductance component due to the bonding wire 105, which significantly reduces the degree of freedom in circuit design. Further, the dimension U of the upper surface of the convex pedestal 106 in the longitudinal direction is
Is the dimension L of the microwave semiconductor element 101 in the longitudinal direction.
On the other hand, 2R 0 = 100 μm or more longer, the convex base 106
Since the end and the end of the matching circuit 102 must be opened at least twice as much as the unprocessed R 0 , mounting displacement occurs as illustrated in FIG. 5, and therefore the microwave semiconductor device 10
A void 107 is formed in the lower part of 1 or in the lower part of the matching circuit 102, and as shown in FIG.
It often happens that the length of 5 becomes uneven,
This deteriorates the characteristics of the microwave semiconductor device and eventually contributes to the reduction in yield.
（発明が解決しようとする課題） 以上述べたように、従来のマイクロ波半導体装置で用
いられるキャリアプレートでは、加工残りをなくすこと
ができないためマイクロ波半導体素子端−整合回路端間
の間隔短縮に限界が生じ、これがためボンディングワイ
ヤ長の短縮を制限し、整合回路設計の自由度を低下させ
ていた。(Problems to be Solved by the Invention) As described above, in the carrier plate used in the conventional microwave semiconductor device, the processing residue cannot be eliminated, so that the distance between the microwave semiconductor element end and the matching circuit end can be shortened. There is a limit, which limits the shortening of the bonding wire length and reduces the degree of freedom in matching circuit design.
また、加工残りの存在は、マイクロ波半導体素子並び
に整合回路基板のマウント位置の規定を困難にするた
め、マウント不良や、マウント位置ずれによるボンディ
ングワイヤ長の不均一を招きマイクロ波半導体装置の特
性や歩留りを低下させていた。In addition, the presence of unprocessed parts makes it difficult to define the mounting positions of the microwave semiconductor element and the matching circuit board, and thus causes mounting defects and nonuniformity of the bonding wire length due to displacement of the mounting position, resulting in the characteristics of the microwave semiconductor device. It was reducing the yield.
本発明は、上記欠点を除去すべくなされたものであっ
て、加工残りによる影響を極力抑えたマイクロ波半導体
素子用キャリアプレートを提供することを目的とする。The present invention has been made in order to eliminate the above-mentioned drawbacks, and an object of the present invention is to provide a carrier plate for a microwave semiconductor device in which the influence of a processing residue is suppressed as much as possible.
（課題を解決するための手段） 本発明のマイクロ波半導体素子用キャリアプレート
は、凸状のマウント台座部に半導体素子がマウントされ
てなるマイクロ波半導体素子用キャリアプレートにおい
て、前記台座上面の面積を前記台座下面の面積よりも大
となし、かつ前記凸部台座の少なくとも一方向からみた
断面形状が逆台形型に形成されてなることを特徴とす
る。(Means for Solving the Problem) A microwave semiconductor element carrier plate of the present invention is a microwave semiconductor element carrier plate in which a semiconductor element is mounted on a convex mount pedestal, It is characterized in that the area is larger than the lower surface of the pedestal, and the cross-sectional shape of the convex pedestal viewed from at least one direction is formed in an inverted trapezoidal shape.
（作用） 本発明に係るキャリアプレートでは、マイクロ波半導
体素子をマウントする凸部台座の断面形状を逆台形型と
することで整合回路端を前記凸部台座の上面にマウント
されたマイクロ波半導体素子単に近接して位置せしめる
ことができる。このためボンディングワイヤ長は、キャ
リアプレートの加工残りに関係なく短縮することがで
き、整合回路設計の制約が大幅に緩和される。(Operation) In the carrier plate according to the present invention, the cross section of the convex pedestal for mounting the microwave semiconductor element is an inverted trapezoidal shape so that the matching circuit end is mounted on the upper surface of the convex pedestal. They can simply be placed in close proximity. For this reason, the bonding wire length can be shortened regardless of the unprocessed portion of the carrier plate, and the constraint on the matching circuit design is greatly relaxed.
また、キャリアプレートの前記凸部台座上面の長手方
向寸法をマイクロ波半導体素子の長手方向寸法に一致さ
せておくことが可能となり、前記マイクロ波半導体素子
と整合回路の位置は固定されるので、マウントの位置ず
れや、ボンディングワイヤ長の不均一を防ぐことがで
き、マイクロ波半導体装置の特性と歩留りの向上がはか
れる。Further, since it becomes possible to make the longitudinal dimension of the upper surface of the convex pedestal of the carrier plate coincide with the longitudinal dimension of the microwave semiconductor element, and the positions of the microwave semiconductor element and the matching circuit are fixed, the mount Can be prevented and the bonding wire length can be prevented from being nonuniform, and the characteristics and yield of the microwave semiconductor device can be improved.
（実施例） 以下、本発明の一つの実施例を第１図（ａ）、
（ｂ）、（ｃ）を参照して説明する。(Example) Hereinafter, one example of the present invention will be described with reference to FIG.
Description will be made with reference to (b) and (c).
なお、説明において、従来例においた述べた各部と変
わらない部分には従来の各部と同じ符号をつけて示し、
説明を省略する。In the description, parts that are the same as the parts described in the conventional example are denoted by the same reference numerals as the conventional parts,
Description is omitted.
第１図（ａ）、（ｂ）は各々本発明に係るキャリアプ
レートを用いたマイクロ波半導体装置の平面図ならびに
断面図であり、第１図（ｃ）は、第１図（ｂ）の凸部台
座近傍を拡大して示した図である。第１図に示しキャリ
アプレート13は、導電性材料例えば銅−タングステン合
金に金めっきを施したものである。前記キャリアプレー
ト13の中央部にはマイクロ波半導体素子101（幅500±10
μｍ、長手方向Ｌ＝500±10μｍ、厚さ100±10μｍ）を
マウントするために凸部台座16が形成されている。前記
凸部台座16の上面の長手方向の寸法はマウントを容易に
するため半導体素子101の長手方向寸法Ｌよりもわずか
に長い長手方向寸法Ｕ＝530±20μｍ、幅Ｗ＝530±20μ
ｍに設定してある。前記マイクロ波半導体素子101の厚
さ（100±10μｍ）と、整合回路102の厚さ（250±10μ
ｍ）の差を考慮し、両者の表面電極面の高さが一致する
ようにこの凸部台座16の高さＨは、本実施例ではＨ＝15
0±20μｍとした。1 (a) and 1 (b) are respectively a plan view and a sectional view of a microwave semiconductor device using a carrier plate according to the present invention, and FIG. 1 (c) is a projection of FIG. 1 (b). It is the figure which expanded and showed the part pedestal vicinity. The carrier plate 13 shown in FIG. 1 is a conductive material such as a copper-tungsten alloy plated with gold. At the center of the carrier plate 13, the microwave semiconductor device 101 (width 500 ± 10
μm, longitudinal direction L = 500 ± 10 μm, thickness 100 ± 10 μm), and a convex pedestal 16 is formed for mounting. The longitudinal dimension of the upper surface of the convex pedestal 16 is slightly longer than the longitudinal dimension L of the semiconductor element 101 in order to facilitate mounting. The longitudinal dimension U = 530 ± 20 μm and the width W = 530 ± 20 μm.
m. The thickness of the microwave semiconductor element 101 (100 ± 10 μm) and the thickness of the matching circuit 102 (250 ± 10 μm)
In consideration of the difference m), the height H of the convex pedestal 16 is set to H = 15 in this embodiment so that the heights of the two surface electrode surfaces coincide with each other.
It was set to 0 ± 20 μm.
凸部台座16の下部の長手方向の寸法Ｄは、この凸部台
座16の加工残りR0（＝50μｍ）と、その上部の長手方向
寸法Ｕから、Ｄ≦Ｕ−２R0となるように設計する。本実
施例では、Ｄ＝430±20μｍとした。また、その幅は、4
30±20μｍに設計した。The longitudinal dimension D of the lower portion of the convex pedestal 16 is designed so that D ≦ U−2R 0 from the unmachined portion R 0 (= 50 μm) of the convex pedestal 16 and the longitudinal dimension U of the upper portion. To do. In this embodiment, D = 430 ± 20 μm. Also, its width is 4
Designed to 30 ± 20 μm.
前記凸部台座の加工には、例えば、凸部を上部からプ
レス加工することで実現できる。The convex pedestal can be processed, for example, by pressing the convex from above.
本発明には次に挙げる利点がある。 The present invention has the following advantages.
（ｉ） 前記凸部台座16上にマイクロ波半導体素子101
をマウントすることでこのマイクロ波半導体素子101と
整合回路102の電極面を同一平面上にできる。(I) Microwave semiconductor device 101 on the convex base 16
By mounting, the electrode surfaces of the microwave semiconductor element 101 and the matching circuit 102 can be on the same plane.
（ii） マイクロ波半導体素子101端と整合回路102端と
の間隔ｌを20μｍ（加工の誤差）程度にまで短縮するこ
とができる。(Ii) The distance l between the end of the microwave semiconductor element 101 and the end of the matching circuit 102 can be shortened to about 20 μm (processing error).
（iii） 前記凸部台座16の長手方向寸法をマイクロ波
半導体素子101の長手方向寸法Ｌに近付けることで前記
マイクロ波半導体素子101の設置位置が容易に、かつ、
ほぼ一義的に決まり、マウントの位置ずれから起こるボ
ンディングワイヤ長の不均一を防ぐことができる。(Iii) By making the longitudinal dimension of the convex pedestal 16 close to the longitudinal dimension L of the microwave semiconductor element 101, the installation position of the microwave semiconductor element 101 can be easily and
It is almost uniquely determined, and it is possible to prevent nonuniformity of the bonding wire length caused by displacement of the mount.
（iv） 前記凸部台座16の形状を逆台形型としたこと
で、マイクロ波半導体素子101と整合回路102をキャリア
プレートの加工残り上にマウントをすることによって生
じるマウント不良を防ぐことができる。(Iv) Since the convex pedestal 16 has an inverted trapezoidal shape, it is possible to prevent a mounting failure caused by mounting the microwave semiconductor element 101 and the matching circuit 102 on the unprocessed part of the carrier plate.
以上述べたように、本発明によれば、マイクロ波半導
体素子と整合回路の電極面を同一平面上にでき、かつそ
の間隔を大幅に狭めることができるために両者を接続す
るボンディングワイヤ長を短縮できる。このため、ボン
ディングワイヤのインダクタンス成分を低減でき回路設
計の際の制約を大きく緩和できる。As described above, according to the present invention, the electrode surfaces of the microwave semiconductor element and the matching circuit can be on the same plane, and the distance between them can be significantly narrowed, so the length of the bonding wire connecting them is shortened. it can. For this reason, the inductance component of the bonding wire can be reduced, and restrictions in circuit design can be greatly relaxed.
また、マイクロ波半導体素子と整合回路両者のマウン
ト位置をほぼ一義的に決められ、マウント位置ずれを防
止できる。これにより、ボンディングワイヤ長の不均一
によるマイクロ波半導体装置の特性と歩留りの低下を抑
えることができる。Further, the mounting positions of both the microwave semiconductor element and the matching circuit can be determined almost uniquely, and the displacement of the mounting position can be prevented. As a result, it is possible to suppress the deterioration of the characteristics and yield of the microwave semiconductor device due to the nonuniform bonding wire length.
さらに、凸部台座の形状を逆台座型としたことで、マ
イクロ波半導体素子と整合回路両者をキャリアプレート
の加工残り上にマウントをすることによって生じるマウ
ント不良を防ぐことができ、マイクロ波半導体装置の特
性と歩留りの低下を抑えることができる。Further, since the convex pedestal has an inverted pedestal shape, it is possible to prevent a mounting failure caused by mounting both the microwave semiconductor element and the matching circuit on the unprocessed part of the carrier plate. It is possible to suppress the deterioration of the characteristics and yield.
第１図（ａ）〜（ｃ）は、本発明のキャリアプレートの
一実施例に係り、（ａ）は平面図、（ｂ）は断面図、
（ｃ）は一部を拡大して示す断面図、第２図は従来のキ
ャリアプレートを示す平面図、第３図は従来のパッケー
ジを示す平面図、第４図は第２図、第３図で示した従来
のキャリアプレートならびにパッケージのＡ−Ａ間の断
面図、第５図は従来のキャリアプレートを用いることに
より生じたマウント不良例を示す断面図、第６図はマウ
ント位置不良例を示す平面図である。 101……マイクロ波半導体素子 102……整合回路 103、13……キャリアプレート 104……パッケージ 105……ボンディングワイヤ 106、16……凸部台座1 (a) to 1 (c) relate to an embodiment of a carrier plate of the present invention, (a) is a plan view, (b) is a sectional view,
(C) is a partially enlarged sectional view, FIG. 2 is a plan view showing a conventional carrier plate, FIG. 3 is a plan view showing a conventional package, and FIG. 4 is FIG. 2 and FIG. FIG. 5 is a cross-sectional view of the conventional carrier plate and the package taken along the line AA in FIG. 5, FIG. 5 is a cross-sectional view showing an example of mounting failure caused by using the conventional carrier plate, and FIG. 6 is an example of mounting position failure. It is a top view. 101 …… Microwave semiconductor device 102 …… Matching circuit 103,13 …… Carrier plate 104 …… Package 105 …… Bonding wire 106,16 …… Convex pedestal
Claims (1)
トされてなるマイクロ波半導体素子用キャリアプレート
において、前記台座上面の面積を前記台座下面の面積よ
りも大となし、かつ前記凸部台座の少なくとも一方向か
らみた断面形状が逆台形型であることを特徴とするマイ
クロ波半導体素子用キャリアプレート。1. A microwave semiconductor device carrier plate in which a semiconductor device is mounted on a convex mount pedestal, wherein the area of the upper surface of the pedestal is larger than the area of the lower surface of the pedestal, and A carrier plate for a microwave semiconductor device, characterized in that it has an inverted trapezoidal cross-sectional shape when viewed from at least one direction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1324484A JP2685941B2 (en) | 1989-12-14 | 1989-12-14 | Carrier plate for microwave semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1324484A JP2685941B2 (en) | 1989-12-14 | 1989-12-14 | Carrier plate for microwave semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03185751A JPH03185751A (en) | 1991-08-13 |
| JP2685941B2 true JP2685941B2 (en) | 1997-12-08 |
Family
ID=18166320
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1324484A Expired - Lifetime JP2685941B2 (en) | 1989-12-14 | 1989-12-14 | Carrier plate for microwave semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2685941B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6226143B2 (en) | 2013-03-27 | 2017-11-08 | パナソニックＩｐマネジメント株式会社 | Semiconductor device |
| JP6352839B2 (en) * | 2015-03-10 | 2018-07-04 | 日本電信電話株式会社 | High frequency package |
-
1989
- 1989-12-14 JP JP1324484A patent/JP2685941B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03185751A (en) | 1991-08-13 |
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