JPH0318157B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a trimmable electronic timepiece, and more specifically, the present invention relates to an electronic timepiece that can be trimmed so that the power supplied to the main circuitry of the electronic timepiece reaches a required minimum consumption amount. Regarding watches.

In electronic watches, it is required to minimize the power consumed by a crystal oscillation circuit and a frequency division circuit that divides the frequency of its oscillation output. In order to meet this demand, an electronic timepiece having the configuration shown in FIG. 1 has recently been proposed. Electronic clock 1 shown in Fig. 1
A constant voltage source 3 is connected to both ends of the battery 2, a current limiting element 5 is connected by its output 4, and an oscillation circuit 6 is connected.
The intersection 8 of the power supplies of the frequency dividing circuit 7 and the other end of the current limiting element 5 are connected, and the other power terminals of the oscillation circuit 6 and the frequency dividing circuit 7 are connected to the other end 9 of the battery 2. . The current limiting element 5 is made of a MOSFET, and the oscillation circuit 6 is made of a P channel MOS transistor and an N channel MOS transistor.
It consists of a complementary MOS inverter consisting of channel MOS transistors connected in series.

Next, we will explain the operation of the circuit shown in Fig. 1.As shown in Fig. 2, P-channel MOS transistors (not shown) constituting the inverter
Threshold voltage V _TP and N-channel MOS
A voltage V _D2 , which is the threshold voltage V _TN of a transistor (not shown) and a voltage V ₀ that turns on both the P-channel MOS transistor and the N-channel MOS transistor, is applied between it and the power supply line 8 in FIG. However, it is necessary at the start of oscillation.

The voltage V _D2 at the start of oscillation is expressed by equation (1).

V _D2 ≧ | V _TP | +V _TN +V ₀ ...(1) Once oscillation starts, the relationship in equation (1) becomes the relationship in equation (2). If the voltage for maintaining oscillation is V _D1 , then V _D2 ≧V _D1 ≧｜V _TP |+V _TN ...(2) In Fig. 3, the current limiting element 5 of Fig. 1 is shown.
The relationship between the source-drain voltage V _DS and the drain current _ID of a MOSFET when configured with a MOSFET is shown. If the voltage of the output 4 from the reference voltage circuit 3 in FIG. 1 is _VG , then FIG. 3 shows the relationship between the source-drain voltage V _DS and the drain current _ID . If the voltage applied to both ends 9 _{and 10} of the battery 2 in _FIG .
When the MOSFET's saturated source-drain voltage V _S or higher, a current I _D1 flows, which is a constant value, and when it is lower _, a current I _D2 flows, which decreases as the source-drain voltage V _DS decreases. .

When V _DD −V _D ≧V _S , I _D = I _D1 constant value V _DD −V _D V _S 〃 〃 I _D = I _D2 variable value Considering the oscillation start point in Figure 1, the frequency divider circuit is not operating, so if the current consumption of the frequency divider circuit at that time is I' _D1V , the value is extremely small.
Therefore, the maximum value of the current flowing through the current limiting element is
The oscillation circuit can be used for most of _ID1 . If the current in the oscillation circuit at the time of starting oscillation is I′osc, then
The relationship I _D1 I′osc holds true. If the voltage required to start oscillation is greater than the difference between the power supply voltage V _DD shown in Figure 3 and the saturated source-drain voltage V _S of the MOS current limiting element, one end 9 of the power supply shown in Figure 1 is required. The voltage V _D applied to the intersection point 8 automatically increases to the voltage V _D2 required to start oscillation.

At this time, the current flowing through the current limiting element 5 is V _D
decreases as the value increases.

When using a complementary MOS inverter, the first condition for starting oscillation is that the applied voltage satisfies the condition. The second condition is that the current required to start oscillation satisfies the condition, so the voltage applied to the oscillation circuit 6 and the frequency dividing circuit 7 is
The voltage V _D increases and the current I ₀ of the current limiting element decreases until the voltage V _D reaches the point in the power product equation (3) that satisfies the above two conditions. When K is the power product required to start oscillation, the bias is automatically changed until V _D ·I _D ≧K (3) holds.

If the voltage required to start oscillation is less than the difference between the power supply voltage V _DD and the source-drain voltage V _S of the current limiting element, divide the saturation current I _D1 of the current limiting element from the oscillation starting current I′osc. It is divided by the circuit current I′ _D1V , and formula (4) is established.

I _D1 = I'osc + I' _D1V ...(4) From the above, when oscillation starts normally, the current I' _D1V required for frequency division increases and the current I'osc of the oscillation circuit decreases, respectively. Maintaining the oscillation circuit current IOSC
becomes the current I _D1V of the frequency divider circuit during normal oscillation, and the sum does not change, so the relationships of equations (5), (6), and (7) hold true.

I _D1V ＞I′ _D1V ……(5) Iosc＜I′osc ……(6) I _D1 ＝Iosc＋I _D1V ＝I′osc＋I′ _D1V ……(7) These operations are provided by the current limiting element 5. Since the current is distributed between the frequency divider circuit 7 and the oscillation circuit 6, it is important to make sure that the ratio of current required at the start of oscillation and at the time of stable oscillation is different between the oscillation circuit and the frequency divider circuit. We are using. or,
Since this is not a method that controls voltage, the voltage applied to the oscillation circuit and frequency divider circuit is automatically varied and can be driven at the optimal voltage, so unlike voltage control methods, it is determined whether oscillation has started. This eliminates the need for additional circuitry, resulting in open-loop operation. Therefore, once stable operating conditions are set, stable operation can be maintained.

By the way, the constant voltage source 3 and the current limiting element 5 are as follows.
For example, the circuit configuration shown in Figure 4 is used, but variations occur when converting this circuit into an IC.
There is a problem in that the current-voltage characteristic shown in FIG. 3 deviates from the desired state, resulting in various problems. In particular, if there is a variation in the magnitude of the current value I _D1 and the value of I _D1 becomes larger than the expected current range, the frequency divider circuit 7 will malfunction and will not operate normally, but the I _D1 will When the value falls below a predetermined value, the operation of the circuit will stop. Furthermore, even if the magnitude of I _D1 is within the operable range of the circuit, it may not always be possible to achieve the minimum necessary power supply state under steady operation conditions, so it is necessary to add such a power control circuit. In some cases, the original meaning was lost.

Therefore, an object of the present invention is to trim the current limiting value of the current limiting element so that it is within a desired range by trimming, and to operate the circuit with the minimum necessary power. Our goal is to provide the best possible electronic clock.

Hereinafter, the present invention will be explained in detail with reference to illustrated embodiments.

FIG. 5 shows a configuration diagram of an electronic timepiece according to the present invention. The electronic clock 21 includes a crystal oscillation circuit 2
2, comprising a frequency dividing circuit 23 and an arithmetic display circuit 24,
One power terminal of each of these circuits is the + terminal of the battery 25.
Connected to the pole terminal. The other power terminal of the arithmetic display circuit 24 is grounded, while the other power terminals of the crystal oscillation circuit 22 and the frequency dividing circuit 23 are connected in common, and the drains of the N-channel MOS transistors 26a to 26c for current limiting are connected in common. It is connected to the. MOS transistors 26a to 26
The sources of c are commonly grounded, and the gates are commonly connected to the output line 28 of the constant voltage generating circuit 27.

The constant voltage generating circuit 27 consists of a depletion type N-channel MOS transistor 29 and an enhancement type N-channel MOS transistor 30. The source and gate of the MOS transistor 29, whose drain is connected to the + terminal of the battery 25, are short-circuited. , are connected to the gate and drain of the MOS transistor 30. The source of the MOS transistor 30 is grounded, and the constant voltage generated at the connection point 31 between the two MOS transistors 29 and 30 is generated on the output line 28 as a bias voltage _VB .

The operation in which the power supplied to the oscillation circuit 22 and the frequency dividing circuit 23 is automatically adjusted by the constant voltage generation circuit 27 and the current limiting element consisting of a MOS transistor is as explained in FIGS. 1 to 4. is exactly the same. The current limiting MOS transistor 26a is used for the purpose of adjusting the circuit so that this power supply adjustment operation is performed as expected and the circuit can operate with the minimum amount of power.
26c to 26c are designed so that the respective drain currents I _Da , I _Db , and I _Dc are different when the drain-source voltage is saturated. And these three
The MOS transistors 26a to 26c are arranged so that only any one of the MOS transistors can be operated as a current limiting element.
Each drain circuit is provided with wiring portions 32a, 33b, and 33c for disconnecting transistors, and by selectively disconnecting these wiring portions, only a desired MOS transistor can be used as a current limiting element. It is possible to set the current limiting characteristic to a desired characteristic. Therefore, unlike the case where only one current limiting element is used to limit the current flowing through the circuits 22 and 23, even if the characteristics of the current limiting element or the voltage generating circuit 27 vary due to manufacturing reasons, the wiring section 32a, 32b, 32
By selecting the cut point c, it is possible to change the combination of MOS transistors used as current limiting elements and select the combination of MOS transistors that operates the circuit with the least power consumption without interfering with circuit operation. .

How the wiring portions 32a to 32c are cut depends largely on each element in the IC manufacturing process, and is caused by variations in the concentration of silicon impurities and the thickness of the oxide film at that time. Therefore, as shown in FIG. 6, chips 42a and 42 are provided with a plurality of current-limiting MOS transistors for monitoring at appropriate locations on the wafer 41.
b, 42c, and 42d in advance, and after all processes are completed, use these monitoring chips to connect the current limiting MOS on the monitoring chip.
For current limiting, which evaluates transistors and selectively cuts the wiring on the actual chip based on the evaluation results, allowing the circuit to operate with the minimum amount of power.
Determine the MOS transistor.

For example, in order to separate MOS transistors other than the determined MOS transistors from the circuit, a cutting mask is prepared for the wiring section to be cut, and the pattern is cut using this cutting mask to obtain the desired current. An actual chip with limiting MOS transistors may eventually be obtained.

In the above, MOS transistors 26a, 26b,
I have described the method of first wiring each drain of 26c and cutting unnecessary ones later.
Of course, it is also possible to manufacture the drain of the MOS transistor without wiring it in advance and perform the desired connection after evaluating it with a monitoring chip.

With this configuration, trimming can be performed to supply the minimum amount of power necessary for circuit operation, which not only significantly improves yield, but also allows for even if there are variations in characteristics during the manufacturing process.
Power consumption can be easily suppressed to a minimum value, and high-quality circuit devices can be supplied in large quantities at low cost.

According to the present invention, as described above, even if there are variations in the characteristics of elements that occur during the manufacturing process, the control value of the supplied power can be adjusted to a predetermined minimum level by trimming, and a high-quality electronic watch can be produced. You can get it.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the configuration of a conventional electronic watch, Figure 2 is a graph showing the relationship between the input and output voltages of the crystal oscillation circuit shown in Figure 1, and Figure 3 is a graph showing the relationship between the input and output voltages of the crystal oscillation circuit shown in Figure 1.
4 is a graph showing the relationship between the source-drain voltage V _DS and the drain current I _D of the current limiting element shown in FIG. 6 is a block diagram showing the configuration of an electronic timepiece according to the present invention, and FIG. 6 is a plan view showing an example in which a monitor is provided on the IC wafer for the electronic timepiece shown in FIG. 5. 21...Electronic clock, 22...Crystal oscillation circuit, 2
3... Frequency dividing circuit, 25... Battery, 26a, 26
b, 26c...N-channel MOS transistor,
27... Constant voltage generation circuit, 32a, 32b, 32
c... Wiring section, V _B ... Bias voltage.

Claims (1)

[Scope of Claims] 1. An oscillation circuit, a frequency divider circuit connected to the output terminal of the oscillation circuit, and a first frequency divider circuit connected to the current supply terminal of the oscillation circuit and the current supply terminal of the frequency divider circuit, respectively. an integrated constant current circuit group having a plurality of constant current circuits having different characteristics for controlling currents supplied to the oscillation circuit and the frequency dividing circuit, and control terminals of each of the constant current circuits; a constant voltage circuit that supplies a constant voltage for constant current operation; and a selectively separable wiring section that connects at least one of the plurality of constant current circuits and the first connection terminal, An electronic timepiece characterized in that the current flowing through the oscillation circuit and the frequency dividing circuit is set to an optimum value by selectively operating a plurality of the constant current circuits. 2. The electronic timepiece according to claim 1, wherein each of the plurality of constant current circuits is composed of a MOS transistor, and each of the control terminals is a gate electrode of each of the MOS transistors.