JPH03181150A - Method for processing re-wiring of automatic wiring system - Google Patents

Abstract

PURPOSE:To decrease overhead at the time of re-wiring processing in an automatic wiring system by storing interruption state information and starting the re-wiring processing from the state equal to the state of the interruption or next to the interruption at the time of re-wiring processing. CONSTITUTION:A computer executing automatic wiring processing outputs wiring results in an interruption state to a wiring information file 6 when automatic wiring processing is interrupted, processing contents in an automatic wiring program which has interrupted the processing, a name of layer in which inspection is being made at the time of interruption in case interruption takes place during inspection of a route, processing time required until the processing interruption and names of sections to be wired at the time of interruption are output to ar interruption state information file 7 to be stored. Then, when re-wiring processing is to be started, a position where the re-wiring is to be started and sections to be wired are determined by the information on the previous interruption state so that re-wiring is started from a state next to or equal to that at the time of previous interruption. Thus overhead at the time of re-wiring can be minimized.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an automatic wiring system that automatically designs wiring routes on a multilayer printed circuit board or a multilayer integrated circuit. The present invention relates to a rewiring processing method suitable for continuing processing.

[Conventional technology]

As printed circuit boards become more difficult and multi-layered, automatic wiring systems are required to have the ability to interrupt processing and re-route as appropriate in order to efficiently divide and process jobs. It's here.

FIG. 2 shows a general flowchart of process interruption/rewiring processing in a conventional automatic wiring system.

First, as an interruption preparation process 11 before starting the automatic wiring process 14, a timer is set to measure the processing time to determine whether the processing time is to be aborted (17), and a process abort command from the outside can be accepted at any time (18). In the automatic wiring processing 14, the processing time discontinuation determination 24 is carried out at specific intervals, and the processing time required up to now is compared with the processing discontinuation time specified at the start of the processing. Decide whether to suspend.

When the automatic wiring process 14 is interrupted by inputting a process abort command 18 or processing time abort determination 24,
The process is interrupted by executing an interruption termination process 16 such as storing the wiring results up to the present time. At this time, the unprocessed wiring target section is output as an unwired section in the wiring result. after that,
When rewiring the continuation of the interrupted automatic wiring result, unwired sections are extracted from the wiring results, and the wiring process is executed in the same manner as described above, using these as sections to be routed during rewiring. Then, the previous processing results and the current processing results are merged and output as a wiring result.

Regarding interruption and resumption of this type of automatic wiring processing,
For example, rV L S I 5yste+ss Des
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It is described in mationJ.

[Problem to be solved by the invention]

In multilayer printed circuit boards and multilayer integrated circuits, all layers are divided into several groups (layer groups) each consisting of multiple layers, and a wiring route is searched within an arbitrary layer group for each wiring target section, and the layer group is If a wiring route is not found in another layer group, the search is performed in another layer group, and this process is repeated until a wiring route is found. 1
Since the wiring route was searched starting from the th layer group, there was a problem in that the overhead during rewiring processing was large.

An object of the present invention is to reduce overhead during rewiring processing after processing interruption in an automatic wiring system for multilayer printed circuit boards and multilayer integrated circuits.

[Means to solve the problem]

In order to achieve the above object, the present invention provides an automatic wiring system that automatically designs wiring routes on a multilayer printed circuit board or a multilayer integrated circuit by repeating processing interruption and rewiring processing. When the rewiring process is performed, the rewiring process is started from the same state as the previous interruption or the next state after the interruption, based on the saved interruption state information.

[For production]

The wiring process is interrupted when a preset interruption condition occurs, for example, when a process abort command is input, or when the processing time exceeds the process abort time specified at the start of the process.

Information that identifies the processing routine that was being executed when this process was interrupted, information that identifies the route target section that was searching for a route, information that identifies the layer that was searching for a route, and the processing time required before the interruption. Output and save interruption status information such as.

After that, when rewiring processing is started, first, the interruption state information for the previous processing is input. Then, considering the processing content in the automatic wiring program that interrupted the previous process, the name of the layer that was being explored at that time, the processing time required until the interruption, etc., the location in the automatic wiring program to start rewiring is determined, Determine the layer name to start route exploration. Furthermore, the most efficient section is determined from the wiring section name at the time of the previous processing interruption when starting route exploration during rewiring processing. In this way, by starting the process in the determined rewiring start state and starting with the previous process, it is possible to skip the part completed in the previous process and the layer group for which route exploration has been completed. This makes it possible to minimize the overhead during rewiring processing.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of an automatic wiring system that realizes the present invention, and shows a computer 1 that executes automatic wiring processing, a design that includes the coordinates of a section to be routed, constraints on wiring that section, etc. An information file 2, a board information file 3 that has information about the board on which the wiring pattern is printed, an input card 4 that specifies a processing time limit value used to determine whether to interrupt processing, etc., a processing abort command, and other commands and data. Keyboard for inputting etc. 5.
The wiring information file 6 has wiring pattern information determined by automatic wiring processing, and the interruption state information file 7 has information indicating the state at the time of processing interruption.

FIG. 3 shows an example of a flowchart of automatic wiring processing according to the present invention, which includes interruption preparation processing 11° wiring preparation processing 1
2. Rewiring preparation process 13. The automatic wiring process 141 is roughly divided into a normal termination process 15 and an interrupted termination process 16.

The interruption preparation process 11 has a timer set 17 for measuring the processing time taken for this automatic wiring process, and a process 18 that allows it to accept a process abort command from the outside at any time.

In the wiring preparation process 12, the wiring target section and the constraint conditions for wiring that section are input from the design information file 2, and the size of the wiring area of the board, etc. are input from the board information file 3.
Input board information necessary for wiring, such as the number of layers to be wired, and prepare information necessary for automatic wiring.

The rewiring preparation process 13 consists of a process of inputting interruption state information 20 and determining a rewiring start state 21. When the current rewiring process is in progress, the rewiring preparation process 13 consists of a process of inputting interruption state information 20 and determining a rewiring start state 21. Enter the interruption status information consisting of the processing content, the layer name at that time if the interruption is during route exploration, the processing time required up to the time of the interruption, and the name of the section to be routed at the time of the interruption, and select the rerouting process this time. Determine the rewiring start state consisting of the processing content in the automatic wiring program to be started, the layer name at which route exploration is to be started, and the wiring target section.

The automatic wiring process 14 is performed for each wiring target amount.

Search for a wiring route that satisfies the wiring constraints for each wiring target section registered in the design information file 2,
Determine the best route. This automatic wiring process 14 includes one high-speed wiring process 2, which is characterized by high-speed wiring.
2, perform route exploration for all wiring target sections, and then perform high-speed wiring 2.
The process consists of a two-step process in which route exploration is performed using the high connection rate wiring 23 only for the sections that are unwired in step 2.

Normal termination processing 15 outputs the wiring results to the wiring information file 6 when the automatic wiring processing soil 4 has ended normally, and outputs logging information such as the number of unwired lines, processing time, number of wiring sections, and length of wiring sections. do.

The interruption termination process 16 is performed by inputting a process abort command 18.
When the automatic wiring process is interrupted by the processing time abort judgment 24, the wiring result in the interrupted state is output to the wiring information file 6, and the processing contents in the automatic wiring program that interrupted the process, when the process is interrupted during route exploration. The name of the layer being explored, the processing time required until the process was interrupted, and the name of the wiring target section at the time of the process interruption are output to the interruption state information file 7.

In addition, after the wiring preparation process 12, processing time discontinuation determination 24 is performed at arbitrary intervals, and it is determined whether the processing time up to the time of determination does not exceed the processing time limit specified by the input card 4, Decide whether to interrupt the process based on the result.

In the following explanation, the layer configurations of multilayer printed circuit boards and multilayer integrated circuits are A, B, C, and D as shown in Figure 4.
It consists of four layer groups.

It is assumed that each layer group is composed of multiple layers.

FIG. 5 shows an example of the operation of the present invention in comparison with the conventional system. Here, the first embodiment shows a case where the rewiring process is restarted from the next layer group before the interruption after the process is interrupted, and the second embodiment shows the case where the rewiring process is restarted from the same layer group as before the interruption after the process is interrupted. Shows when to start.

First, the case of the embodiment shown in FIG. 5 will be explained.

In the cut-off wiring, after executing the interruption preparation process 11 and the wiring preparation process (2), the automatic wiring process 14 is directly executed according to the judgment 19. Then, route search is performed in layer group B for the wiring target section for which no route was found.

Repeat this for layer groups C and D. Next, a route search is performed using the high connection rate wiring 23 in the wiring target sections that are unwired in the high-speed wiring 22 in the order of layer groups A to B-+C to D.

After the wiring preparation process 12, at an arbitrary interval, for example, at the end of each process or when route exploration for n sections to be routed is completed, the processing time is checked by the process time discontinuation decision 24, and it is determined whether to continue or interrupt the process. decide. Specifically, assuming that the processing time limit value specified in the input card 4 is TI, the time considered necessary for interruption termination processing is T, t, and the processing time required up to now is T, the following formula is used. It can be determined by

Ta Ta≦T Yu Processing interruption T, Ta>T → Processing continuation Also, from the processing time at the end of processing in the system and at the end of route exploration for each layer group, the processing content and processing layer can be determined as shown in Figure 6. Create a table consisting of groups and processing times.

In this way, as shown by 51 in FIG. 5, if it is decided to interrupt the process by the processing time abort decision 24 during high connection rate wiring in the layer group B, then the interruption end process is executed by the 1 decision 25, and the intermediate state The wiring results are stored in the wiring information file 6, and the 6th wiring result is stored as the interruption state information.
The table shown in the figure and the name of the wiring target section currently being processed are stored in the interruption state information file 7, and the initial wiring is completed.

FIG. 7 shows an example of the contents of the interruption state information file at this time.

Is rewiring interrupted in the same way as initial wiring? ! ! Preparation process 11,
After executing the wiring preparation process 12, a rewiring preparation process 13 is executed according to a determination 19. Here, the suspended state information human power 2
In process 0, the previous interruption state information shown in FIG. 7 is input. As a result, as shown by 71 in Fig. 7, it can be seen that the previous interruption was in layer group B of high connection rate wiring, but 1
Since layer group B requires longer processing time 72 than layer group A, it is thought that even if layer group B is searched again, the effect of route discovery will be small, so the rewiring process is
As shown by 51 in FIG. 5, it is decided to start from the bottom group C of high connection rate wiring. Furthermore, since the process starts from a layer group different from the previous one, the wiring target section starts from the unwired area where the wiring is first. In this way, the automatic wiring process 14 is started in the state determined in the rewiring start state determination 21.

After that, if the process is interrupted again midway, the interruption termination process 16 is executed in the same way as in the case of initial wiring. In addition, if the termination is normal, the final wiring result is stored in the wiring information file 6 in the normal termination process 15, and at the same time, the wiring results are quantitatively recorded, such as the number of unwired lines, processing time, number of sections to be processed, total wiring length, etc. It also outputs logging information for evaluation.

Next, Example 2 shown in FIG. 5 will be described. It is assumed that the initial wiring is executed in the same manner as in the first embodiment, and that the process is interrupted by a processing abort command from the keyboard 5 during the route search for layer group B using high-speed wiring, as shown at 53 in FIG. In the interruption termination process 16, after creating the interruption state information file 7 shown in FIG. 8, the previous interruption state information shown in FIG. 8 is input for rewiring as in the first embodiment. As a result, as shown at 73 in FIG. 8, it was found that there was an interruption during high-speed wiring processing in layer group B, and as shown in 74, the processing time of layer group B was compared with that of layer group A. The fact that the route is considerably shorter indicates that there is a high possibility that the route can be found by re-exploring in layer group B. Therefore, in the rewiring start state determination 21, it is determined to start rewiring from the high-speed wiring in layer group B, as shown at 54 in FIG. 5, and the automatic wiring process 14 is executed.

After that, as in the case of the embodiment, if the process is interrupted again, the intermediate wiring result is output to the wiring information file 6 in the interruption end process 16, and the interruption state information is output to the interruption state information file 7. If the processing is successfully completed to the end, the wiring results are output to the wiring information file 6, and logging information is also output.

Two embodiments have been described above, one in which rewiring is started from the next state at the time of interruption, and the other in which rewiring is started from the same state as at the time of interruption, but in both cases, the previous interruption state information is input when rewiring Based on this, the most efficient rewiring start state can be determined and executed, making it possible to minimize the overhead during rewiring and providing a high-performance automatic wiring system. For example, as shown in FIG. 6, in the first embodiment, there is no overhead at the time of rewiring, and in the case of the second embodiment, the overhead is only the shaded portion 55. On the other hand, in the conventional method, the initial wiring is 2
If there is an interruption during high connection rate wiring in the 1st layer group B, during rerouting processing, the wiring route is searched again from the 1st layer group A of high-speed wiring, resulting in overhead shown in the shaded area 56. .

〔Effect of the invention〕

As is clear from the above description, according to the present invention, the position to start rewiring and the target section are determined based on information regarding the previous interrupted state, and the rewiring is restarted from the next state after the previous interruption or from the same state as the interruption. Since wiring is started, there is no or minimal overhead during rewiring, and efficient automatic wiring processing is realized. As a result, a high-performance automatic wiring system for multilayer printed circuit boards and multilayer integrated circuits can be provided.

[Brief explanation of drawings]

Fig. 1 is a system configuration diagram of an embodiment of the present invention, Fig. 2 is a flowchart for explaining processing interruption/rewiring processing in the conventional method, and Fig. 3 is a flowchart for explaining processing interruption/rewiring processing in the method of the present invention. Flowchart for explanation; FIG. 4 is a diagram showing an example of the layer structure of a multilayer printed circuit board or a multilayer integrated circuit; FIG. 5 is a diagram showing an example of the operation of the present invention in comparison with the conventional method; FIG. 6 is a diagram showing the processing A diagram showing an example of time, and FIGS. 7 and 8 are diagrams showing an example of contents of a processing interruption state file. 1... Computer, 2... Design information file, 3... Board information file, 4... Input card, 5... Keyboard, 6...
- Wiring information file, 7... Interruption status information file. Figure 3 (EEI) Figure 4 Figure 6

Claims (1)

[Claims] (1) In an automatic wiring system that automatically designs wiring routes on multilayer printed circuit boards and multilayer integrated circuits by repeating processing interruption and rewiring processing, when processing is interrupted, interruption state information is saved, and during rewiring processing, the A rewiring processing method characterized by starting rewiring processing from the same state as the previous interruption or the next state after the interruption, based on saved interruption state information.