JPH03179806A - Oscillation circuit - Google Patents

Abstract

PURPOSE:To eliminate an unwanted current at external oscillation and to realize the oscillation circuit with low power consumption by providing a stop means of an inverter circuit and a means interrupting a feedback circuit. CONSTITUTION:A NAND gate 1 works as an inverter circuit with a stop means provided to control the continuity of a feedback circuit by a transfer gate 2. Moreover, an inverter circuit 3, an oscillation circuit input terminal 4, an oscillation circuit output terminal 5, a clock output terminal 6, a control input terminal 7 of the NAND gate 1, and a control input terminal 8 of the transfer gate 2 are provided. The level of the control input terminals 7, 8 is fixed to an H level at the self oscillation. The level of the control input terminals 7, 8 is fixed to an L level at the external oscillation to open the oscillation circuit output terminal 5 or to set the level to the H level, an external clock is inputted from the oscillation circuit input terminal 4 to supply the clock signal to the inside of an integrated circuit from the clock output terminal 6. Thus, the operation of the NAND gate 1 and the transfer gate 2 is completely stopped without consuming power at all, thus, low power consumption is realized.

Description

[Detailed description of the invention] Industrial applications The present invention relates to an oscillation circuit that achieves low power consumption.

Conventional technology In recent years, integrated circuits with built-in oscillation circuits have become popular (2), but when integrated into a system, each integrated circuit is less likely to oscillate in order to reduce costs.
Inputting a clock signal from the outside (hereinafter referred to as separately excited oscillation) is becoming more common.

A conventional oscillation circuit will be explained below.

FIGS. 3 and 4 are block diagrams showing examples of conventional oscillation circuits. In both figures, 3 is the inverting circuit, 9 is the feedback resistor, 12 is the input of the oscillation circuit, 13 is the output of the oscillation circuit, and 14
is the clock output.

FIG. 5 is a circuit diagram showing an example of an external circuit for performing self-oscillation. 12 is an input of the oscillation circuit, 13 is an output of the oscillation circuit, 15 is a crystal resonator, and 16 and 17 are capacitors each having one electrode fixed to the ground potential.

The operation of the conventional oscillation circuit configured as described above will be described below.

When performing self-oscillation, the external circuit shown in FIG. 5 is connected to the oscillation circuit shown in FIG. 3 or 4. Then crystal oscillator 1
It oscillates at a frequency determined by the resonance frequency of 5, and a clock signal is supplied from the clock output 14 to the inside of the integrated circuit.

On the other hand, when performing separately excited oscillation, only the oscillation circuit shown in FIG. 3 or 4 is used. By using the output 13 of the oscillation circuit as an oven and inputting a clock signal from the outside to the input 12 of the oscillation circuit, a clock is supplied from the clock output 14 to the inside of the integrated circuit.

Problems to be Solved by the Invention In recent years, there has been a desire for lower power consumption in order to realize portable systems and battery drive. Furthermore, as clock frequencies increase, the power consumption of oscillation circuits can no longer be ignored. However, the conventional oscillation circuit described above has the disadvantage that current flows through unnecessary elements such as feedback resistors during separately excited oscillation, resulting in increased power consumption.

The present invention aims to solve the above-mentioned conventional problems and provide an oscillation circuit with low power consumption.

Means for Solving the Problems To achieve this object, the oscillation circuit of the present invention has means for stopping the inverting circuit and means for disconnecting the feedback circuit.

Effect: With this configuration, unnecessary current can be eliminated during separately excited oscillation, and an oscillation circuit with low power consumption can be realized.

Embodiment First, an embodiment of the first invention will be described with reference to FIG. In FIG. 1, numeral 1 is a NAND gate, which functions as an inverting circuit with stopping means. 2 is a transfer gate that can control the conduction state of the feedback circuit. 3
is an inverting circuit, 4 is an oscillation circuit input, 5 is an oscillation circuit output, 6
is the clock output, 7 is the control input of NAND gate 1, 8
is the control input of transfer gate 2.

The operation of the oscillation circuit configured as above will be explained below.

During self-oscillation, the control hole cuff 8 is fixed at the -H'' level to perform the same operation as the conventional example.

During separately excited oscillation, fix control hole cuff 8 to L” level.
By fixing the oscillation circuit output 5 to oven or -H- level and inputting an external clock from the oscillation circuit input 4, a clock signal can be supplied from the clock output 6 to the inside of the integrated circuit. At this time, NAND gate 1 and transfer gate 2 have completely stopped operating.
Since it does not consume any electricity, it can achieve low power consumption.

Next, an embodiment of the second invention will be described with reference to FIG. In FIG. 2, numeral 10 is a tri-state inverter as an inverting circuit, and the output can be made high impedance by means of a control hole cuff. 2 is a transfer gate, and the conduction state of the feedback circuit can be controlled by a control input 8. 3 is another inversion circuit, 4 is an oscillation circuit input, 5 is an oscillation circuit output, and 6 is a clock output.

The operation of the oscillation circuit configured as above will be explained below.

During self-sustained oscillation, the control hole cuff 8 is fixed at the H" level to perform the same operation as the conventional example shown in FIG. 4.

During separately excited oscillation, control hole cuff 8 is fixed at "L" level, oscillation circuit input 4 is set to oven, and by inputting an external clock from the oscillation circuit output, a clock signal is sent from clock output 6 to the inside of the integrated circuit. can be supplied. At this time, the tri-state inverter, which is an inverting circuit, and the transfer gate completely stop operating, and do not consume any power, making it possible to reduce power consumption.

Effects of the Invention As described above, the oscillation circuit of the present invention achieves low power consumption by providing a means for stopping the 5-inverting circuit or a means for making it high impedance, and a means for cutting off the feedback circuit of the inverting circuit. It can be applied to portable devices with excellent results.

[Brief explanation of drawings]

Figures 1 and 2 are block diagrams showing the configuration of an embodiment of the oscillation circuit of the present invention, Figures 3 and 4 are block diagrams showing the configuration of a conventional oscillation circuit, and Figure 5 is a block diagram showing the configuration of a conventional oscillation circuit. FIG. 3 is a circuit diagram of a necessary external circuit. 1... NAND gate, 2... Transfer gate, 3... Inverting circuit, 7, 8...
...Control input.

Claims (2)

[Claims] (1) a first inverting circuit and a second inverting circuit having a common input; a feedback circuit that returns the output of the first inverting circuit to the input; and means for stopping the first inverting circuit; and means for disconnecting the feedback circuit. (2) A first inverting circuit and a second inverting circuit connected in series, a feedback circuit that returns the output of the first inverting circuit to an input, and means for making the first inverting circuit high impedance. , means for disconnecting the feedback circuit.