JPH0317899U - - Google Patents

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Publication number
JPH0317899U
JPH0317899U JP7520189U JP7520189U JPH0317899U JP H0317899 U JPH0317899 U JP H0317899U JP 7520189 U JP7520189 U JP 7520189U JP 7520189 U JP7520189 U JP 7520189U JP H0317899 U JPH0317899 U JP H0317899U
Authority
JP
Japan
Prior art keywords
voltage
sensor
signal
voltage level
disaster prevention
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7520189U
Other languages
Japanese (ja)
Other versions
JP2517864Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989075201U priority Critical patent/JP2517864Y2/en
Publication of JPH0317899U publication Critical patent/JPH0317899U/ja
Application granted granted Critical
Publication of JP2517864Y2 publication Critical patent/JP2517864Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Alarm Systems (AREA)
  • Fire Alarms (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、請求項1に記載の本考案の第1の実
施例のブロツク構成図、第2図はその電圧判別手
段の具体的な回路例、第3図は第2の実施例のブ
ロツク構成図、第4図はその電圧判別手段の具体
的な回路例、第5図は第2の実施例の防災中継器
を従来の防災システムに組み込んだ場合のシステ
ム構成図、第6図は、従来の防災システムの構成
図、第7図はそのシステムに使用される中継器の
断線検出手段の説明図である。 符号の説明、200……防災受信機、l……多
重信号ライン、11……多重伝送ユニツト、lc
……感知器電源ライン、ls……感知器回路、S
……感知器、14…………感知回路、13,15
……電圧レベル判別手段、12……CPU、VR
……基準電圧、15a……比較回路、1,1′…
…防災中継器、13b,15b……絶縁伝送回路
FIG. 1 is a block configuration diagram of a first embodiment of the present invention as set forth in claim 1, FIG. 2 is a specific circuit example of the voltage discrimination means, and FIG. 3 is a block diagram of the second embodiment. 4 is a specific circuit example of the voltage discrimination means, FIG. 5 is a system configuration diagram when the disaster prevention repeater of the second embodiment is incorporated into a conventional disaster prevention system, and FIG. FIG. 7, which is a block diagram of a conventional disaster prevention system, is an explanatory diagram of a disconnection detection means of a repeater used in the system. Explanation of symbols, 200...Disaster prevention receiver, l...Multiple signal line, 11...Multiple transmission unit, lc
...Sensor power line, ls...Sensor circuit, S
……Sensor, 14……Sensing circuit, 13, 15
...Voltage level determination means, 12...CPU, VR
...Reference voltage, 15a... Comparison circuit, 1, 1'...
...Disaster prevention repeater, 13b, 15b...Insulated transmission circuit.

Claims (1)

【実用新案登録請求の範囲】 (1) 防災受信機との間に多重信号ラインによつ
て接続されて、直流電源に重畳された多重信号に
よる監視信号を送受する多重伝送ユニツトと、 上記防災受信機との間に、感知器電源ラインに
よつて接続されて直流電源の供給を受ける一方、
上記感知器電源ラインから供給される直流電源を
受けて導出される感知器回線接続された感知器に
直流電源を供給するとともに、該感知器との間で
発報信号を含む信号の送受を行なう感知回路と、 上記感知器電源ラインを介して上記感知回路へ
の直流電源の供給状態を判別して、電圧判別信号
を出力する電圧レベル判別手段と、 上記多重信号ラインを介して上記多重伝送ユニ
ツトに供給される直流電源によつて駆動され、該
多重伝送ユニツトからの多重信号を信号処理して
上記感知回路へ必要な制御信号を出力するととも
に、上記感知回路からの発報信号を含む制御信号
及び上記電圧レベル判別回路からの電圧判別信号
を信号処理して上記多重信号伝送ユニツトを介し
て上記防災受信機に返信信号を伝送するCPUと
を備えたことを特徴とする、防災中継器。 (2) 上記電圧レベル判別手段が、予め定められ
た基準電圧を有した比較回路を備えており、上記
感知器電源ラインを介して上記感知回路に供給さ
れる直流電源の電圧レベルが上記基準電圧を越え
ているときには、上記比較回路から上記CPUに
電圧正常判別信号を伝送する一方、 上記直流電源の電圧レベルが上記基準電圧より
も低下したときには上記CPUに電圧異常判別信
号を伝送する構成にしたことを特徴とする、請求
項1に記載の防災中継器。 (3) 上記電圧レベル判別手段が、該判別手段か
ら上記CPUへ伝送する電圧判別信号に電気的に
絶縁するための絶縁伝送回路を更に備えたことを
特徴とする、請求項1に記載の防災中継器。
[Scope of Claim for Utility Model Registration] (1) A multiplex transmission unit that is connected to a disaster prevention receiver via a multiplex signal line and transmits and receives a monitoring signal based on a multiplexed signal superimposed on a DC power supply, and the above-mentioned disaster prevention receiver. It is connected to the sensor by a sensor power line and receives DC power, while
The DC power supply is supplied to the sensor connected to the sensor line, which is derived from receiving the DC power supplied from the sensor power line, and also sends and receives signals including alarm signals to and from the sensor. a sensing circuit; a voltage level determining means for determining the state of DC power supply to the sensing circuit via the sensor power line and outputting a voltage determining signal; is driven by a DC power supply supplied to the multiplex transmission unit, processes multiplexed signals from the multiplex transmission unit and outputs necessary control signals to the sensing circuit, and also outputs control signals including alarm signals from the sensing circuit. and a CPU that processes a voltage discrimination signal from the voltage level discrimination circuit and transmits a reply signal to the disaster prevention receiver via the multiplex signal transmission unit. (2) The voltage level determining means includes a comparison circuit having a predetermined reference voltage, and the voltage level of the DC power supply supplied to the sensing circuit via the sensor power line is set to the reference voltage. When the voltage level exceeds the reference voltage, a voltage normality determination signal is transmitted from the comparator circuit to the CPU, and when the voltage level of the DC power source falls below the reference voltage, a voltage abnormality determination signal is transmitted to the CPU. The disaster prevention repeater according to claim 1, characterized in that: (3) The disaster prevention according to claim 1, wherein the voltage level determining means further includes an insulating transmission circuit for electrically insulating the voltage determination signal transmitted from the determining means to the CPU. Repeater.
JP1989075201U 1989-06-27 1989-06-27 Disaster prevention repeater Expired - Lifetime JP2517864Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989075201U JP2517864Y2 (en) 1989-06-27 1989-06-27 Disaster prevention repeater

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989075201U JP2517864Y2 (en) 1989-06-27 1989-06-27 Disaster prevention repeater

Publications (2)

Publication Number Publication Date
JPH0317899U true JPH0317899U (en) 1991-02-21
JP2517864Y2 JP2517864Y2 (en) 1996-11-20

Family

ID=31615572

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989075201U Expired - Lifetime JP2517864Y2 (en) 1989-06-27 1989-06-27 Disaster prevention repeater

Country Status (1)

Country Link
JP (1) JP2517864Y2 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57106096U (en) * 1980-12-23 1982-06-30
JPS60117399A (en) * 1983-11-29 1985-06-24 ホーチキ株式会社 Abnormality alarm
JPS6223400U (en) * 1985-07-24 1987-02-12
JPS63262798A (en) * 1987-04-21 1988-10-31 株式会社日立ビルシステムサービス Power source state transmitter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57106096U (en) * 1980-12-23 1982-06-30
JPS60117399A (en) * 1983-11-29 1985-06-24 ホーチキ株式会社 Abnormality alarm
JPS6223400U (en) * 1985-07-24 1987-02-12
JPS63262798A (en) * 1987-04-21 1988-10-31 株式会社日立ビルシステムサービス Power source state transmitter

Also Published As

Publication number Publication date
JP2517864Y2 (en) 1996-11-20

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