JPH0317811U - - Google Patents

Info

Publication number
JPH0317811U
JPH0317811U JP7735089U JP7735089U JPH0317811U JP H0317811 U JPH0317811 U JP H0317811U JP 7735089 U JP7735089 U JP 7735089U JP 7735089 U JP7735089 U JP 7735089U JP H0317811 U JPH0317811 U JP H0317811U
Authority
JP
Japan
Prior art keywords
fet
voltage
output
terminal
series regulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7735089U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7735089U priority Critical patent/JPH0317811U/ja
Publication of JPH0317811U publication Critical patent/JPH0317811U/ja
Pending legal-status Critical Current

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  • Continuous-Control Power Sources That Use Transistors (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路図、第2
図は本考案の他の実施例を示す回路図、第3図は
従来装置の回路図である。 Q1,2,3…FET、Rs1,Rs2…電流
検出抵抗、U1…誤差アンプ(出力電圧安定化回
路)、U2,3…比較器(負荷電流調整手段)。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a circuit diagram showing another embodiment of the present invention, and FIG. 3 is a circuit diagram of a conventional device. Q1, 2, 3... FET, Rs1, Rs2... Current detection resistor, U1... Error amplifier (output voltage stabilization circuit), U2, 3... Comparator (load current adjustment means).

Claims (1)

【実用新案登録請求の範囲】 入力端子に直流電圧が印加され、出力端子に第
1の電流検出抵抗が接続された第1のFETと、 この第1のFETと並列に接続されるものであ
つて、入力端子に前記直流電圧が印加され、出力
端子に第2の電流検出抵抗が接続された第2のF
ETと、 当該第1及び第2のFETの出力する直流電圧
を検出する手段と、 この直流電圧検出手段で得た直流電圧と所定の
基準電圧とを比較して、この比較信号を前記第1
及び第2のFETの制御端子に送り、出力電圧の
安定化を行なう制御回路と、 を備えたFETシリーズレギユレータ回路であ
つて、 前記第1及び第2の電流検出抵抗で生ずる電圧
を比較する手段と、 この電圧比較手段で得た比較信号を前記第1又
は第2のFETの制御端子に送り、第1及び第2
のFETの出力電流のバランスをとる負荷電流調
整手段と、 を設けたことを特徴とするFETシリーズレギ
ユレータ回路。
[Claims for Utility Model Registration] A first FET to which a DC voltage is applied to the input terminal and a first current detection resistor connected to the output terminal; and a first FET connected in parallel with the first FET. and a second F, to which the DC voltage is applied to the input terminal and a second current detection resistor is connected to the output terminal.
ET, means for detecting the DC voltage output from the first and second FETs, and comparing the DC voltage obtained by the DC voltage detection means with a predetermined reference voltage, and transmitting this comparison signal to the first FET.
and a control circuit for stabilizing the output voltage by sending it to the control terminal of the second FET, the FET series regulator circuit comprising: comparing the voltages generated at the first and second current detection resistors. means for sending the comparison signal obtained by the voltage comparison means to the control terminal of the first or second FET, and
A FET series regulator circuit characterized by comprising: a load current adjustment means for balancing the output current of the FET; and a FET series regulator circuit.
JP7735089U 1989-06-30 1989-06-30 Pending JPH0317811U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7735089U JPH0317811U (en) 1989-06-30 1989-06-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7735089U JPH0317811U (en) 1989-06-30 1989-06-30

Publications (1)

Publication Number Publication Date
JPH0317811U true JPH0317811U (en) 1991-02-21

Family

ID=31619656

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7735089U Pending JPH0317811U (en) 1989-06-30 1989-06-30

Country Status (1)

Country Link
JP (1) JPH0317811U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022185945A1 (en) * 2021-03-04 2022-09-09 ローム株式会社 Linear power supply circuit
WO2023132118A1 (en) * 2022-01-06 2023-07-13 ローム株式会社 Linear power supply circuit and vehicle

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022185945A1 (en) * 2021-03-04 2022-09-09 ローム株式会社 Linear power supply circuit
WO2023132118A1 (en) * 2022-01-06 2023-07-13 ローム株式会社 Linear power supply circuit and vehicle

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