JPH031699U - - Google Patents

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Publication number
JPH031699U
JPH031699U JP5744989U JP5744989U JPH031699U JP H031699 U JPH031699 U JP H031699U JP 5744989 U JP5744989 U JP 5744989U JP 5744989 U JP5744989 U JP 5744989U JP H031699 U JPH031699 U JP H031699U
Authority
JP
Japan
Prior art keywords
reference voltage
input terminal
comparator
current
windings
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5744989U
Other languages
Japanese (ja)
Other versions
JPH0733598Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989057449U priority Critical patent/JPH0733598Y2/en
Publication of JPH031699U publication Critical patent/JPH031699U/ja
Application granted granted Critical
Publication of JPH0733598Y2 publication Critical patent/JPH0733598Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Control Of Stepping Motors (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の第1の実施例に係わるステツ
ピングモータ装置の回路図、第2図はステツピン
グモータの固定子と回転子を示す第3図の−
線に相当する部分の断面図、第3図は第2図の
−線に相当する部分の断面図、第4図は第1図
の制御回路を詳しく示す回路図、第5図は第1図
の各部の電圧波形図、第6図は第4図の第1〜第
3のコンデンサを省いた状態における第4図の各
部の波形図、第7図は基準電圧の変化を示す波形
図、第8図は第2の実施例のステツピングモータ
装置を示す回路図である。 1…電源、2a,2b,2c,2d…巻線、3
a,3b,3c,3d…スイツチング素子、4a
,4b…電流検出抵抗、6a,6b…制御回路、
7…励磁信号発生回路、10…基準電圧回路、C
1,C2,C3…第1、第2及び第3のコンデン
サ、S1,S2…電流制御用スイツチング素子。
FIG. 1 is a circuit diagram of a stepping motor device according to a first embodiment of the present invention, and FIG. 2 is a diagram showing the stator and rotor of the stepping motor.
3 is a sectional view of a portion corresponding to the line in FIG. 2, FIG. 4 is a circuit diagram showing the control circuit in FIG. 1 in detail, and FIG. Figure 6 is a waveform diagram of each part in Figure 4 with the first to third capacitors in Figure 4 omitted; Figure 7 is a waveform diagram showing changes in the reference voltage; FIG. 8 is a circuit diagram showing the stepping motor device of the second embodiment. 1... Power supply, 2a, 2b, 2c, 2d... Winding wire, 3
a, 3b, 3c, 3d... switching element, 4a
, 4b... current detection resistor, 6a, 6b... control circuit,
7... Excitation signal generation circuit, 10... Reference voltage circuit, C
1, C2, C3...first, second and third capacitors, S1, S2...switching element for current control.

Claims (1)

【実用新案登録請求の範囲】 (1) 直流源の一端と他端との間にそれぞれ接続
された第1及び第2の巻線と、 前記第1及び第2の巻線に直列にそれぞれ接続
された第1及び第2のスイツチング素子と、 前記第1及び第2の巻線の励磁期間を示す第1
及び第2の励磁信号を時間的に重なり合う期間を
有するように発生する励磁信号発生回路と、 前記第1及び第2の巻線を通つて流れる電流を
それぞれ検出するための第1及び第2の電流検出
器と、 第1及び第2の基準電圧端子を有する基準電圧
回路と、 前記第1の基準電圧端子に接続された一方の入
力端子を有すると共に前記第1の電流検出器に接
続された他方の入力端子を有し、前記第1の基準
電圧端子から与えられた第1の基準電圧と前記第
1の電流検出器から与えられた第1の検出電圧と
を比較して、前記第1の巻線に流れる電流が前記
第1の基準電圧に達した時点を示す信号を出力す
る第1のコンパレータと、 前記第1のコンパレータの出力に基づいて前記
第1のスイツチング素子をオン・オフ制御するた
めの第1の制御パルスを前記第1の励磁信号より
も短い周期で発生する第1の制御パルス発生回路
と、 前記第1の制御パルス発生回路から得られた前
記第1の制御パルスを前記第1の励磁信号で決定
された期間に前記第1のスイツチング素子に与え
る第1のゲート回路と、 前記第2の基準電圧端子に接続された一方の入
力端子を有すると共に、前記第2の電流検出器に
接続された他方の入力端子を有し、前記第2の基
準電圧端子から与えられた第2の基準電圧と前記
第2の電流検出器から与えられた第2の検出電圧
とを比較して前記第2の巻線に流れる電流が前記
第2の基準電圧に達した時点を示す信号を出力す
る第2のコンパレータと、 前記第2のコンパレータの出力に基づいて前記
第2のスイツチング素子をオン・オフ制御するた
めの第2の制御パルスを前記第2の励磁信号より
も短い周期で発生する第2の制御パルス発生回路
と、 前記第2の制御パルス発生回路から得られた前
記第2の制御パルスを前記第2の励磁信号で決定
された期間に前記第2のスイツチング素子に与え
る第2のゲート回路と、 前記第1のコンパレータの一方の入力端子と他
方の入力端子との間に接続された第1のコンデン
サと、 前記第2のコンパレータの一方の入力端子と他
方の入力端子との間に接続された第2のコンデン
サと、 を備えたステツピングモータ装置。 (2) 更に、前記第1及び第2のコパレータの一
方の入力端子の相互間に接続された第3のコンデ
ンサを備えた請求項1記載のステツピングモータ
装置。 (3) 直流電源の一端と他端との間にそれぞれ接
続された第1及び第2の巻線と、 前記第1及び第2の巻線に直列にそれぞれ接続
された第1及び第2の励磁期間決定用スイツチン
グ素子と、 前記第1及び第2の巻線の励磁期間を示す第1
及び第2の励磁信号を時間的に重なり合う期間を
有して発生し、前記第1及び第2の励磁信号を前
記第1及び第2の励磁期間決定用スイツチング素
子にそれぞれ供給する励磁信号発生回路と、 前記第1及び第2の巻線に直列にそれぞれ接続
された第1及び第2の電流制御用スイツチング素
子と、 前記第1及び第2の巻線を通つて流れる電流を
それぞれ検出するための第1及び第2の電流検出
器と、 第1及び第2の基準電圧端子を有する基準電圧
回路と、 前記第1の基準電圧端子に接続された一方の入
力端子を有するた共に、前記第1の電流検出器に
接続された他方の入力端子を有し、前記第1の基
準電圧端子から与えられた第1の基準電圧と前記
第1の電流検出器から与えられた第1の検出電圧
とを比較して前記第1の巻線に流れる電流が前記
第1の基準電圧に達した時点を示す信号を出力す
る第1のコンパレータと、 前記第1のコンパレータの出力に基づいて前記
第1の電流制御用スイツチング素子をオン・オフ
制御するための第1の制御パルスを前記第1の励
磁信号よりも短い周期で発生する第1の制御パル
ス発生回路と、 前記第2の基準電圧端子に接続された一方の入
力端子を有すると共に、前記第2の電流検出器に
接続された他方の入力端子を有し、前記第2の基
準電圧端子から与えられた第2の基準電圧と前記
第2の電流検出器から与えられた第2の検出電圧
とを比較して前記第2の巻線に流れる電流が前記
第2の基準電圧に達した時点を示す信号を出力す
る第2のコンパレータと、 前記第2のコンパレータの出力に基づいて前記
第2の電流制御用スイツチング素子をオン・オフ
制御するための第2の制御パルスを前記第1の励
磁信号よりも短い周期で発生する第2の制御パル
ス発生回路と、 前記第1のコンパレータの一方の入力端子と他
方の入力端子との間に接続された第1のコンデン
サと、 前記第2のコンパレータの一方の入力端子と他
方の入力端子との間に接続された第2のコンデン
サと を備えたステツピングモータ装置。 (4) 更に、前記第1及び第2のコンパレータの
一方の入力端子の相互間に接続された第3のコン
デンサを備えた請求項3記載のステツピングモー
タ装置。
[Claims for Utility Model Registration] (1) First and second windings connected between one end and the other end of a direct current source, respectively, and connected in series to the first and second windings, respectively. the first and second switching elements, and a first switch indicating the excitation period of the first and second windings.
and a second excitation signal generating circuit that generates a second excitation signal having temporally overlapping periods, and a first and second excitation signal generating circuit for detecting the current flowing through the first and second windings, respectively. a current detector; a reference voltage circuit having first and second reference voltage terminals; and a reference voltage circuit having one input terminal connected to the first reference voltage terminal and connected to the first current detector. the other input terminal, and compares a first reference voltage applied from the first reference voltage terminal with a first detection voltage applied from the first current detector, and a first comparator that outputs a signal indicating the point in time when the current flowing through the winding reaches the first reference voltage; and on/off control of the first switching element based on the output of the first comparator. a first control pulse generation circuit that generates a first control pulse to generate the first control pulse at a cycle shorter than the first excitation signal; and a first control pulse generation circuit that generates the first control pulse obtained from the first control pulse generation circuit. a first gate circuit that applies a signal to the first switching element during a period determined by the first excitation signal; and one input terminal connected to the second reference voltage terminal; It has the other input terminal connected to a current detector, and has a second reference voltage given from the second reference voltage terminal and a second detection voltage given from the second current detector. a second comparator that compares and outputs a signal indicating a point in time when the current flowing through the second winding reaches the second reference voltage; and a second switching circuit based on the output of the second comparator. a second control pulse generation circuit that generates a second control pulse for controlling on/off of the element at a shorter period than the second excitation signal; a second gate circuit that applies a second control pulse to the second switching element during a period determined by the second excitation signal; and one input terminal and the other input terminal of the first comparator. A stepping motor device comprising: a first capacitor connected between the first and second capacitors; and a second capacitor connected between one input terminal and the other input terminal of the second comparator. (2) The stepping motor device according to claim 1, further comprising a third capacitor connected between one input terminal of the first and second coparators. (3) first and second windings connected between one end and the other end of the DC power supply, respectively, and first and second windings connected in series with the first and second windings, respectively; a switching element for determining an excitation period; a first switching element indicating an excitation period of the first and second windings;
and an excitation signal generation circuit that generates a second excitation signal with temporally overlapping periods and supplies the first and second excitation signals to the first and second excitation period determining switching elements, respectively. and first and second current control switching elements connected in series to the first and second windings, respectively, for detecting the current flowing through the first and second windings, respectively. a reference voltage circuit having first and second current detectors; a reference voltage circuit having one input terminal connected to the first reference voltage terminal; the other input terminal connected to the first current detector, a first reference voltage given from the first reference voltage terminal and a first detection voltage given from the first current detector; a first comparator that outputs a signal indicating a point in time when the current flowing through the first winding reaches the first reference voltage by comparing the current with the first reference voltage; a first control pulse generation circuit that generates a first control pulse for on/off control of a current control switching element at a cycle shorter than the first excitation signal; has one input terminal connected to the second current detector, and has the other input terminal connected to the second current detector, and has a second reference voltage applied from the second reference voltage terminal and the second current detector. a second comparator that outputs a signal indicating the point in time when the current flowing through the second winding reaches the second reference voltage by comparing the voltage with a second detection voltage given from the current detector; a second control that generates a second control pulse for controlling on/off of the second current control switching element based on the output of the second comparator at a cycle shorter than the first excitation signal; a pulse generation circuit; a first capacitor connected between one input terminal and the other input terminal of the first comparator; and one input terminal and the other input terminal of the second comparator. and a second capacitor connected between. (4) The stepping motor device according to claim 3, further comprising a third capacitor connected between one input terminal of the first and second comparators.
JP1989057449U 1989-05-18 1989-05-18 Stepping motor device Expired - Fee Related JPH0733598Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989057449U JPH0733598Y2 (en) 1989-05-18 1989-05-18 Stepping motor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989057449U JPH0733598Y2 (en) 1989-05-18 1989-05-18 Stepping motor device

Publications (2)

Publication Number Publication Date
JPH031699U true JPH031699U (en) 1991-01-09
JPH0733598Y2 JPH0733598Y2 (en) 1995-07-31

Family

ID=31582163

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989057449U Expired - Fee Related JPH0733598Y2 (en) 1989-05-18 1989-05-18 Stepping motor device

Country Status (1)

Country Link
JP (1) JPH0733598Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005064782A1 (en) * 2003-12-26 2005-07-14 Rohm Co.,Ltd Overcurrent protection circuit, motor drive circuit, and semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3724048B2 (en) * 1995-11-06 2005-12-07 株式会社デンソー L load drive

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS554688A (en) * 1978-06-22 1980-01-14 Bbc Brown Boveri & Cie Control unit with no current dector for noncirculation current type duplex rectifier
JPS55147997A (en) * 1979-05-02 1980-11-18 Toshiba Corp Motor rotation control device
JPS58154398A (en) * 1982-03-08 1983-09-13 Fuji Xerox Co Ltd Exciting circuit for step motor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS554688A (en) * 1978-06-22 1980-01-14 Bbc Brown Boveri & Cie Control unit with no current dector for noncirculation current type duplex rectifier
JPS55147997A (en) * 1979-05-02 1980-11-18 Toshiba Corp Motor rotation control device
JPS58154398A (en) * 1982-03-08 1983-09-13 Fuji Xerox Co Ltd Exciting circuit for step motor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005064782A1 (en) * 2003-12-26 2005-07-14 Rohm Co.,Ltd Overcurrent protection circuit, motor drive circuit, and semiconductor device
JPWO2005064782A1 (en) * 2003-12-26 2007-12-20 ローム株式会社 Overcurrent protection circuit, motor drive circuit, and semiconductor device
CN100456626C (en) * 2003-12-26 2009-01-28 罗姆股份有限公司 Overcurrent protection circuit, motor drive circuit, and semiconductor device

Also Published As

Publication number Publication date
JPH0733598Y2 (en) 1995-07-31

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