JPH031693B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an arithmetic system for a data processing device that uses data whose bits are distributed in parallel to a plurality of arithmetic units. More specifically, the present invention relates to a method of detecting a leading zero value of data in a parallel processing type data processing device.

<Prior art> Conventionally, in this type of parallel processing type data processing device, in order to obtain the leading zero value of data whose bits are distributed in parallel, it was necessary to convert the data into serial form before detection. . Therefore, serial conversion increases the width of the number of data bits, which has the disadvantage of requiring a separate arithmetic unit from each parallel arithmetic unit and complicated control.

<Objective of the Invention> The object of the present invention is to provide a system that solves the above-mentioned drawbacks and improves the efficiency of detecting the leading zero value by effectively using each parallel processing unit and providing a simple comparison circuit. It is in.

<Structure of the Invention> The present invention provides a data processing device including a plurality of ordered arithmetic units, which includes means for distributing bits of each bit of binary data in an order corresponding to the arithmetic units, starting from the most significant bits. Each of the arithmetic units is provided with a means for detecting a leading zero value using the distributed set of bit data as an input, and a comparing means is provided for receiving an output result of the leading zero value detecting means of each arithmetic unit. Therefore, this is a leading zero value detection method characterized by detecting the leading zero value of the binary data.

<Example> Next, an example according to the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a configuration diagram when there are four arithmetic units. Reference numeral 100 indicates a distribution means for distributing binary data indicated by 101. However, the numerical value within 101 indicates the position of each bit. Reference numeral 200 indicates the 0th arithmetic unit, and hereinafter, 210, 220, and 230 indicate the first, second, and third arithmetic units.

201, 211, 221, and 231 indicate sets of bit data distributed to each arithmetic unit 200 to 230, and the sets of bit data 201 to 231
The numerical values within correspond to the bit positions of the binary number indicated by the binary data 101.

250, 251, 252, and 253 each indicate a leading zero value detection means. 300 indicates a comparison means.

FIG. 2 shows an embodiment of leading zero value detection. 201 to 231 indicate sets of bit data in FIG.
201=00000010…,211=00000001…,22
It is assumed that 1=00001011..., 231=00000100... are given.

Note that the numbers shown above the bit data sets 201 to 231 are the serial original binary data 101.
represents the bit position. In addition, the numbers at the top of FIG. 2 indicate each bit data set 201 to 23.
The position of each bit of 1 is shown.

In the example of FIG. 2, the leading zero value is the 18th position in the binary data 101, which is expressed as a binary number: 00010010 = 1 x 2 ⁴ + 1 x 2 ¹ = 16 + 2
becomes. This is usually obtained by counting the number of "0"s in the order of the bit positions, but this means counting the number of "0s" to the left of the position indicated by the dashed line in the figure.

On the other hand, if we look at each of the parallel data 201 to 231 from the left, it is clear that all of them are "0" until the first "1" appears, so the leading zero value obtained by each calculation unit 200 to 230 teeth,
In the case of the 0th arithmetic unit 200, the 6th a0
=000110=1×2 ² +1×2 ¹ =4+2= 6 Similarly, in the case of the first arithmetic unit 210, a1 at the seventh
=000111=1×2 ² +1×2 ¹ +1×2 ⁰ =4+2+1
= 7 , in the case of the second calculation unit 220, a2 = 000100 = 1 x 2 ² = 4 in the case of the 4th calculation unit, a3 = 000101 = 1 x 2 ² + 1 × 2 ⁰ = in the case of the 5th calculation unit, in the case of the third calculation unit
4+1= 5 .

Therefore, in order to obtain 00010010, the minimum value a2=a2=
Multiply 000100 by 4 and calculate the minimum value, arithmetic unit 22.
Arithmetic units 200, 21 located above 0
Just add the number of 0's. i.e. 000100×(4)
+(2)=010000+000010=010010.

At this time, the higher-ranking arithmetic unit 200,
The number 210 indicates the minimum value of the arithmetic unit 220.
corresponds to the binary number [10], so the binary number [00] to [11] for each calculation unit is
It will be a fixed value. That is, by multiplying the minimum value "000100" by four and adding the binary number "10" of the arithmetic unit 220, "00010010" is obtained as the leading zero value.

Generally, when there are n arithmetic units and the first arithmetic unit has the minimum value of the leading zero value x, the following formula holds true (where R is the leading zero value of all data).

R = n x x + 1 If the number of parallel processing units is 2 ^j , the leading zero value from each processing unit is shifted to the left by j digits, the binary number of the processing unit is added as a fixed value, and the data is compared. By detecting the minimum value, the leading zero value of all data can be obtained. For example, in the above embodiment,
Since j = 2, the fixed value is [00] to [11], a0 = 000110 → R0 = 000110 00 = 1 × 2 ⁴ + 1 × 2 ³ = 16 + 8 = 24 a1 = 000111 → R1 = 000111 01 = 1 ×2 ⁴ +1×2 ³
+1×2 ² +1×2 ⁰ =24+4+1=29 a2=000100→R2=000100 10 =1×2 ⁴ +1×2 ¹
=16+2=18 a3=000101→R3=000101 11 =1×2 ⁴ +1×2 ²
+1×2 ¹ +1×2 ⁰ =16+4+2+1=23, and the minimum value is R2, which is 00010010.

Furthermore, by comparing the effective bit numbers at the same time, it is of course possible to calculate the leading zero value within the effective bit numbers. For example, if the upper L bits of all the data in Figure 2 are valid, the reading within a given bit length can be determined by comparing the upper L bits as in the case of R0, R1, R2, and R3. Zero value can be detected.
Note that when L is the minimum value, L becomes the leading zero value.

<Effects of the Invention> As explained above, the present invention compares the leading zero values calculated by each calculation unit to obtain the overall leading zero value, so when data is serially converted, the bit width of the data is large. This has the effect of eliminating the increase in the amount of hardware and the complexity of calculations caused by this.

[Brief explanation of the drawing]

FIG. 1 is a schematic configuration diagram showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram illustrating the same. 100...Distribution means, 101...Binary data, 20
0 to 230...0th to third arithmetic units, 201
~231...Distributed bit data set, 250
~253... Leading zero value detection means, 30
0...Comparison means.

Claims (1)

[Claims] 1. A data processing device including a plurality of ordered arithmetic units, comprising at least means for sequentially distributing each bit of binary data from the most significant bit to the arithmetic units in the above order; Each of the arithmetic units has means for inputting the set of distributed bit data and detecting a leading zero value, and further comprises means for inputting and comparing each output of the leading zero value detecting means. A leading zero value detection method, characterized in that the leading zero value of the binary data is detected by.