JPH03166745A - Evaluating method for field effect transistor - Google Patents
Evaluating method for field effect transistorInfo
- Publication number
- JPH03166745A JPH03166745A JP30490789A JP30490789A JPH03166745A JP H03166745 A JPH03166745 A JP H03166745A JP 30490789 A JP30490789 A JP 30490789A JP 30490789 A JP30490789 A JP 30490789A JP H03166745 A JPH03166745 A JP H03166745A
- Authority
- JP
- Japan
- Prior art keywords
- gate
- breakdown voltage
- drain electrodes
- field effect
- effect transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005669 field effect Effects 0.000 title claims abstract description 21
- 238000000034 method Methods 0.000 title claims description 6
- 230000015556 catabolic process Effects 0.000 claims abstract description 32
- 230000004888 barrier function Effects 0.000 claims abstract description 6
- 238000012360 testing method Methods 0.000 abstract description 15
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 2
- 230000001133 acceleration Effects 0.000 abstract 1
- 238000011156 evaluation Methods 0.000 description 8
- 238000007796 conventional method Methods 0.000 description 4
- 238000005259 measurement Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000000275 quality assurance Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
本発明は、電界効果トランジスタの3・『価方法に関し
、特に過大な高周波入力が見込まれるようなG a A
sショットキー障壁型電界効果トランジスタ(以降、
G a A s F E Tと略す)の信頼性の評価方
法に関するものである。[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to a method for manufacturing field effect transistors, particularly for G a A where excessive high frequency input is expected.
s Schottky barrier field effect transistor (hereinafter referred to as
The present invention relates to a method for evaluating the reliability of G.A.S.F.E.T.
GaAsFETは過大な高周波入力に対する信頼性の評
価が必要とされる。従来、高温連続高入力試験や高温高
パルス入力試験などによるG a A s F E T
の特性の変化を測定することで信頼性の評価を行なって
いる。GaAsFET requires reliability evaluation against excessive high frequency input. Conventionally, G a As F E T using high temperature continuous high input tests, high temperature high pulse input tests, etc.
Reliability is evaluated by measuring changes in the characteristics of
GaAsFETの特性のうち、高周波電力の最大出力を
規定するブレークダウン電圧の測定は評価項目として重
要である。このブレークダウン電圧BVgdは、GaA
sFETのソース電極をオープンとし、ゲート・ドレイ
ン電極間に所定の逆方向電流(通常、ゲート幅1mmあ
たり数百μA程度)が流されたときのゲート・ドレイン
電圧として定義される。Among the characteristics of GaAsFET, measurement of breakdown voltage, which defines the maximum output of high-frequency power, is important as an evaluation item. This breakdown voltage BVgd is GaA
It is defined as the gate-drain voltage when the source electrode of the sFET is open and a predetermined reverse current (usually about several hundred μA per 1 mm of gate width) is passed between the gate and drain electrodes.
特に、過大な高周波入力でQaAsFETを数千時間以
上動作させた場合に、このブレークダウン電圧BVgd
が低下することが知られている。このため、GaAsF
ETの品質保証上、また製造プロセス評価上、ブレーク
ダウン電圧BVgdのこのような低下を評価する試験が
必要となる。In particular, when the QaAsFET is operated for more than several thousand hours with excessive high frequency input, the breakdown voltage BVgd
is known to decrease. For this reason, GaAsF
For quality assurance of ET and evaluation of manufacturing process, a test to evaluate such a decrease in breakdown voltage BVgd is required.
ところが、これらの試験はGaAsFETを増幅器に組
み立て比較的良い整合状態にチューニングしたものを、
一定の高温度においてパルス波や連続波の高周波の過大
電力入力を印加した状態を長時間保持する試験のため、
高価な試験装置が必要であり、かつ、試験に数千時間と
いう長い時間が必要であった。加えて、試験の準備に多
大な労力が必要であるなどの問題点があった。However, in these tests, GaAsFETs assembled into amplifiers and tuned to a relatively good matching condition were tested.
In order to conduct a test in which a pulsed wave or continuous wave high frequency excessive power input is maintained for a long period of time at a constant high temperature,
Expensive testing equipment was required, and testing took several thousand hours. In addition, there were other problems such as the large amount of effort required to prepare for the exam.
本発明は、上記の欠点を解決したもので、簡単な試験装
置を用いてG a A s F E Tの過大な高周波
入力により生じるブレークダウン電圧BVgdの低下を
短時間に試験できる評価方法を提供することを目的とし
ている。The present invention solves the above-mentioned drawbacks and provides an evaluation method that can test the decrease in breakdown voltage BVgd caused by excessive high-frequency input of GaAs FET in a short time using a simple test device. It is intended to.
本発明による電界効果トランジスタの評価方法は、ショ
ットキー障壁型ゲートを用いた電界効果トランジスタの
ゲート・ドレイン1l極間のブレークダウン電圧を測定
する第1の工程と、上記電界効果トランジスタのゲート
・ドレイン電極間に所定の逆方向電流を所定時間流す第
2の工程と、再び上記電界効果トランジスタのゲート・
ドレイン電極間のブレークダウン電圧を測定する第3の
工程と、上記第1の工程におけるブレークダウン電圧と
上記第3の工程におけるブレークダウン電圧との変化量
から上記電界効果トランジスタを評価することを要旨と
するものである。The method for evaluating a field effect transistor according to the present invention includes a first step of measuring a breakdown voltage between the gate and drain electrodes of a field effect transistor using a Schottky barrier gate; A second step of flowing a predetermined reverse current between the electrodes for a predetermined time, and again flowing the gate of the field effect transistor.
A third step of measuring the breakdown voltage between the drain electrodes, and evaluating the field effect transistor from the amount of change between the breakdown voltage in the first step and the breakdown voltage in the third step. That is.
なお、上記第2工程においてゲート・ドレイン電極間に
流す逆方向電流の大きさは、ゲート電極がエレクトロマ
イグレーションを起こさない範囲に選ぶ必要があり、ゲ
ート幅に対して2m A / m m程度(0.5mA
/’mm以上、10m A / m m以下)が適当で
ある。In addition, the magnitude of the reverse direction current flowing between the gate and drain electrodes in the second step needs to be selected within a range that does not cause electromigration of the gate electrode, and is approximately 2 mA/mm (0 .5mA
/'mm or more and 10mA/mm or less) is suitable.
本発明は、GaAsFETに過大な高周波電力を入力し
た場合の劣化は、ゲート・ドレイン電極間に逆方向電流
が流れることによって起こり、主にゲート・ドレイン間
のブレークダウン電圧が劣化するという知見に基づいて
いる。したがって、ゲート・ドレイン電極間に直流の逆
方向電流を流すことによって過大な高周波電力を人力し
た場合と同様の作用を生じ、適当な電流値を選ぶことに
よって直流による加速試験が可能となる。The present invention is based on the knowledge that when excessive high-frequency power is input to a GaAsFET, deterioration occurs due to a reverse current flowing between the gate and drain electrodes, and the breakdown voltage between the gate and drain mainly deteriorates. ing. Therefore, by passing a direct current in the opposite direction between the gate and drain electrodes, an effect similar to that obtained when excessive high-frequency power is applied manually is produced, and by selecting an appropriate current value, accelerated testing using direct current becomes possible.
以下、実施例により本発明をより詳細に説明する。 Hereinafter, the present invention will be explained in more detail with reference to Examples.
電界効果トランジスタとして、Q a A s半導体を
用いたショットキー障壁型ゲートを用いたGaAsFE
Tを評価する。このGaAsFE′「のゲート幅は28
0μmである。GaAsFE using Schottky barrier gate using QaAs semiconductor as field effect transistor
Evaluate T. The gate width of this GaAsFE' is 28
It is 0 μm.
所定の製造工程により作製されたGaAsFETのゲー
ト・ドレイン電極間の第1のプレークダウン電圧BVg
dlを、まず測定する。First breakdown voltage BVg between the gate and drain electrodes of a GaAsFET manufactured by a predetermined manufacturing process
dl is first measured.
ブレークダウン電圧の測定方法は、GaAsFETのゲ
ート電極とソース電極間に定電流源を接続し、100μ
Aの逆方向電流を流し、この時のゲート・ドレイン電極
間の電圧を測定し、ブレークダウン電圧BVgdとする
。なお、この時ソース電極は接続されておらずオープン
である。To measure the breakdown voltage, connect a constant current source between the gate electrode and source electrode of the GaAsFET,
A reverse current of A is caused to flow, and the voltage between the gate and drain electrodes at this time is measured and taken as the breakdown voltage BVgd. Note that at this time, the source electrode is not connected and is open.
次に、ゲート・ドレイン電極間に流す電流を0.5mA
に増大し、逆方向電流を30分間流し続ける。この逆方
向電流は、ゲート幅1mmあたり約1.8mAとなる。Next, the current flowing between the gate and drain electrodes is 0.5 mA.
The reverse current is continued to flow for 30 minutes. This reverse current is about 1.8 mA per 1 mm of gate width.
再び、GaAsFETのゲート・ドレイン電極間の第2
のブレークダウン電圧BVgd2を測定する。Again, the second electrode between the gate and drain electrodes of the GaAsFET
Measure the breakdown voltage BVgd2.
第1のブレークダウン電圧と第2のブレークダウン電圧
との変化量(BVgd 1−BVgd2)から上記電界
効果トランジスタを評価できる。以上の評価は、約30
分で終了するものである。The above field effect transistor can be evaluated from the amount of change (BVgd 1 - BVgd2) between the first breakdown voltage and the second breakdown voltage. The above rating is about 30
It will be finished in minutes.
比較例として、従来方法である周囲温度95℃で120
0時間の高温連続入力試験を行なった場合のゲート・ド
レイン電極間のブレークダウン電圧の変化量(高温連続
入力試験を行う前後での変化量)の測定を行なった。As a comparative example, the conventional method is 120°C at an ambient temperature of 95°C.
The amount of change in breakdown voltage between the gate and drain electrodes (the amount of change before and after performing the high temperature continuous input test) when a 0 hour high temperature continuous input test was performed was measured.
この従来方法による変化量測定結果と本発明の実施例に
よる変化量の測定結果との同一ロットのG a A s
F E Tでの対応を第1図に示す。G a As of the same lot between the measurement result of the amount of change by this conventional method and the measurement result of the amount of change by the example of the present invention.
The correspondence in FET is shown in Figure 1.
この図から明らかなように、両者の方法による測定結果
は非常に良く相関していることがわかる。As is clear from this figure, the measurement results obtained by both methods are highly correlated.
したがって、あらかじめ高温高連続入力試験と本発明の
試験との対応をとっておけば、本発明による評価により
過大な高周波入力に対する信頼性の評価を数千分の一の
時間で行なうことができる。Therefore, if the correspondence between the high-temperature, high-continuous input test and the test of the present invention is established in advance, reliability evaluation against excessive high-frequency input can be performed in a few thousandths of the time by the evaluation according to the present invention.
[発明の効果]
以上説明したように、本発明による評価方法は、ショッ
トキー障壁型ゲートを用いた電界効果トランジスタのゲ
ート・ドレイン電極間のブレークダウン電圧を測定する
第1の工程と、上記電界効果トランジスタのゲート・ド
レイン電極間に所定の逆方向電流を所定時間流す第2の
工程と、再び上記電界効果トランジスタのゲート・ドレ
イン電極間のブレークダウン電圧を狗定する第3の工程
と、上記第1の工程におけるブレークダウン電圧と上記
第3の工程におけるブレークダウン電圧との変化量から
上記電界効果トランジスタを評価するものである。[Effects of the Invention] As explained above, the evaluation method according to the present invention includes the first step of measuring the breakdown voltage between the gate and drain electrodes of a field effect transistor using a Schottky barrier gate, and a second step of flowing a predetermined reverse current for a predetermined time between the gate and drain electrodes of the field effect transistor; a third step of again determining the breakdown voltage between the gate and drain electrodes of the field effect transistor; The field effect transistor is evaluated from the amount of change between the breakdown voltage in the first step and the breakdown voltage in the third step.
したがって、本発明により、電界効果[・ランジスタの
信頼性の重要な評価であるゲート・ドレイン電極間のブ
レークダウン電圧の低下を、直流電流を流すという簡便
な装置で、かつ数千分のーという短時間に測定すること
ができる。Therefore, the present invention can reduce the breakdown voltage between the gate and drain electrodes, which is an important evaluation of the reliability of transistors, by using a simple device that flows a direct current, and can reduce the drop in breakdown voltage between the gate and drain electrodes by a factor of several thousand. Can be measured in a short time.
第1図は、本実施例と従来方法によるブレークダウン電
圧の変化の対応を説明するためのものであり、横軸が従
来方法による変化量、縦軸が本実施例による変化量を示
している。Figure 1 is for explaining the correspondence between changes in breakdown voltage between this example and the conventional method, with the horizontal axis showing the amount of change due to the conventional method, and the vertical axis showing the amount of change due to this example. .
Claims (1)
スタのゲート・ドレイン電極間のブレークダウン電圧を
測定する第1の工程と、上記電界効果トランジスタのゲ
ート・ドレイン電極間に所定の逆方向電流を所定時間流
す第2の工程と、再び上記電界効果トランジスタのゲー
ト・ドレイン電極間のブレークダウン電圧を測定する第
3の工程と、上記第1の工程におけるブレークダウン電
圧と上記第3の工程におけるブレークダウン電圧との変
化量から上記電界効果トランジスタを評価することを特
徴とする電界効果トランジスタの評価方法。A first step of measuring the breakdown voltage between the gate and drain electrodes of a field effect transistor using a Schottky barrier gate, and flowing a predetermined reverse current between the gate and drain electrodes of the field effect transistor for a predetermined period of time. a second step; a third step of again measuring the breakdown voltage between the gate and drain electrodes of the field effect transistor; and a breakdown voltage in the first step and the breakdown voltage in the third step. A method for evaluating a field effect transistor, characterized in that the field effect transistor is evaluated from the amount of change in the field effect transistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30490789A JPH03166745A (en) | 1989-11-27 | 1989-11-27 | Evaluating method for field effect transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30490789A JPH03166745A (en) | 1989-11-27 | 1989-11-27 | Evaluating method for field effect transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03166745A true JPH03166745A (en) | 1991-07-18 |
Family
ID=17938733
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP30490789A Pending JPH03166745A (en) | 1989-11-27 | 1989-11-27 | Evaluating method for field effect transistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03166745A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1503408A1 (en) * | 2002-04-30 | 2005-02-02 | Sumitomo Electric Industries, Ltd. | Method for measuring withstand voltage of semiconductor epitaxial wafer and semiconductor epitaxial wafer |
JP2006284490A (en) * | 2005-04-04 | 2006-10-19 | Toyota Motor Corp | Testing method and specification value determination method for semiconductor element |
-
1989
- 1989-11-27 JP JP30490789A patent/JPH03166745A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1503408A1 (en) * | 2002-04-30 | 2005-02-02 | Sumitomo Electric Industries, Ltd. | Method for measuring withstand voltage of semiconductor epitaxial wafer and semiconductor epitaxial wafer |
EP1503408A4 (en) * | 2002-04-30 | 2009-08-12 | Sumitomo Electric Industries | Method for measuring withstand voltage of semiconductor epitaxial wafer and semiconductor epitaxial wafer |
JP2006284490A (en) * | 2005-04-04 | 2006-10-19 | Toyota Motor Corp | Testing method and specification value determination method for semiconductor element |
JP4577506B2 (en) * | 2005-04-04 | 2010-11-10 | トヨタ自動車株式会社 | Semiconductor device test method and standard value determination method |
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